619 	struct ntb_transport_mw *mw;  in ntb_transport_setup_qp_mw()  local
631 	mw = &nt->mw_vec[mw_num];  in ntb_transport_setup_qp_mw()
633 	if (!mw->virt_addr)  in ntb_transport_setup_qp_mw()
641 	rx_size = (unsigned int)mw->xlat_size / num_qps_mw;  in ntb_transport_setup_qp_mw()
642 	qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);  in ntb_transport_setup_qp_mw()
795 	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];  in ntb_free_mw()  local
798 	if (!mw->virt_addr)  in ntb_free_mw()
802 	dma_free_coherent(&pdev->dev, mw->alloc_size,  in ntb_free_mw()
803 			  mw->alloc_addr, mw->dma_addr);  in ntb_free_mw()
804 	mw->xlat_size = 0;  in ntb_free_mw()
805 	mw->buff_size = 0;  in ntb_free_mw()
806 	mw->alloc_size = 0;  in ntb_free_mw()
807 	mw->alloc_addr = NULL;  in ntb_free_mw()
808 	mw->virt_addr = NULL;  in ntb_free_mw()
811 static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,  in ntb_alloc_mw_buffer()  argument
818 	alloc_addr = dma_alloc_coherent(dma_dev, mw->alloc_size,  in ntb_alloc_mw_buffer()
821 		dev_err(dma_dev, "Unable to alloc MW buff of size %zu\n",  in ntb_alloc_mw_buffer()
822 			mw->alloc_size);  in ntb_alloc_mw_buffer()
834 		if (mw->alloc_size > mw->buff_size) {  in ntb_alloc_mw_buffer()
843 	mw->alloc_addr = alloc_addr;  in ntb_alloc_mw_buffer()
844 	mw->virt_addr = virt_addr;  in ntb_alloc_mw_buffer()
845 	mw->dma_addr = dma_addr;  in ntb_alloc_mw_buffer()
850 	dma_free_coherent(dma_dev, mw->alloc_size, alloc_addr, dma_addr);  in ntb_alloc_mw_buffer()
858 	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];  in ntb_set_mw()  local
877 	if (mw->xlat_size == xlat_size)  in ntb_set_mw()
880 	if (mw->buff_size)  in ntb_set_mw()
884 	mw->xlat_size = xlat_size;  in ntb_set_mw()
885 	mw->buff_size = buff_size;  in ntb_set_mw()
886 	mw->alloc_size = buff_size;  in ntb_set_mw()
888 	rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);  in ntb_set_mw()
890 		mw->alloc_size *= 2;  in ntb_set_mw()
891 		rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);  in ntb_set_mw()
894 				"Unable to alloc aligned MW buff\n");  in ntb_set_mw()
895 			mw->xlat_size = 0;  in ntb_set_mw()
896 			mw->buff_size = 0;  in ntb_set_mw()
897 			mw->alloc_size = 0;  in ntb_set_mw()
903 	rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,  in ntb_set_mw()
904 			      mw->xlat_size);  in ntb_set_mw()
906 		dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);  in ntb_set_mw()
1089 		dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);  in ntb_transport_link_work()
1246 	struct ntb_transport_mw *mw;  in ntb_transport_probe()  local
1255 		dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");  in ntb_transport_probe()
1279 	 * we will reserve the last MW for the MSI window.  in ntb_transport_probe()
1291 	/* Limit the MW's based on the availability of scratchpads */  in ntb_transport_probe()
1312 		mw = &nt->mw_vec[i];  in ntb_transport_probe()
1314 		rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,  in ntb_transport_probe()
1315 					  &mw->phys_size);  in ntb_transport_probe()
1319 		mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);  in ntb_transport_probe()
1320 		if (!mw->vbase) {  in ntb_transport_probe()
1325 		mw->buff_size = 0;  in ntb_transport_probe()
1326 		mw->xlat_size = 0;  in ntb_transport_probe()
1327 		mw->virt_addr = NULL;  in ntb_transport_probe()
1328 		mw->dma_addr = 0;  in ntb_transport_probe()
1394 		mw = &nt->mw_vec[i];  in ntb_transport_probe()
1395 		iounmap(mw->vbase);  in ntb_transport_probe()