1 // SPDX-License-Identifier: GPL-2.0-only
3  * phy-brcm-usb-init.c - Broadcom USB Phy chip specific init functions
5  * Copyright (C) 2014-2017 Broadcom
16 #include "phy-brcm-usb-init.h"
133 	(params->usb_reg_bits_map[USB_CTRL_##reg##_##field##_SELECTOR])
403 	mask = params->usb_reg_bits_map[field];  in usb_ctrl_unset_family()
404 	brcm_usb_ctrl_unset(params->regs[BRCM_REGS_CTRL] + reg_offset, mask);  in usb_ctrl_unset_family()
413 	mask = params->usb_reg_bits_map[field];  in usb_ctrl_set_family()
414 	brcm_usb_ctrl_set(params->regs[BRCM_REGS_CTRL] + reg_offset, mask);  in usb_ctrl_set_family()
460 	/* reset USB 2.0 PLL */  in brcmusb_usb_phy_ldo_fix()
462 	/* PLL reset period */  in brcmusb_usb_phy_ldo_fix()
465 	/* Give PLL enough time to lock */  in brcmusb_usb_phy_ldo_fix()
478 	/* Set correct window for PLL lock detect */  in brcmusb_usb3_pll_fix()
487 	/* Re-enable USB 3.0 pipe reset */  in brcmusb_usb3_enable_pipe_reset()
547 	void __iomem *ctrl_base = params->regs[BRCM_REGS_CTRL];  in brcmusb_usb3_pll_54mhz()
551 	 * 3.0 PLL has been changed from 50MHz to 54MHz so the  in brcmusb_usb3_pll_54mhz()
552 	 * PLL needs to be reprogrammed.  in brcmusb_usb3_pll_54mhz()
553 	 * See SWLINUX-4006.  in brcmusb_usb3_pll_54mhz()
556 	 * 3.0 PLL has been changed from 50MHz to 54MHz to  in brcmusb_usb3_pll_54mhz()
558 	 * See SWLINUX-4169.  in brcmusb_usb3_pll_54mhz()
560 	switch (params->selected_family) {  in brcmusb_usb3_pll_54mhz()
570 		if (BRCM_REV(params->family_id) < 0x20)  in brcmusb_usb3_pll_54mhz()
575 	/* set USB 3.0 PLL to accept 54Mhz reference clock */  in brcmusb_usb3_pll_54mhz()
602 	/* restart PLL sequence */  in brcmusb_usb3_pll_54mhz()
604 	/* Give PLL enough time to lock */  in brcmusb_usb3_pll_54mhz()
617 	/* Currently, USB 3.0 SSC is enabled via port 0 MDIO registers,  in brcmusb_usb3_ssc_enable()
619 	 * USB 3.0 PHY, it must be enabled via both ports (HWUSB3DVT-26).  in brcmusb_usb3_ssc_enable()
628 	void __iomem *ctrl_base = params->regs[BRCM_REGS_CTRL];  in brcmusb_usb3_phy_workarounds()
643 	if (params->selected_family != BRCM_FAMILY_7445D0)  in brcmusb_memc_fix()
646 	 * This is a workaround for HW7445-1869 where a DMA write ends up  in brcmusb_memc_fix()
647 	 * doing a read pre-fetch after the end of the DMA buffer. This  in brcmusb_memc_fix()
649 	 * memory, causing the pre-fetch read to access non-existent memory,  in brcmusb_memc_fix()
650 	 * and the chip bondout has MEMC2 disabled. When the pre-fetch read  in brcmusb_memc_fix()
656 	prid = params->product_id & 0xfffff000;  in brcmusb_memc_fix()
670 	void __iomem *xhci_ec_base = params->regs[BRCM_REGS_XHCI_EC];  in brcmusb_usb3_otp_fix()
673 	if (params->family_id != 0x74371000 || !xhci_ec_base)  in brcmusb_usb3_otp_fix()
683 	USB_CTRL_UNSET(params->regs[BRCM_REGS_CTRL], USB30_CTL1, PHY3_RESETB);  in brcmusb_usb3_otp_fix()
684 	USB_CTRL_SET(params->regs[BRCM_REGS_CTRL], USB30_CTL1, PHY3_RESETB);  in brcmusb_usb3_otp_fix()
697 	} else { /* De-assert reset */  in brcmusb_xhci_soft_reset()
708  *   - exact match of chip and major rev
709  *   - exact match of chip and closest older major rev
710  *   - default chip/rev.
716 	int last_type = -1;  in get_family_type()
722 	family = params->family_id & 0xfffffff0;  in get_family_type()
723 	family_no_major = params->family_id & 0xffffff00;  in get_family_type()
736 	if (last_type == -1)  in get_family_type()
743 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_init_ipp()
751 		if (params->ioc)  in usb_init_ipp()
753 		if (params->ipp == 1)  in usb_init_ipp()
766 		if (params->ipp != 2)  in usb_init_ipp()
772 	if (params->ioc)  in usb_init_ipp()
774 	if (params->ipp == 1)  in usb_init_ipp()
789 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_wake_enable()
800 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_init_common()
810 		/* 1 millisecond - for USB clocks to settle down */  in usb_init_common()
816 		/* 1 millisecond - for USB clocks to settle down */  in usb_init_common()
820 	if (params->selected_family != BRCM_FAMILY_74371A0 &&  in usb_init_common()
821 	    (BRCM_ID(params->family_id) != 0x7364))  in usb_init_common()
823 		 * HW7439-637: 7439a0 and its derivatives do not have large  in usb_init_common()
828 	/* Block auto PLL suspend by USB2 PHY (Sasi) */  in usb_init_common()
832 	if (params->selected_family == BRCM_FAMILY_7364A0)  in usb_init_common()
841 	 * interfaces are enabled if they exist.  in usb_init_common()
855 		reg |= params->mode;  in usb_init_common()
859 		switch (params->mode) {  in usb_init_common()
870 		if (params->mode == USB_CTLR_MODE_TYPEC_PD)  in usb_init_common()
881 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_init_eohci()
886 	if (params->selected_family == BRCM_FAMILY_7366C0)  in usb_init_eohci()
899 	if (params->selected_family == BRCM_FAMILY_7271A0)  in usb_init_eohci()
900 		/* Enable LS keep alive fix for certain keyboards */  in usb_init_eohci()
903 	if (params->family_id == 0x72550000) {  in usb_init_eohci()
906 		 * on the 7255a0. See HW7255-24.  in usb_init_eohci()
917 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_init_xhci()
920 	/* 1 millisecond - for USB clocks to settle down */  in usb_init_xhci()
923 	if (BRCM_ID(params->family_id) == 0x7366) {  in usb_init_xhci()
950 	if (params->wake_enabled)  in usb_uninit_common()
961 	USB_CTRL_SET(params->regs[BRCM_REGS_CTRL], USB30_PCTL,  in usb_uninit_xhci()
967 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_get_dual_select()
981 	void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];  in usb_set_dual_select()
1014 	params->selected_family = fam;  in brcm_usb_dvr_init_7445()
1015 	params->usb_reg_bits_map =  in brcm_usb_dvr_init_7445()
1017 	params->family_name = family_names[fam];  in brcm_usb_dvr_init_7445()
1018 	params->ops = &bcm7445_ops;  in brcm_usb_dvr_init_7445()