Lines Matching +full:first +full:- +full:data +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2009 - 2012 Paul Mundt
41 return chip->pfc; in gpio_to_pfc()
48 int idx = sh_pfc_get_pin_index(chip->pfc, offset); in gpio_get_data_reg()
49 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; in gpio_get_data_reg()
51 *reg = &chip->regs[gpio_pin->dreg]; in gpio_get_data_reg()
52 *bit = gpio_pin->dbit; in gpio_get_data_reg()
58 phys_addr_t address = dreg->reg; in gpio_read_data_reg()
59 void __iomem *mem = address - chip->mem->phys + chip->mem->virt; in gpio_read_data_reg()
61 return sh_pfc_read_raw_reg(mem, dreg->reg_width); in gpio_read_data_reg()
67 phys_addr_t address = dreg->reg; in gpio_write_data_reg()
68 void __iomem *mem = address - chip->mem->phys + chip->mem->virt; in gpio_write_data_reg()
70 sh_pfc_write_raw_reg(mem, dreg->reg_width, value); in gpio_write_data_reg()
75 struct sh_pfc *pfc = chip->pfc; in gpio_setup_data_reg()
76 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; in gpio_setup_data_reg()
77 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; in gpio_setup_data_reg()
82 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_reg()
83 for (bit = 0; bit < dreg->reg_width; bit++) { in gpio_setup_data_reg()
84 if (dreg->enum_ids[bit] == pin->enum_id) { in gpio_setup_data_reg()
85 gpio_pin->dreg = i; in gpio_setup_data_reg()
86 gpio_pin->dbit = bit; in gpio_setup_data_reg()
97 struct sh_pfc *pfc = chip->pfc; in gpio_setup_data_regs()
101 /* Count the number of data registers, allocate memory and initialize in gpio_setup_data_regs()
104 for (i = 0; pfc->info->data_regs[i].reg_width; ++i) in gpio_setup_data_regs()
107 chip->regs = devm_kcalloc(pfc->dev, i, sizeof(*chip->regs), in gpio_setup_data_regs()
109 if (chip->regs == NULL) in gpio_setup_data_regs()
110 return -ENOMEM; in gpio_setup_data_regs()
112 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_regs()
113 chip->regs[i].info = dreg; in gpio_setup_data_regs()
114 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg); in gpio_setup_data_regs()
117 for (i = 0; i < pfc->info->nr_pins; i++) { in gpio_setup_data_regs()
118 if (pfc->info->pins[i].enum_id == 0) in gpio_setup_data_regs()
127 /* -----------------------------------------------------------------------------
128 * Pin GPIOs
136 if (idx < 0 || pfc->info->pins[idx].enum_id == 0) in gpio_pin_request()
137 return -EINVAL; in gpio_pin_request()
156 pos = reg->info->reg_width - (bit + 1); in gpio_pin_set_value()
159 reg->shadow |= BIT(pos); in gpio_pin_set_value()
161 reg->shadow &= ~BIT(pos); in gpio_pin_set_value()
163 gpio_write_data_reg(chip, reg->info, reg->shadow); in gpio_pin_set_value()
188 pos = reg->info->reg_width - (bit + 1); in gpio_pin_get()
190 return (gpio_read_data_reg(chip, reg->info) >> pos) & 1; in gpio_pin_get()
203 for (i = 0; i < pfc->info->gpio_irq_size; i++) { in gpio_pin_to_irq()
204 const short *gpios = pfc->info->gpio_irq[i].gpios; in gpio_pin_to_irq() local
206 for (k = 0; gpios[k] >= 0; k++) { in gpio_pin_to_irq()
207 if (gpios[k] == offset) in gpio_pin_to_irq()
208 return pfc->irqs[i]; in gpio_pin_to_irq()
217 struct sh_pfc *pfc = chip->pfc; in gpio_pin_setup()
218 struct gpio_chip *gc = &chip->gpio_chip; in gpio_pin_setup()
221 chip->pins = devm_kcalloc(pfc->dev, in gpio_pin_setup()
222 pfc->info->nr_pins, sizeof(*chip->pins), in gpio_pin_setup()
224 if (chip->pins == NULL) in gpio_pin_setup()
225 return -ENOMEM; in gpio_pin_setup()
231 gc->request = gpio_pin_request; in gpio_pin_setup()
232 gc->free = gpio_pin_free; in gpio_pin_setup()
233 gc->direction_input = gpio_pin_direction_input; in gpio_pin_setup()
234 gc->get = gpio_pin_get; in gpio_pin_setup()
235 gc->direction_output = gpio_pin_direction_output; in gpio_pin_setup()
236 gc->set = gpio_pin_set; in gpio_pin_setup()
237 gc->to_irq = gpio_pin_to_irq; in gpio_pin_setup()
239 gc->label = pfc->info->name; in gpio_pin_setup()
240 gc->parent = pfc->dev; in gpio_pin_setup()
241 gc->owner = THIS_MODULE; in gpio_pin_setup()
242 gc->base = 0; in gpio_pin_setup()
243 gc->ngpio = pfc->nr_gpio_pins; in gpio_pin_setup()
248 /* -----------------------------------------------------------------------------
249 * Function GPIOs
256 unsigned int mark = pfc->info->func_gpios[offset].enum_id; in gpio_function_request()
260 dev_notice_once(pfc->dev, in gpio_function_request()
264 return -EINVAL; in gpio_function_request()
266 spin_lock_irqsave(&pfc->lock, flags); in gpio_function_request()
268 spin_unlock_irqrestore(&pfc->lock, flags); in gpio_function_request()
275 struct sh_pfc *pfc = chip->pfc; in gpio_function_setup()
276 struct gpio_chip *gc = &chip->gpio_chip; in gpio_function_setup()
278 gc->request = gpio_function_request; in gpio_function_setup()
280 gc->label = pfc->info->name; in gpio_function_setup()
281 gc->owner = THIS_MODULE; in gpio_function_setup()
282 gc->base = pfc->nr_gpio_pins; in gpio_function_setup()
283 gc->ngpio = pfc->info->nr_func_gpios; in gpio_function_setup()
289 /* -----------------------------------------------------------------------------
300 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); in sh_pfc_add_gpiochip()
302 return ERR_PTR(-ENOMEM); in sh_pfc_add_gpiochip()
304 chip->mem = mem; in sh_pfc_add_gpiochip()
305 chip->pfc = pfc; in sh_pfc_add_gpiochip()
311 ret = devm_gpiochip_add_data(pfc->dev, &chip->gpio_chip, chip); in sh_pfc_add_gpiochip()
315 dev_info(pfc->dev, "%s handling gpio %u -> %u\n", in sh_pfc_add_gpiochip()
316 chip->gpio_chip.label, chip->gpio_chip.base, in sh_pfc_add_gpiochip()
317 chip->gpio_chip.base + chip->gpio_chip.ngpio - 1); in sh_pfc_add_gpiochip()
328 if (pfc->info->data_regs == NULL) in sh_pfc_register_gpiochip()
333 * that covers the data registers. In that case don't try to handle in sh_pfc_register_gpiochip()
334 * GPIOs. in sh_pfc_register_gpiochip()
336 address = pfc->info->data_regs[0].reg; in sh_pfc_register_gpiochip()
337 for (i = 0; i < pfc->num_windows; ++i) { in sh_pfc_register_gpiochip()
338 struct sh_pfc_window *window = &pfc->windows[i]; in sh_pfc_register_gpiochip()
340 if (address >= window->phys && in sh_pfc_register_gpiochip()
341 address < window->phys + window->size) in sh_pfc_register_gpiochip()
345 if (i == pfc->num_windows) in sh_pfc_register_gpiochip()
349 if (pfc->num_irqs != pfc->info->gpio_irq_size) { in sh_pfc_register_gpiochip()
350 dev_err(pfc->dev, "invalid number of IRQ resources\n"); in sh_pfc_register_gpiochip()
351 return -EINVAL; in sh_pfc_register_gpiochip()
354 /* Register the real GPIOs chip. */ in sh_pfc_register_gpiochip()
355 chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]); in sh_pfc_register_gpiochip()
359 pfc->gpio = chip; in sh_pfc_register_gpiochip()
361 if (IS_ENABLED(CONFIG_OF) && pfc->dev->of_node) in sh_pfc_register_gpiochip()
367 * must come first in the ranges, skip the pins without GPIO in sh_pfc_register_gpiochip()
368 * ports by stopping at the first range that contains such a in sh_pfc_register_gpiochip()
371 for (i = 0; i < pfc->nr_ranges; ++i) { in sh_pfc_register_gpiochip()
372 const struct sh_pfc_pin_range *range = &pfc->ranges[i]; in sh_pfc_register_gpiochip()
375 if (range->start >= pfc->nr_gpio_pins) in sh_pfc_register_gpiochip()
378 ret = gpiochip_add_pin_range(&chip->gpio_chip, in sh_pfc_register_gpiochip()
379 dev_name(pfc->dev), range->start, range->start, in sh_pfc_register_gpiochip()
380 range->end - range->start + 1); in sh_pfc_register_gpiochip()
385 /* Register the function GPIOs chip. */ in sh_pfc_register_gpiochip()
386 if (pfc->info->nr_func_gpios) { in sh_pfc_register_gpiochip()