1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * SiRFSoC Real Time Clock interface for Linux
38 /* This macro is also defined in arch/arm/plat-sirfsoc/cpu.c */
48 	/* Overflow for every 8 years extra time */
62 	regmap_read(rtcdrv->regmap, rtcdrv->rtc_base + offset, &val);  in sirfsoc_rtc_readl()
69 	regmap_write(rtcdrv->regmap, rtcdrv->rtc_base + offset, val);  in sirfsoc_rtc_writel()
80 	spin_lock_irq(&rtcdrv->lock);  in sirfsoc_rtc_read_alarm()
89 	 * 0->0xffffffff  in sirfsoc_rtc_read_alarm()
93 		rtc_time64_to_tm((rtcdrv->overflow_rtc + 1)  in sirfsoc_rtc_read_alarm()
94 				 << (BITS_PER_LONG - RTC_SHIFT)  in sirfsoc_rtc_read_alarm()
95 				 | rtc_alarm >> RTC_SHIFT, &alrm->time);  in sirfsoc_rtc_read_alarm()
97 		rtc_time64_to_tm(rtcdrv->overflow_rtc  in sirfsoc_rtc_read_alarm()
98 				 << (BITS_PER_LONG - RTC_SHIFT)  in sirfsoc_rtc_read_alarm()
99 				 | rtc_alarm >> RTC_SHIFT, &alrm->time);  in sirfsoc_rtc_read_alarm()
101 		alrm->enabled = 1;  in sirfsoc_rtc_read_alarm()
103 	spin_unlock_irq(&rtcdrv->lock);  in sirfsoc_rtc_read_alarm()
115 	if (alrm->enabled) {  in sirfsoc_rtc_set_alarm()
116 		rtc_alarm = rtc_tm_to_time64(&alrm->time);  in sirfsoc_rtc_set_alarm()
118 		spin_lock_irq(&rtcdrv->lock);  in sirfsoc_rtc_set_alarm()
123 			 * An ongoing alarm in progress - ingore it and not  in sirfsoc_rtc_set_alarm()
132 		 * This bit RTC_AL sets it as a wake-up source for Sleep Mode  in sirfsoc_rtc_set_alarm()
140 		spin_unlock_irq(&rtcdrv->lock);  in sirfsoc_rtc_set_alarm()
147 		spin_lock_irq(&rtcdrv->lock);  in sirfsoc_rtc_set_alarm()
162 		spin_unlock_irq(&rtcdrv->lock);  in sirfsoc_rtc_set_alarm()
175 	 * This patch is taken from WinCE - Need to validate this for  in sirfsoc_rtc_read_time()
177 	 * fail, read several times to make sure get stable value.  in sirfsoc_rtc_read_time()
184 	rtc_time64_to_tm(rtcdrv->overflow_rtc << (BITS_PER_LONG - RTC_SHIFT)  in sirfsoc_rtc_read_time()
198 	rtcdrv->overflow_rtc = rtc_time >> (BITS_PER_LONG - RTC_SHIFT);  in sirfsoc_rtc_set_time()
200 	sirfsoc_rtc_writel(rtcdrv, RTC_SW_VALUE, rtcdrv->overflow_rtc);  in sirfsoc_rtc_set_time()
214 	spin_lock_irq(&rtcdrv->lock);  in sirfsoc_rtc_alarm_irq_enable()
224 	spin_unlock_irq(&rtcdrv->lock);  in sirfsoc_rtc_alarm_irq_enable()
244 	spin_lock(&rtcdrv->lock);  in sirfsoc_rtc_irq_handler()
265 	spin_unlock(&rtcdrv->lock);  in sirfsoc_rtc_irq_handler()
271 	rtc_update_irq(rtcdrv->rtc, 1, events);  in sirfsoc_rtc_irq_handler()
277 	{ .compatible = "sirf,prima2-sysrtc"},
294 	struct device_node *np = pdev->dev.of_node;  in sirfsoc_rtc_probe()
296 	rtcdrv = devm_kzalloc(&pdev->dev,  in sirfsoc_rtc_probe()
299 		return -ENOMEM;  in sirfsoc_rtc_probe()
301 	spin_lock_init(&rtcdrv->lock);  in sirfsoc_rtc_probe()
303 	err = of_property_read_u32(np, "reg", &rtcdrv->rtc_base);  in sirfsoc_rtc_probe()
305 		dev_err(&pdev->dev, "unable to find base address of rtc node in dtb\n");  in sirfsoc_rtc_probe()
312 	device_init_wakeup(&pdev->dev, 1);  in sirfsoc_rtc_probe()
314 	rtcdrv->regmap = devm_regmap_init_iobg(&pdev->dev,  in sirfsoc_rtc_probe()
316 	if (IS_ERR(rtcdrv->regmap)) {  in sirfsoc_rtc_probe()
317 		err = PTR_ERR(rtcdrv->regmap);  in sirfsoc_rtc_probe()
318 		dev_err(&pdev->dev, "Failed to allocate register map: %d\n",  in sirfsoc_rtc_probe()
325 	 * We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1  in sirfsoc_rtc_probe()
328 	rtc_div = ((32768 / RTC_HZ) / 2) - 1;  in sirfsoc_rtc_probe()
331 	/* 0x3 -> RTC_CLK */  in sirfsoc_rtc_probe()
341 	rtcdrv->overflow_rtc =  in sirfsoc_rtc_probe()
344 	rtcdrv->rtc = devm_rtc_allocate_device(&pdev->dev);  in sirfsoc_rtc_probe()
345 	if (IS_ERR(rtcdrv->rtc))  in sirfsoc_rtc_probe()
346 		return PTR_ERR(rtcdrv->rtc);  in sirfsoc_rtc_probe()
348 	rtcdrv->rtc->ops = &sirfsoc_rtc_ops;  in sirfsoc_rtc_probe()
349 	rtcdrv->rtc->range_max = (1ULL << 60) - 1;  in sirfsoc_rtc_probe()
351 	rtcdrv->irq = platform_get_irq(pdev, 0);  in sirfsoc_rtc_probe()
352 	err = devm_request_irq(&pdev->dev, rtcdrv->irq, sirfsoc_rtc_irq_handler,  in sirfsoc_rtc_probe()
353 			       IRQF_SHARED, pdev->name, rtcdrv);  in sirfsoc_rtc_probe()
355 		dev_err(&pdev->dev, "Unable to register for the SiRF SOC RTC IRQ\n");  in sirfsoc_rtc_probe()
359 	return rtc_register_device(rtcdrv->rtc);  in sirfsoc_rtc_probe()
366 	rtcdrv->overflow_rtc =  in sirfsoc_rtc_suspend()
369 	rtcdrv->saved_counter =  in sirfsoc_rtc_suspend()
371 	rtcdrv->saved_overflow_rtc = rtcdrv->overflow_rtc;  in sirfsoc_rtc_suspend()
372 	if (device_may_wakeup(dev) && !enable_irq_wake(rtcdrv->irq))  in sirfsoc_rtc_suspend()
373 		rtcdrv->irq_wake = 1;  in sirfsoc_rtc_suspend()
384 	 * if resume from snapshot and the rtc power is lost,  in sirfsoc_rtc_resume()
389 		/* 0x3 -> RTC_CLK */  in sirfsoc_rtc_resume()
393 		 * We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1  in sirfsoc_rtc_resume()
396 		rtc_div = ((32768 / RTC_HZ) / 2) - 1;  in sirfsoc_rtc_resume()
406 	rtcdrv->overflow_rtc = rtcdrv->saved_overflow_rtc;  in sirfsoc_rtc_resume()
413 	if (tmp <= rtcdrv->saved_counter)  in sirfsoc_rtc_resume()
414 		rtcdrv->overflow_rtc++;  in sirfsoc_rtc_resume()
419 	sirfsoc_rtc_writel(rtcdrv, RTC_SW_VALUE, rtcdrv->overflow_rtc);  in sirfsoc_rtc_resume()
421 	if (device_may_wakeup(dev) && rtcdrv->irq_wake) {  in sirfsoc_rtc_resume()
422 		disable_irq_wake(rtcdrv->irq);  in sirfsoc_rtc_resume()
423 		rtcdrv->irq_wake = 0;  in sirfsoc_rtc_resume()
435 		.name = "sirfsoc-rtc",
446 MODULE_ALIAS("platform:sirfsoc-rtc");