Lines Matching +full:ctrl +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
26 #include <linux/dma-mapping.h>
57 #include "sh-sci.h"
59 /* Offsets into the sci_port->irqs array */
73 ((port)->irqs[SCIx_ERI_IRQ] == \
74 (port)->irqs[SCIx_RXI_IRQ]) || \
75 ((port)->irqs[SCIx_ERI_IRQ] && \
76 ((port)->irqs[SCIx_RXI_IRQ] < 0))
87 #define SCI_SR(x) BIT((x) - 1)
88 #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1)
94 #define min_sr(_port) ffs((_port)->sampling_rate_mask)
95 #define max_sr(_port) fls((_port)->sampling_rate_mask)
99 for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \
100 if ((_port)->sampling_rate_mask & SCI_SR((_sr)))
124 struct mctrl_gpios *gpios; member
267 * Common SH-2(A) SCIF definitions for ports with FIFO data
319 * Common SH-3 SCIF definitions.
341 * Common SH-4(A) SCIF(B) definitions.
421 * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR
445 * Common SH-4(A) SCIF(B) definitions for ports with FIFO data
472 * SH7705-style SCIF(B) ports, lacking both SCSPTR and SCLSR
495 #define sci_getreg(up, offset) (&to_sci_port(up)->params->regs[offset])
507 if (reg->size == 8) in sci_serial_in()
508 return ioread8(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
509 else if (reg->size == 16) in sci_serial_in()
510 return ioread16(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
521 if (reg->size == 8) in sci_serial_out()
522 iowrite8(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
523 else if (reg->size == 16) in sci_serial_out()
524 iowrite16(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
533 if (!sci_port->port.dev) in sci_port_enable()
536 pm_runtime_get_sync(sci_port->port.dev); in sci_port_enable()
539 clk_prepare_enable(sci_port->clks[i]); in sci_port_enable()
540 sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]); in sci_port_enable()
542 sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK]; in sci_port_enable()
549 if (!sci_port->port.dev) in sci_port_disable()
552 for (i = SCI_NUM_CLKS; i-- > 0; ) in sci_port_disable()
553 clk_disable_unprepare(sci_port->clks[i]); in sci_port_disable()
555 pm_runtime_put_sync(sci_port->port.dev); in sci_port_disable()
562 * special-casing the port type, we check the port initialization in port_rx_irq_mask()
567 return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); in port_rx_irq_mask()
573 unsigned short ctrl; in sci_start_tx() local
576 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
578 if (s->chan_tx) in sci_start_tx()
586 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && in sci_start_tx()
587 dma_submit_error(s->cookie_tx)) { in sci_start_tx()
588 s->cookie_tx = 0; in sci_start_tx()
589 schedule_work(&s->work_tx); in sci_start_tx()
593 if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
595 ctrl = serial_port_in(port, SCSCR); in sci_start_tx()
596 serial_port_out(port, SCSCR, ctrl | SCSCR_TIE); in sci_start_tx()
602 unsigned short ctrl; in sci_stop_tx() local
605 ctrl = serial_port_in(port, SCSCR); in sci_stop_tx()
607 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_tx()
608 ctrl &= ~SCSCR_TDRQE; in sci_stop_tx()
610 ctrl &= ~SCSCR_TIE; in sci_stop_tx()
612 serial_port_out(port, SCSCR, ctrl); in sci_stop_tx()
615 if (to_sci_port(port)->chan_tx && in sci_stop_tx()
616 !dma_submit_error(to_sci_port(port)->cookie_tx)) { in sci_stop_tx()
617 dmaengine_terminate_async(to_sci_port(port)->chan_tx); in sci_stop_tx()
618 to_sci_port(port)->cookie_tx = -EINVAL; in sci_stop_tx()
625 unsigned short ctrl; in sci_start_rx() local
627 ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port); in sci_start_rx()
629 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_start_rx()
630 ctrl &= ~SCSCR_RDRQE; in sci_start_rx()
632 serial_port_out(port, SCSCR, ctrl); in sci_start_rx()
637 unsigned short ctrl; in sci_stop_rx() local
639 ctrl = serial_port_in(port, SCSCR); in sci_stop_rx()
641 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_rx()
642 ctrl &= ~SCSCR_RDRQE; in sci_stop_rx()
644 ctrl &= ~port_rx_irq_mask(port); in sci_stop_rx()
646 serial_port_out(port, SCSCR, ctrl); in sci_stop_rx()
651 if (port->type == PORT_SCI) { in sci_clear_SCxSR()
654 } else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) { in sci_clear_SCxSR()
715 * Use port-specific handler if provided. in sci_init_pins()
717 if (s->cfg->ops && s->cfg->ops->init_pins) { in sci_init_pins()
718 s->cfg->ops->init_pins(port, cflag); in sci_init_pins()
722 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_init_pins()
724 u16 ctrl = serial_port_in(port, SCPCR); in sci_init_pins() local
727 ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC); in sci_init_pins()
728 if (to_sci_port(port)->has_rtscts) { in sci_init_pins()
730 if (!(port->mctrl & TIOCM_RTS)) { in sci_init_pins()
731 ctrl |= SCPCR_RTSC; in sci_init_pins()
733 } else if (!s->autorts) { in sci_init_pins()
734 ctrl |= SCPCR_RTSC; in sci_init_pins()
738 ctrl &= ~SCPCR_RTSC; in sci_init_pins()
741 ctrl &= ~SCPCR_CTSC; in sci_init_pins()
744 serial_port_out(port, SCPCR, ctrl); in sci_init_pins()
745 } else if (sci_getreg(port, SCSPTR)->size) { in sci_init_pins()
750 if (!(port->mctrl & TIOCM_RTS)) in sci_init_pins()
752 else if (!s->autorts) in sci_init_pins()
763 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_txfill()
767 if (reg->size) in sci_txfill()
771 if (reg->size) in sci_txfill()
779 return port->fifosize - sci_txfill(port); in sci_txroom()
785 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_rxfill()
789 if (reg->size) in sci_rxfill()
793 if (reg->size) in sci_rxfill()
805 struct circ_buf *xmit = &port->state->xmit; in sci_transmit_chars()
808 unsigned short ctrl; in sci_transmit_chars() local
813 ctrl = serial_port_in(port, SCSCR); in sci_transmit_chars()
815 ctrl &= ~SCSCR_TIE; in sci_transmit_chars()
817 ctrl |= SCSCR_TIE; in sci_transmit_chars()
818 serial_port_out(port, SCSCR, ctrl); in sci_transmit_chars()
827 if (port->x_char) { in sci_transmit_chars()
828 c = port->x_char; in sci_transmit_chars()
829 port->x_char = 0; in sci_transmit_chars()
831 c = xmit->buf[xmit->tail]; in sci_transmit_chars()
832 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in sci_transmit_chars()
839 port->icount.tx++; in sci_transmit_chars()
840 } while (--count > 0); in sci_transmit_chars()
851 /* On SH3, SCIF may read end-of-break as a space->mark char */
852 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
856 struct tty_port *tport = &port->state->port; in sci_receive_chars()
873 if (port->type == PORT_SCI) { in sci_receive_chars()
883 if (port->type == PORT_SCIF || in sci_receive_chars()
884 port->type == PORT_HSCIF) { in sci_receive_chars()
892 count--; i--; in sci_receive_chars()
899 port->icount.frame++; in sci_receive_chars()
900 dev_notice(port->dev, "frame error\n"); in sci_receive_chars()
903 port->icount.parity++; in sci_receive_chars()
904 dev_notice(port->dev, "parity error\n"); in sci_receive_chars()
916 port->icount.rx += count; in sci_receive_chars()
934 struct tty_port *tport = &port->state->port; in sci_handle_errors()
938 if (status & s->params->overrun_mask) { in sci_handle_errors()
939 port->icount.overrun++; in sci_handle_errors()
945 dev_notice(port->dev, "overrun error\n"); in sci_handle_errors()
950 port->icount.frame++; in sci_handle_errors()
955 dev_notice(port->dev, "frame error\n"); in sci_handle_errors()
960 port->icount.parity++; in sci_handle_errors()
965 dev_notice(port->dev, "parity error\n"); in sci_handle_errors()
976 struct tty_port *tport = &port->state->port; in sci_handle_fifo_overrun()
982 reg = sci_getreg(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
983 if (!reg->size) in sci_handle_fifo_overrun()
986 status = serial_port_in(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
987 if (status & s->params->overrun_mask) { in sci_handle_fifo_overrun()
988 status &= ~s->params->overrun_mask; in sci_handle_fifo_overrun()
989 serial_port_out(port, s->params->overrun_reg, status); in sci_handle_fifo_overrun()
991 port->icount.overrun++; in sci_handle_fifo_overrun()
996 dev_dbg(port->dev, "overrun error\n"); in sci_handle_fifo_overrun()
1007 struct tty_port *tport = &port->state->port; in sci_handle_breaks()
1013 port->icount.brk++; in sci_handle_breaks()
1019 dev_dbg(port->dev, "BREAK detected\n"); in sci_handle_breaks()
1034 if (rx_trig >= port->fifosize) in scif_set_rtrg()
1035 rx_trig = port->fifosize - 1; in scif_set_rtrg()
1040 if (sci_getreg(port, HSRTRGR)->size) { in scif_set_rtrg()
1045 switch (port->type) { in scif_set_rtrg()
1091 if (sci_getreg(port, HSRTRGR)->size) in scif_rtrg_enabled()
1101 struct uart_port *port = &s->port; in rx_fifo_timer_fn()
1103 dev_dbg(port->dev, "Rx timed out\n"); in rx_fifo_timer_fn()
1113 return sprintf(buf, "%d\n", sci->rx_trigger); in rx_fifo_trigger_show()
1129 sci->rx_trigger = scif_set_rtrg(port, r); in rx_fifo_trigger_store()
1130 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in rx_fifo_trigger_store()
1146 if (port->type == PORT_HSCIF) in rx_fifo_timeout_show()
1147 v = sci->hscif_tot >> HSSCR_TOT_SHIFT; in rx_fifo_timeout_show()
1149 v = sci->rx_fifo_timeout; in rx_fifo_timeout_show()
1168 if (port->type == PORT_HSCIF) { in rx_fifo_timeout_store()
1170 return -EINVAL; in rx_fifo_timeout_store()
1171 sci->hscif_tot = r << HSSCR_TOT_SHIFT; in rx_fifo_timeout_store()
1173 sci->rx_fifo_timeout = r; in rx_fifo_timeout_store()
1176 timer_setup(&sci->rx_fifo_timer, rx_fifo_timer_fn, 0); in rx_fifo_timeout_store()
1189 struct uart_port *port = &s->port; in sci_dma_tx_complete()
1190 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_complete()
1193 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_dma_tx_complete()
1195 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_complete()
1197 xmit->tail += s->tx_dma_len; in sci_dma_tx_complete()
1198 xmit->tail &= UART_XMIT_SIZE - 1; in sci_dma_tx_complete()
1200 port->icount.tx += s->tx_dma_len; in sci_dma_tx_complete()
1206 s->cookie_tx = 0; in sci_dma_tx_complete()
1207 schedule_work(&s->work_tx); in sci_dma_tx_complete()
1209 s->cookie_tx = -EINVAL; in sci_dma_tx_complete()
1210 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_tx_complete()
1211 u16 ctrl = serial_port_in(port, SCSCR); in sci_dma_tx_complete() local
1212 serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE); in sci_dma_tx_complete()
1216 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_complete()
1222 struct uart_port *port = &s->port; in sci_dma_rx_push()
1223 struct tty_port *tport = &port->state->port; in sci_dma_rx_push()
1228 port->icount.buf_overrun++; in sci_dma_rx_push()
1230 port->icount.rx += copied; in sci_dma_rx_push()
1239 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_find_active()
1240 if (s->active_rx == s->cookie_rx[i]) in sci_dma_rx_find_active()
1243 return -1; in sci_dma_rx_find_active()
1250 s->chan_rx = NULL; in sci_dma_rx_chan_invalidate()
1251 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_chan_invalidate()
1252 s->cookie_rx[i] = -EINVAL; in sci_dma_rx_chan_invalidate()
1253 s->active_rx = 0; in sci_dma_rx_chan_invalidate()
1258 struct dma_chan *chan = s->chan_rx_saved; in sci_dma_rx_release()
1260 s->chan_rx_saved = NULL; in sci_dma_rx_release()
1263 dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], in sci_dma_rx_release()
1264 sg_dma_address(&s->sg_rx[0])); in sci_dma_rx_release()
1279 struct uart_port *port = &s->port; in sci_dma_rx_reenable_irq()
1284 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_rx_reenable_irq()
1286 enable_irq(s->irqs[SCIx_RXI_IRQ]); in sci_dma_rx_reenable_irq()
1294 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_complete()
1295 struct uart_port *port = &s->port; in sci_dma_rx_complete()
1300 dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line, in sci_dma_rx_complete()
1301 s->active_rx); in sci_dma_rx_complete()
1303 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1307 count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx); in sci_dma_rx_complete()
1309 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_dma_rx_complete()
1312 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_complete()
1314 desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1, in sci_dma_rx_complete()
1320 desc->callback = sci_dma_rx_complete; in sci_dma_rx_complete()
1321 desc->callback_param = s; in sci_dma_rx_complete()
1322 s->cookie_rx[active] = dmaengine_submit(desc); in sci_dma_rx_complete()
1323 if (dma_submit_error(s->cookie_rx[active])) in sci_dma_rx_complete()
1326 s->active_rx = s->cookie_rx[!active]; in sci_dma_rx_complete()
1330 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1331 dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n", in sci_dma_rx_complete()
1332 __func__, s->cookie_rx[active], active, s->active_rx); in sci_dma_rx_complete()
1336 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1337 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); in sci_dma_rx_complete()
1339 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1343 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1348 struct dma_chan *chan = s->chan_tx_saved; in sci_dma_tx_release()
1350 cancel_work_sync(&s->work_tx); in sci_dma_tx_release()
1351 s->chan_tx_saved = s->chan_tx = NULL; in sci_dma_tx_release()
1352 s->cookie_tx = -EINVAL; in sci_dma_tx_release()
1354 dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE, in sci_dma_tx_release()
1361 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_submit()
1362 struct uart_port *port = &s->port; in sci_dma_rx_submit()
1367 struct scatterlist *sg = &s->sg_rx[i]; in sci_dma_rx_submit()
1376 desc->callback = sci_dma_rx_complete; in sci_dma_rx_submit()
1377 desc->callback_param = s; in sci_dma_rx_submit()
1378 s->cookie_rx[i] = dmaengine_submit(desc); in sci_dma_rx_submit()
1379 if (dma_submit_error(s->cookie_rx[i])) in sci_dma_rx_submit()
1384 s->active_rx = s->cookie_rx[0]; in sci_dma_rx_submit()
1392 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_submit()
1398 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_submit()
1399 return -EAGAIN; in sci_dma_rx_submit()
1406 struct dma_chan *chan = s->chan_tx; in sci_dma_tx_work_fn()
1407 struct uart_port *port = &s->port; in sci_dma_tx_work_fn()
1408 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_work_fn()
1420 spin_lock_irq(&port->lock); in sci_dma_tx_work_fn()
1421 head = xmit->head; in sci_dma_tx_work_fn()
1422 tail = xmit->tail; in sci_dma_tx_work_fn()
1423 buf = s->tx_dma_addr + (tail & (UART_XMIT_SIZE - 1)); in sci_dma_tx_work_fn()
1424 s->tx_dma_len = min_t(unsigned int, in sci_dma_tx_work_fn()
1427 if (!s->tx_dma_len) { in sci_dma_tx_work_fn()
1429 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1433 desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len, in sci_dma_tx_work_fn()
1437 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1438 dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n"); in sci_dma_tx_work_fn()
1442 dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len, in sci_dma_tx_work_fn()
1445 desc->callback = sci_dma_tx_complete; in sci_dma_tx_work_fn()
1446 desc->callback_param = s; in sci_dma_tx_work_fn()
1447 s->cookie_tx = dmaengine_submit(desc); in sci_dma_tx_work_fn()
1448 if (dma_submit_error(s->cookie_tx)) { in sci_dma_tx_work_fn()
1449 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1450 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); in sci_dma_tx_work_fn()
1454 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1455 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", in sci_dma_tx_work_fn()
1456 __func__, xmit->buf, tail, head, s->cookie_tx); in sci_dma_tx_work_fn()
1462 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_work_fn()
1463 s->chan_tx = NULL; in sci_dma_tx_work_fn()
1465 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_work_fn()
1472 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_timer_fn()
1473 struct uart_port *port = &s->port; in sci_dma_rx_timer_fn()
1480 dev_dbg(port->dev, "DMA Rx timed out\n"); in sci_dma_rx_timer_fn()
1482 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_timer_fn()
1486 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1490 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in sci_dma_rx_timer_fn()
1492 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1493 dev_dbg(port->dev, "Cookie %d #%d has already completed\n", in sci_dma_rx_timer_fn()
1494 s->active_rx, active); in sci_dma_rx_timer_fn()
1508 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in sci_dma_rx_timer_fn()
1510 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1511 dev_dbg(port->dev, "Transaction complete after DMA engine was stopped"); in sci_dma_rx_timer_fn()
1516 dmaengine_terminate_async(s->chan_rx); in sci_dma_rx_timer_fn()
1517 read = sg_dma_len(&s->sg_rx[active]) - state.residue; in sci_dma_rx_timer_fn()
1520 count = sci_dma_rx_push(s, s->rx_buf[active], read); in sci_dma_rx_timer_fn()
1522 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_timer_fn()
1525 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_dma_rx_timer_fn()
1530 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1542 chan = dma_request_slave_channel(port->dev, in sci_request_dma_chan()
1545 dev_dbg(port->dev, "dma_request_slave_channel failed\n"); in sci_request_dma_chan()
1552 cfg.dst_addr = port->mapbase + in sci_request_dma_chan()
1553 (sci_getreg(port, SCxTDR)->offset << port->regshift); in sci_request_dma_chan()
1556 cfg.src_addr = port->mapbase + in sci_request_dma_chan()
1557 (sci_getreg(port, SCxRDR)->offset << port->regshift); in sci_request_dma_chan()
1563 dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret); in sci_request_dma_chan()
1576 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); in sci_request_dma()
1585 if (!port->dev->of_node) in sci_request_dma()
1588 s->cookie_tx = -EINVAL; in sci_request_dma()
1594 if (!of_find_property(port->dev->of_node, "dmas", NULL)) in sci_request_dma()
1598 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); in sci_request_dma()
1601 s->tx_dma_addr = dma_map_single(chan->device->dev, in sci_request_dma()
1602 port->state->xmit.buf, in sci_request_dma()
1605 if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) { in sci_request_dma()
1606 dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n"); in sci_request_dma()
1609 dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n", in sci_request_dma()
1611 port->state->xmit.buf, &s->tx_dma_addr); in sci_request_dma()
1613 INIT_WORK(&s->work_tx, sci_dma_tx_work_fn); in sci_request_dma()
1614 s->chan_tx_saved = s->chan_tx = chan; in sci_request_dma()
1619 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); in sci_request_dma()
1625 s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize); in sci_request_dma()
1626 buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2, in sci_request_dma()
1629 dev_warn(port->dev, in sci_request_dma()
1636 struct scatterlist *sg = &s->sg_rx[i]; in sci_request_dma()
1639 s->rx_buf[i] = buf; in sci_request_dma()
1641 sg_dma_len(sg) = s->buf_len_rx; in sci_request_dma()
1643 buf += s->buf_len_rx; in sci_request_dma()
1644 dma += s->buf_len_rx; in sci_request_dma()
1647 hrtimer_init(&s->rx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in sci_request_dma()
1648 s->rx_timer.function = sci_dma_rx_timer_fn; in sci_request_dma()
1650 s->chan_rx_saved = s->chan_rx = chan; in sci_request_dma()
1652 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_request_dma()
1661 if (s->chan_tx_saved) in sci_free_dma()
1663 if (s->chan_rx_saved) in sci_free_dma()
1676 s->tx_dma_len = 0; in sci_flush_buffer()
1677 if (s->chan_tx) { in sci_flush_buffer()
1678 dmaengine_terminate_async(s->chan_tx); in sci_flush_buffer()
1679 s->cookie_tx = -EINVAL; in sci_flush_buffer()
1700 if (s->chan_rx) { in sci_rx_interrupt()
1705 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_rx_interrupt()
1718 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u us\n", in sci_rx_interrupt()
1719 jiffies, s->rx_timeout); in sci_rx_interrupt()
1720 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_rx_interrupt()
1728 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) { in sci_rx_interrupt()
1730 scif_set_rtrg(port, s->rx_trigger); in sci_rx_interrupt()
1732 mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP( in sci_rx_interrupt()
1733 s->rx_frame * HZ * s->rx_fifo_timeout, 1000000)); in sci_rx_interrupt()
1750 spin_lock_irqsave(&port->lock, flags); in sci_tx_interrupt()
1752 spin_unlock_irqrestore(&port->lock, flags); in sci_tx_interrupt()
1777 if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) { in sci_er_interrupt()
1791 if (port->type == PORT_SCI) { in sci_er_interrupt()
1799 if (!s->chan_rx) in sci_er_interrupt()
1806 if (!s->chan_tx) in sci_er_interrupt()
1821 if (s->params->overrun_reg == SCxSR) in sci_mpxed_interrupt()
1823 else if (sci_getreg(port, s->params->overrun_reg)->size) in sci_mpxed_interrupt()
1824 orer_status = serial_port_in(port, s->params->overrun_reg); in sci_mpxed_interrupt()
1830 !s->chan_tx) in sci_mpxed_interrupt()
1837 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && in sci_mpxed_interrupt()
1846 if (s->irqs[SCIx_ERI_IRQ] != s->irqs[SCIx_BRI_IRQ] && in sci_mpxed_interrupt()
1851 if (orer_status & s->params->overrun_mask) { in sci_mpxed_interrupt()
1907 struct uart_port *up = &port->port; in sci_request_irq()
1916 if (port->irqs[w] == port->irqs[i]) in sci_request_irq()
1923 irq = up->irq; in sci_request_irq()
1925 irq = port->irqs[i]; in sci_request_irq()
1936 port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", in sci_request_irq()
1937 dev_name(up->dev), desc->desc); in sci_request_irq()
1938 if (!port->irqstr[j]) { in sci_request_irq()
1939 ret = -ENOMEM; in sci_request_irq()
1943 ret = request_irq(irq, desc->handler, up->irqflags, in sci_request_irq()
1944 port->irqstr[j], port); in sci_request_irq()
1946 dev_err(up->dev, "Can't allocate %s IRQ\n", desc->desc); in sci_request_irq()
1954 while (--i >= 0) in sci_request_irq()
1955 free_irq(port->irqs[i], port); in sci_request_irq()
1958 while (--j >= 0) in sci_request_irq()
1959 kfree(port->irqstr[j]); in sci_request_irq()
1973 int irq = port->irqs[i]; in sci_free_irq()
1984 if (port->irqs[j] == irq) in sci_free_irq()
1989 free_irq(port->irqs[i], port); in sci_free_irq()
1990 kfree(port->irqstr[i]); in sci_free_irq()
2009 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_rts()
2022 } else if (sci_getreg(port, SCSPTR)->size) { in sci_set_rts()
2023 u16 ctrl = serial_port_in(port, SCSPTR); in sci_set_rts() local
2027 ctrl &= ~SCSPTR_RTSDT; in sci_set_rts()
2029 ctrl |= SCSPTR_RTSDT; in sci_set_rts()
2030 serial_port_out(port, SCSPTR, ctrl); in sci_set_rts()
2036 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_get_cts()
2039 } else if (sci_getreg(port, SCSPTR)->size) { in sci_get_cts()
2051 * handled via the ->init_pins() op, which is a bit of a one-way street,
2052 * lacking any ability to defer pin control -- this will later be
2070 if (reg->size) in sci_set_mctrl()
2076 mctrl_gpio_set(s->gpios, mctrl); in sci_set_mctrl()
2078 if (!s->has_rtscts) in sci_set_mctrl()
2088 } else if (s->autorts) { in sci_set_mctrl()
2089 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_mctrl()
2107 struct mctrl_gpios *gpios = s->gpios; in sci_get_mctrl() local
2110 mctrl_gpio_get(gpios, &mctrl); in sci_get_mctrl()
2116 if (s->autorts) { in sci_get_mctrl()
2119 } else if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS)) { in sci_get_mctrl()
2122 if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR)) in sci_get_mctrl()
2124 if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD)) in sci_get_mctrl()
2132 mctrl_gpio_enable_ms(to_sci_port(port)->gpios); in sci_enable_ms()
2141 if (!sci_getreg(port, SCSPTR)->size) { in sci_break_ctl()
2149 spin_lock_irqsave(&port->lock, flags); in sci_break_ctl()
2153 if (break_state == -1) { in sci_break_ctl()
2163 spin_unlock_irqrestore(&port->lock, flags); in sci_break_ctl()
2171 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_startup()
2190 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_shutdown()
2192 s->autorts = false; in sci_shutdown()
2193 mctrl_gpio_disable_ms(to_sci_port(port)->gpios); in sci_shutdown()
2195 spin_lock_irqsave(&port->lock, flags); in sci_shutdown()
2204 (SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot)); in sci_shutdown()
2205 spin_unlock_irqrestore(&port->lock, flags); in sci_shutdown()
2208 if (s->chan_rx_saved) { in sci_shutdown()
2209 dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__, in sci_shutdown()
2210 port->line); in sci_shutdown()
2211 hrtimer_cancel(&s->rx_timer); in sci_shutdown()
2215 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) in sci_shutdown()
2216 del_timer_sync(&s->rx_fifo_timer); in sci_shutdown()
2224 unsigned long freq = s->clk_rates[SCI_SCK]; in sci_sck_calc()
2228 if (s->port.type != PORT_HSCIF) in sci_sck_calc()
2232 err = DIV_ROUND_CLOSEST(freq, sr) - bps; in sci_sck_calc()
2237 *srr = sr - 1; in sci_sck_calc()
2243 dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err, in sci_sck_calc()
2255 if (s->port.type != PORT_HSCIF) in sci_brg_calc()
2262 err = DIV_ROUND_CLOSEST(freq, sr * dl) - bps; in sci_brg_calc()
2268 *srr = sr - 1; in sci_brg_calc()
2274 dev_dbg(s->port.dev, "BRG: %u%+d bps using DL %u SR %u\n", bps, in sci_brg_calc()
2284 unsigned long freq = s->clk_rates[SCI_FCK]; in sci_scbrr_calc()
2288 if (s->port.type != PORT_HSCIF) in sci_scbrr_calc()
2302 * M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) - in sci_scbrr_calc()
2303 * (|D - 0.5| / N * (1 + F))| in sci_scbrr_calc()
2315 * err = freq / (br * prediv) - bps in sci_scbrr_calc()
2327 err = DIV_ROUND_CLOSEST(freq, br * prediv) - bps; in sci_scbrr_calc()
2332 *brr = br - 1; in sci_scbrr_calc()
2333 *srr = sr - 1; in sci_scbrr_calc()
2342 dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps, in sci_scbrr_calc()
2353 serial_port_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */ in sci_reset()
2356 if (reg->size) in sci_reset()
2362 if (sci_getreg(port, SCLSR)->size) { in sci_reset()
2368 if (s->rx_trigger > 1) { in sci_reset()
2369 if (s->rx_fifo_timeout) { in sci_reset()
2371 timer_setup(&s->rx_fifo_timer, rx_fifo_timer_fn, 0); in sci_reset()
2373 if (port->type == PORT_SCIFA || in sci_reset()
2374 port->type == PORT_SCIFB) in sci_reset()
2377 scif_set_rtrg(port, s->rx_trigger); in sci_reset()
2392 int best_clk = -1; in sci_set_termios()
2395 if ((termios->c_cflag & CSIZE) == CS7) in sci_set_termios()
2397 if (termios->c_cflag & PARENB) in sci_set_termios()
2399 if (termios->c_cflag & PARODD) in sci_set_termios()
2401 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2405 * earlyprintk comes here early on with port->uartclk set to zero. in sci_set_termios()
2408 * the baud rate is not programmed during earlyprintk - it is assumed in sci_set_termios()
2412 if (!port->uartclk) { in sci_set_termios()
2418 max_freq = max(max_freq, s->clk_rates[i]); in sci_set_termios()
2430 if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA && in sci_set_termios()
2431 port->type != PORT_SCIFB) { in sci_set_termios()
2445 if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2446 err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1, in sci_set_termios()
2461 if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2462 err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1, in sci_set_termios()
2489 dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n", in sci_set_termios()
2490 s->clks[best_clk], baud, min_err); in sci_set_termios()
2498 if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) { in sci_set_termios()
2503 spin_lock_irqsave(&port->lock, flags); in sci_set_termios()
2507 uart_update_timeout(port, termios->c_cflag, baud); in sci_set_termios()
2510 switch (termios->c_cflag & CSIZE) { in sci_set_termios()
2525 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2527 if (termios->c_cflag & PARENB) in sci_set_termios()
2531 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_set_termios()
2543 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2546 if (sci_getreg(port, HSSRR)->size) { in sci_set_termios()
2551 int last_stop = bits * 2 - 1; in sci_set_termios()
2561 int shift = clamp(deviation / 2, -8, 7); in sci_set_termios()
2571 udelay((1000000 + (baud - 1)) / baud); in sci_set_termios()
2574 scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); in sci_set_termios()
2577 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2581 sci_init_pins(port, termios->c_cflag); in sci_set_termios()
2583 port->status &= ~UPSTAT_AUTOCTS; in sci_set_termios()
2584 s->autorts = false; in sci_set_termios()
2586 if (reg->size) { in sci_set_termios()
2587 unsigned short ctrl = serial_port_in(port, SCFCR); in sci_set_termios() local
2589 if ((port->flags & UPF_HARD_FLOW) && in sci_set_termios()
2590 (termios->c_cflag & CRTSCTS)) { in sci_set_termios()
2592 port->status |= UPSTAT_AUTOCTS; in sci_set_termios()
2594 s->autorts = true; in sci_set_termios()
2602 ctrl &= ~(SCFCR_RFRST | SCFCR_TFRST); in sci_set_termios()
2604 serial_port_out(port, SCFCR, ctrl); in sci_set_termios()
2606 if (port->flags & UPF_HARD_FLOW) { in sci_set_termios()
2608 sci_set_mctrl(port, port->mctrl); in sci_set_termios()
2612 (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)); in sci_set_termios()
2613 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2615 (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) { in sci_set_termios()
2635 s->rx_frame = (10000 * bits) / (baud / 100); in sci_set_termios()
2637 s->rx_timeout = s->buf_len_rx * 2 * s->rx_frame; in sci_set_termios()
2638 if (s->rx_timeout < 20) in sci_set_termios()
2639 s->rx_timeout = 20; in sci_set_termios()
2642 if ((termios->c_cflag & CREAD) != 0) in sci_set_termios()
2645 spin_unlock_irqrestore(&port->lock, flags); in sci_set_termios()
2649 if (UART_ENABLE_MS(port, termios->c_cflag)) in sci_set_termios()
2670 switch (port->type) { in sci_type()
2695 if (port->membase) in sci_remap_port()
2698 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_remap_port()
2699 port->membase = ioremap(port->mapbase, sport->reg_size); in sci_remap_port()
2700 if (unlikely(!port->membase)) { in sci_remap_port()
2701 dev_err(port->dev, "can't remap port#%d\n", port->line); in sci_remap_port()
2702 return -ENXIO; in sci_remap_port()
2710 port->membase = (void __iomem *)(uintptr_t)port->mapbase; in sci_remap_port()
2720 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_release_port()
2721 iounmap(port->membase); in sci_release_port()
2722 port->membase = NULL; in sci_release_port()
2725 release_mem_region(port->mapbase, sport->reg_size); in sci_release_port()
2734 res = request_mem_region(port->mapbase, sport->reg_size, in sci_request_port()
2735 dev_name(port->dev)); in sci_request_port()
2737 dev_err(port->dev, "request_mem_region failed."); in sci_request_port()
2738 return -EBUSY; in sci_request_port()
2755 port->type = sport->cfg->type; in sci_config_port()
2762 if (ser->baud_base < 2400) in sci_verify_port()
2764 return -EINVAL; in sci_verify_port()
2805 if (sci_port->cfg->type == PORT_HSCIF) in sci_init_clocks()
2810 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2811 return -EPROBE_DEFER; in sci_init_clocks()
2819 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2820 return -EPROBE_DEFER; in sci_init_clocks()
2846 sci_port->clks[i] = IS_ERR(clk) ? NULL : clk; in sci_init_clocks()
2856 if (cfg->regtype != SCIx_PROBE_REGTYPE) in sci_probe_regmap()
2857 return &sci_port_params[cfg->regtype]; in sci_probe_regmap()
2859 switch (cfg->type) { in sci_probe_regmap()
2874 * The SH-4 is a bit of a misnomer here, although that's in sci_probe_regmap()
2896 struct uart_port *port = &sci_port->port; in sci_init_single()
2901 sci_port->cfg = p; in sci_init_single()
2903 port->ops = &sci_uart_ops; in sci_init_single()
2904 port->iotype = UPIO_MEM; in sci_init_single()
2905 port->line = index; in sci_init_single()
2906 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SH_SCI_CONSOLE); in sci_init_single()
2910 return -ENOMEM; in sci_init_single()
2912 port->mapbase = res->start; in sci_init_single()
2913 sci_port->reg_size = resource_size(res); in sci_init_single()
2915 for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) { in sci_init_single()
2917 sci_port->irqs[i] = platform_get_irq_optional(dev, i); in sci_init_single()
2919 sci_port->irqs[i] = platform_get_irq(dev, i); in sci_init_single()
2925 * In the non-muxed case, up to 6 interrupt signals might be generated in sci_init_single()
2929 if (sci_port->irqs[0] < 0) in sci_init_single()
2930 return -ENXIO; in sci_init_single()
2932 if (sci_port->irqs[1] < 0) in sci_init_single()
2933 for (i = 1; i < ARRAY_SIZE(sci_port->irqs); i++) in sci_init_single()
2934 sci_port->irqs[i] = sci_port->irqs[0]; in sci_init_single()
2936 sci_port->params = sci_probe_regmap(p); in sci_init_single()
2937 if (unlikely(sci_port->params == NULL)) in sci_init_single()
2938 return -EINVAL; in sci_init_single()
2940 switch (p->type) { in sci_init_single()
2942 sci_port->rx_trigger = 48; in sci_init_single()
2945 sci_port->rx_trigger = 64; in sci_init_single()
2948 sci_port->rx_trigger = 32; in sci_init_single()
2951 if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) in sci_init_single()
2953 sci_port->rx_trigger = 1; in sci_init_single()
2955 sci_port->rx_trigger = 8; in sci_init_single()
2958 sci_port->rx_trigger = 1; in sci_init_single()
2962 sci_port->rx_fifo_timeout = 0; in sci_init_single()
2963 sci_port->hscif_tot = 0; in sci_init_single()
2969 sci_port->sampling_rate_mask = p->sampling_rate in sci_init_single()
2970 ? SCI_SR(p->sampling_rate) in sci_init_single()
2971 : sci_port->params->sampling_rate_mask; in sci_init_single()
2974 ret = sci_init_clocks(sci_port, &dev->dev); in sci_init_single()
2978 port->dev = &dev->dev; in sci_init_single()
2980 pm_runtime_enable(&dev->dev); in sci_init_single()
2983 port->type = p->type; in sci_init_single()
2984 port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags; in sci_init_single()
2985 port->fifosize = sci_port->params->fifosize; in sci_init_single()
2987 if (port->type == PORT_SCI) { in sci_init_single()
2988 if (sci_port->reg_size >= 0x20) in sci_init_single()
2989 port->regshift = 2; in sci_init_single()
2991 port->regshift = 1; in sci_init_single()
2996 * for the multi-IRQ ports, which is where we are primarily in sci_init_single()
3001 port->irq = sci_port->irqs[SCIx_RXI_IRQ]; in sci_init_single()
3002 port->irqflags = 0; in sci_init_single()
3004 port->serial_in = sci_serial_in; in sci_init_single()
3005 port->serial_out = sci_serial_out; in sci_init_single()
3012 pm_runtime_disable(port->port.dev); in sci_cleanup_single()
3029 struct sci_port *sci_port = &sci_ports[co->index]; in serial_console_write()
3030 struct uart_port *port = &sci_port->port; in serial_console_write()
3031 unsigned short bits, ctrl, ctrl_temp; in serial_console_write() local
3035 if (port->sysrq) in serial_console_write()
3038 locked = spin_trylock_irqsave(&port->lock, flags); in serial_console_write()
3040 spin_lock_irqsave(&port->lock, flags); in serial_console_write()
3043 ctrl = serial_port_in(port, SCSCR); in serial_console_write()
3045 (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) | in serial_console_write()
3046 (ctrl & (SCSCR_CKE1 | SCSCR_CKE0)); in serial_console_write()
3047 serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot); in serial_console_write()
3057 serial_port_out(port, SCSCR, ctrl); in serial_console_write()
3060 spin_unlock_irqrestore(&port->lock, flags); in serial_console_write()
3076 if (co->index < 0 || co->index >= SCI_NPORTS) in serial_console_setup()
3077 return -ENODEV; in serial_console_setup()
3079 sci_port = &sci_ports[co->index]; in serial_console_setup()
3080 port = &sci_port->port; in serial_console_setup()
3085 if (!port->ops) in serial_console_setup()
3086 return -ENODEV; in serial_console_setup()
3104 .index = -1,
3113 .index = -1,
3120 const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev); in sci_probe_earlyprintk()
3123 return -EEXIST; in sci_probe_earlyprintk()
3125 early_serial_console.index = pdev->id; in sci_probe_earlyprintk()
3127 sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true); in sci_probe_earlyprintk()
3144 return -EINVAL; in sci_probe_earlyprintk()
3167 unsigned int type = port->port.type; /* uart_remove_... clears it */ in sci_remove()
3169 sci_ports_in_use &= ~BIT(port->port.line); in sci_remove()
3170 uart_remove_one_port(&sci_uart_driver, &port->port); in sci_remove()
3174 if (port->port.fifosize > 1) in sci_remove()
3175 device_remove_file(&dev->dev, &dev_attr_rx_fifo_trigger); in sci_remove()
3177 device_remove_file(&dev->dev, &dev_attr_rx_fifo_timeout); in sci_remove()
3188 /* SoC-specific types */
3190 .compatible = "renesas,scif-r7s72100",
3194 .compatible = "renesas,scif-r7s9210",
3197 /* Family-specific types */
3199 .compatible = "renesas,rcar-gen1-scif",
3202 .compatible = "renesas,rcar-gen2-scif",
3205 .compatible = "renesas,rcar-gen3-scif",
3233 struct device_node *np = pdev->dev.of_node; in sci_parse_dt()
3242 data = of_device_get_match_data(&pdev->dev); in sci_parse_dt()
3244 p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); in sci_parse_dt()
3253 dev_err(&pdev->dev, "failed to get alias id (%d)\n", id); in sci_parse_dt()
3257 dev_err(&pdev->dev, "serial%d out of range\n", id); in sci_parse_dt()
3264 p->type = SCI_OF_TYPE(data); in sci_parse_dt()
3265 p->regtype = SCI_OF_REGTYPE(data); in sci_parse_dt()
3267 sp->has_rtscts = of_property_read_bool(np, "uart-has-rtscts"); in sci_parse_dt()
3281 dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n", in sci_probe_single()
3283 dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); in sci_probe_single()
3284 return -EINVAL; in sci_probe_single()
3288 return -EBUSY; in sci_probe_single()
3304 sciport->gpios = mctrl_gpio_init(&sciport->port, 0); in sci_probe_single()
3305 if (IS_ERR(sciport->gpios)) in sci_probe_single()
3306 return PTR_ERR(sciport->gpios); in sci_probe_single()
3308 if (sciport->has_rtscts) { in sci_probe_single()
3309 if (mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_CTS) || in sci_probe_single()
3310 mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_RTS)) { in sci_probe_single()
3311 dev_err(&dev->dev, "Conflicting RTS/CTS config\n"); in sci_probe_single()
3312 return -EINVAL; in sci_probe_single()
3314 sciport->port.flags |= UPF_HARD_FLOW; in sci_probe_single()
3317 ret = uart_add_one_port(&sci_uart_driver, &sciport->port); in sci_probe_single()
3343 if (dev->dev.of_node) { in sci_probe()
3346 return -EINVAL; in sci_probe()
3348 p = dev->dev.platform_data; in sci_probe()
3350 dev_err(&dev->dev, "no platform data supplied\n"); in sci_probe()
3351 return -EINVAL; in sci_probe()
3354 dev_id = dev->id; in sci_probe()
3364 if (sp->port.fifosize > 1) { in sci_probe()
3365 ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_trigger); in sci_probe()
3369 if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB || in sci_probe()
3370 sp->port.type == PORT_HSCIF) { in sci_probe()
3371 ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_timeout); in sci_probe()
3373 if (sp->port.fifosize > 1) { in sci_probe()
3374 device_remove_file(&dev->dev, in sci_probe()
3394 uart_suspend_port(&sci_uart_driver, &sport->port); in sci_suspend()
3404 uart_resume_port(&sci_uart_driver, &sport->port); in sci_resume()
3415 .name = "sh-sci",
3446 if (!device->port.membase) in early_console_setup()
3447 return -ENODEV; in early_console_setup()
3449 device->port.serial_in = sci_serial_in; in early_console_setup()
3450 device->port.serial_out = sci_serial_out; in early_console_setup()
3451 device->port.type = type; in early_console_setup()
3452 memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port)); in early_console_setup()
3460 device->con->write = serial_console_write; in early_console_setup()
3497 OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup);
3507 MODULE_ALIAS("platform:sh-sci");