Lines Matching +full:event +full:- +full:touch +full:- +full:alt
1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/dma-mapping.h>
22 #include "xhci-trace.h"
23 #include "xhci-mtk.h"
24 #include "xhci-debugfs.h"
25 #include "xhci-dbgcap.h"
43 struct xhci_segment *seg = ring->first_seg; in td_on_ring()
45 if (!td || !td->start_seg) in td_on_ring()
48 if (seg == td->start_seg) in td_on_ring()
50 seg = seg->next; in td_on_ring()
51 } while (seg && seg != ring->first_seg); in td_on_ring()
57 * xhci_handshake - spin reading hc until handshake completes or fails
67 * hardware flakeout), or the register reads as all-ones (hardware removed).
79 return -ENODEV; in xhci_handshake()
94 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce()
98 cmd = readl(&xhci->op_regs->command); in xhci_quiesce()
100 writel(cmd, &xhci->op_regs->command); in xhci_quiesce()
117 ret = xhci_handshake(&xhci->op_regs->status, in xhci_halt()
123 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_halt()
124 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_halt()
136 temp = readl(&xhci->op_regs->command); in xhci_start()
140 writel(temp, &xhci->op_regs->command); in xhci_start()
146 ret = xhci_handshake(&xhci->op_regs->status, in xhci_start()
148 if (ret == -ETIMEDOUT) in xhci_start()
154 xhci->xhc_state = 0; in xhci_start()
172 state = readl(&xhci->op_regs->status); in xhci_reset()
176 return -ENODEV; in xhci_reset()
185 command = readl(&xhci->op_regs->command); in xhci_reset()
187 writel(command, &xhci->op_regs->command); in xhci_reset()
196 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_reset()
199 ret = xhci_handshake(&xhci->op_regs->command, in xhci_reset()
204 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_reset()
205 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller)); in xhci_reset()
213 ret = xhci_handshake(&xhci->op_regs->status, in xhci_reset()
216 xhci->usb2_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
217 xhci->usb2_rhub.bus_state.suspended_ports = 0; in xhci_reset()
218 xhci->usb2_rhub.bus_state.resuming_ports = 0; in xhci_reset()
219 xhci->usb3_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
220 xhci->usb3_rhub.bus_state.suspended_ports = 0; in xhci_reset()
221 xhci->usb3_rhub.bus_state.resuming_ports = 0; in xhci_reset()
228 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_zero_64b_regs()
247 if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !device_iommu_mapped(dev)) in xhci_zero_64b_regs()
253 val = readl(&xhci->op_regs->command); in xhci_zero_64b_regs()
255 writel(val, &xhci->op_regs->command); in xhci_zero_64b_regs()
258 val = readl(&xhci->op_regs->status); in xhci_zero_64b_regs()
260 writel(val, &xhci->op_regs->status); in xhci_zero_64b_regs()
263 val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
265 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
266 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
268 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
270 intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1), in xhci_zero_64b_regs()
271 ARRAY_SIZE(xhci->run_regs->ir_set)); in xhci_zero_64b_regs()
276 ir = &xhci->run_regs->ir_set[i]; in xhci_zero_64b_regs()
277 val = xhci_read_64(xhci, &ir->erst_base); in xhci_zero_64b_regs()
279 xhci_write_64(xhci, 0, &ir->erst_base); in xhci_zero_64b_regs()
280 val= xhci_read_64(xhci, &ir->erst_dequeue); in xhci_zero_64b_regs()
282 xhci_write_64(xhci, 0, &ir->erst_dequeue); in xhci_zero_64b_regs()
286 err = xhci_handshake(&xhci->op_regs->status, in xhci_zero_64b_regs()
303 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); in xhci_setup_msi()
312 ret = request_irq(pdev->irq, xhci_msi_irq, in xhci_setup_msi()
324 * Set up MSI-X
330 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in xhci_setup_msix()
333 * calculate number of msi-x vectors supported. in xhci_setup_msix()
334 * - HCS_MAX_INTRS: the max number of interrupts the host can handle, in xhci_setup_msix()
336 * - num_online_cpus: maximum msi-x vectors per CPUs core. in xhci_setup_msix()
339 xhci->msix_count = min(num_online_cpus() + 1, in xhci_setup_msix()
340 HCS_MAX_INTRS(xhci->hcs_params1)); in xhci_setup_msix()
342 ret = pci_alloc_irq_vectors(pdev, xhci->msix_count, xhci->msix_count, in xhci_setup_msix()
346 "Failed to enable MSI-X"); in xhci_setup_msix()
350 for (i = 0; i < xhci->msix_count; i++) { in xhci_setup_msix()
357 hcd->msix_enabled = 1; in xhci_setup_msix()
361 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt"); in xhci_setup_msix()
362 while (--i >= 0) in xhci_setup_msix()
368 /* Free any IRQs and disable MSI-X */
372 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in xhci_cleanup_msix()
374 if (xhci->quirks & XHCI_PLAT) in xhci_cleanup_msix()
378 if (hcd->irq > 0) in xhci_cleanup_msix()
381 if (hcd->msix_enabled) { in xhci_cleanup_msix()
384 for (i = 0; i < xhci->msix_count; i++) in xhci_cleanup_msix()
391 hcd->msix_enabled = 0; in xhci_cleanup_msix()
398 if (hcd->msix_enabled) { in xhci_msix_sync_irqs()
399 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in xhci_msix_sync_irqs()
402 for (i = 0; i < xhci->msix_count; i++) in xhci_msix_sync_irqs()
414 if (xhci->quirks & XHCI_PLAT) in xhci_try_enable_msi()
417 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); in xhci_try_enable_msi()
422 if (xhci->quirks & XHCI_BROKEN_MSI) in xhci_try_enable_msi()
426 if (hcd->irq) in xhci_try_enable_msi()
427 free_irq(hcd->irq, hcd); in xhci_try_enable_msi()
428 hcd->irq = 0; in xhci_try_enable_msi()
436 hcd->msi_enabled = 1; in xhci_try_enable_msi()
440 if (!pdev->irq) { in xhci_try_enable_msi()
441 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n"); in xhci_try_enable_msi()
442 return -EINVAL; in xhci_try_enable_msi()
446 if (!strlen(hcd->irq_descr)) in xhci_try_enable_msi()
447 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", in xhci_try_enable_msi()
448 hcd->driver->description, hcd->self.busnum); in xhci_try_enable_msi()
451 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, in xhci_try_enable_msi()
452 hcd->irq_descr, hcd); in xhci_try_enable_msi()
455 pdev->irq); in xhci_try_enable_msi()
458 hcd->irq = pdev->irq; in xhci_try_enable_msi()
488 rhub = &xhci->usb3_rhub; in compliance_mode_recovery()
490 for (i = 0; i < rhub->num_ports; i++) { in compliance_mode_recovery()
491 temp = readl(rhub->ports[i]->addr); in compliance_mode_recovery()
498 "Compliance mode detected->port %d", in compliance_mode_recovery()
502 hcd = xhci->shared_hcd; in compliance_mode_recovery()
504 if (hcd->state == HC_STATE_SUSPENDED) in compliance_mode_recovery()
511 if (xhci->port_status_u0 != ((1 << rhub->num_ports) - 1)) in compliance_mode_recovery()
512 mod_timer(&xhci->comp_mode_recovery_timer, in compliance_mode_recovery()
517 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
523 * status event is generated when entering compliance mode (per xhci spec),
528 xhci->port_status_u0 = 0; in compliance_mode_recovery_timer_init()
529 timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery, in compliance_mode_recovery_timer_init()
531 xhci->comp_mode_recovery_timer.expires = jiffies + in compliance_mode_recovery_timer_init()
534 add_timer(&xhci->comp_mode_recovery_timer); in compliance_mode_recovery_timer_init()
541 * USB3.0 re-driver and that need the Compliance Mode Quirk.
543 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
554 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard"))) in xhci_compliance_mode_recovery_timer_quirk_check()
568 return (xhci->port_status_u0 == ((1 << xhci->usb3_rhub.num_ports) - 1)); in xhci_all_ports_seen_u0()
573 * Initialize memory for HCD and xHC (one-time init).
576 * device contexts (?), set up a command ring segment (or two?), create event
585 spin_lock_init(&xhci->lock); in xhci_init()
586 if (xhci->hci_version == 0x95 && link_quirk) { in xhci_init()
589 xhci->quirks |= XHCI_LINK_TRB_QUIRK; in xhci_init()
599 xhci->quirks |= XHCI_COMP_MODE_QUIRK; in xhci_init()
606 /*-------------------------------------------------------------------------*/
613 return -ENODEV; in xhci_run_finished()
615 xhci->shared_hcd->state = HC_STATE_RUNNING; in xhci_run_finished()
616 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; in xhci_run_finished()
618 if (xhci->quirks & XHCI_NEC_HOST) in xhci_run_finished()
634 * set command ring pointer and event ring pointer.
636 * Setup MSI-X vectors and enable interrupts.
649 hcd->uses_new_polling = 1; in xhci_run()
659 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); in xhci_run()
666 temp = readl(&xhci->ir_set->irq_control); in xhci_run()
668 temp |= (xhci->imod_interval / 250) & ER_IRQ_INTERVAL_MASK; in xhci_run()
669 writel(temp, &xhci->ir_set->irq_control); in xhci_run()
672 temp = readl(&xhci->op_regs->command); in xhci_run()
676 writel(temp, &xhci->op_regs->command); in xhci_run()
678 temp = readl(&xhci->ir_set->irq_pending); in xhci_run()
680 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending", in xhci_run()
681 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); in xhci_run()
682 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending); in xhci_run()
684 if (xhci->quirks & XHCI_NEC_HOST) { in xhci_run()
689 return -ENOMEM; in xhci_run()
721 mutex_lock(&xhci->mutex); in xhci_stop()
725 mutex_unlock(&xhci->mutex); in xhci_stop()
731 spin_lock_irq(&xhci->lock); in xhci_stop()
732 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_stop()
733 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_stop()
736 spin_unlock_irq(&xhci->lock); in xhci_stop()
741 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_stop()
743 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_stop()
749 if (xhci->quirks & XHCI_AMD_PLL_FIX) in xhci_stop()
753 "// Disabling event ring interrupts"); in xhci_stop()
754 temp = readl(&xhci->op_regs->status); in xhci_stop()
755 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_stop()
756 temp = readl(&xhci->ir_set->irq_pending); in xhci_stop()
757 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending); in xhci_stop()
763 "xhci_stop completed - status = %x", in xhci_stop()
764 readl(&xhci->op_regs->status)); in xhci_stop()
765 mutex_unlock(&xhci->mutex); in xhci_stop()
769 * Shutdown HC (not bus-specific)
781 if (xhci->quirks & XHCI_SPURIOUS_REBOOT) in xhci_shutdown()
782 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); in xhci_shutdown()
784 spin_lock_irq(&xhci->lock); in xhci_shutdown()
787 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) in xhci_shutdown()
789 spin_unlock_irq(&xhci->lock); in xhci_shutdown()
794 "xhci_shutdown completed - status = %x", in xhci_shutdown()
795 readl(&xhci->op_regs->status)); in xhci_shutdown()
802 xhci->s3.command = readl(&xhci->op_regs->command); in xhci_save_registers()
803 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); in xhci_save_registers()
804 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_save_registers()
805 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); in xhci_save_registers()
806 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size); in xhci_save_registers()
807 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base); in xhci_save_registers()
808 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); in xhci_save_registers()
809 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending); in xhci_save_registers()
810 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control); in xhci_save_registers()
815 writel(xhci->s3.command, &xhci->op_regs->command); in xhci_restore_registers()
816 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); in xhci_restore_registers()
817 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); in xhci_restore_registers()
818 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); in xhci_restore_registers()
819 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size); in xhci_restore_registers()
820 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base); in xhci_restore_registers()
821 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue); in xhci_restore_registers()
822 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending); in xhci_restore_registers()
823 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control); in xhci_restore_registers()
831 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
833 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, in xhci_set_cmd_ring_deq()
834 xhci->cmd_ring->dequeue) & in xhci_set_cmd_ring_deq()
836 xhci->cmd_ring->cycle_state; in xhci_set_cmd_ring_deq()
840 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
847 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
850 * middle of the ring (TRBs are 16-byte aligned).
857 ring = xhci->cmd_ring; in xhci_clear_command_ring()
858 seg = ring->deq_seg; in xhci_clear_command_ring()
860 memset(seg->trbs, 0, in xhci_clear_command_ring()
861 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); in xhci_clear_command_ring()
862 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= in xhci_clear_command_ring()
864 seg = seg->next; in xhci_clear_command_ring()
865 } while (seg != ring->deq_seg); in xhci_clear_command_ring()
868 ring->deq_seg = ring->first_seg; in xhci_clear_command_ring()
869 ring->dequeue = ring->first_seg->trbs; in xhci_clear_command_ring()
870 ring->enq_seg = ring->deq_seg; in xhci_clear_command_ring()
871 ring->enqueue = ring->dequeue; in xhci_clear_command_ring()
873 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; in xhci_clear_command_ring()
878 ring->cycle_state = 1; in xhci_clear_command_ring()
882 * Yes, this will need to be re-written after resume, but we're paranoid in xhci_clear_command_ring()
907 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_hub_port_wake()
909 for (i = 0; i < rhub->num_ports; i++) { in xhci_disable_hub_port_wake()
910 portsc = readl(rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
918 /* Don't touch csc bit if connected or connect change is set */ in xhci_disable_hub_port_wake()
923 writel(t2, rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
924 xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n", in xhci_disable_hub_port_wake()
925 rhub->hcd->self.busnum, i + 1, portsc, t2); in xhci_disable_hub_port_wake()
928 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_hub_port_wake()
938 status = readl(&xhci->op_regs->status); in xhci_pending_portevent()
943 * bit being set and the Port Status Change Event that it generated in xhci_pending_portevent()
944 * being written to the Event Ring. See note in xhci 1.1 section 4.19.2. in xhci_pending_portevent()
947 port_index = xhci->usb2_rhub.num_ports; in xhci_pending_portevent()
948 ports = xhci->usb2_rhub.ports; in xhci_pending_portevent()
949 while (port_index--) { in xhci_pending_portevent()
950 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
955 port_index = xhci->usb3_rhub.num_ports; in xhci_pending_portevent()
956 ports = xhci->usb3_rhub.ports; in xhci_pending_portevent()
957 while (port_index--) { in xhci_pending_portevent()
958 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
967 * Stop HC (not bus-specific)
980 if (!hcd->state) in xhci_suspend()
983 if (hcd->state != HC_STATE_SUSPENDED || in xhci_suspend()
984 xhci->shared_hcd->state != HC_STATE_SUSPENDED) in xhci_suspend()
985 return -EINVAL; in xhci_suspend()
988 xhci_disable_hub_port_wake(xhci, &xhci->usb3_rhub, do_wakeup); in xhci_suspend()
989 xhci_disable_hub_port_wake(xhci, &xhci->usb2_rhub, do_wakeup); in xhci_suspend()
998 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_suspend()
999 del_timer_sync(&hcd->rh_timer); in xhci_suspend()
1000 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_suspend()
1001 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_suspend()
1003 if (xhci->quirks & XHCI_SUSPEND_DELAY) in xhci_suspend()
1006 spin_lock_irq(&xhci->lock); in xhci_suspend()
1007 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_suspend()
1008 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_suspend()
1013 command = readl(&xhci->op_regs->command); in xhci_suspend()
1015 writel(command, &xhci->op_regs->command); in xhci_suspend()
1018 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; in xhci_suspend()
1020 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
1023 spin_unlock_irq(&xhci->lock); in xhci_suspend()
1024 return -ETIMEDOUT; in xhci_suspend()
1032 command = readl(&xhci->op_regs->command); in xhci_suspend()
1034 writel(command, &xhci->op_regs->command); in xhci_suspend()
1035 xhci->broken_suspend = 0; in xhci_suspend()
1036 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
1047 res = readl(&xhci->op_regs->status); in xhci_suspend()
1048 if ((xhci->quirks & XHCI_SNPS_BROKEN_SUSPEND) && in xhci_suspend()
1051 xhci->broken_suspend = 1; in xhci_suspend()
1054 spin_unlock_irq(&xhci->lock); in xhci_suspend()
1055 return -ETIMEDOUT; in xhci_suspend()
1058 spin_unlock_irq(&xhci->lock); in xhci_suspend()
1064 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_suspend()
1066 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_suspend()
1073 /* synchronize irq when using MSI-X */ in xhci_suspend()
1081 * start xHC (not bus-specific)
1095 if (!hcd->state) in xhci_resume()
1102 if (time_before(jiffies, xhci->usb2_rhub.bus_state.next_statechange) || in xhci_resume()
1103 time_before(jiffies, xhci->usb3_rhub.bus_state.next_statechange)) in xhci_resume()
1106 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_resume()
1107 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_resume()
1109 spin_lock_irq(&xhci->lock); in xhci_resume()
1110 if ((xhci->quirks & XHCI_RESET_ON_RESUME) || xhci->broken_suspend) in xhci_resume()
1118 retval = xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1123 spin_unlock_irq(&xhci->lock); in xhci_resume()
1132 command = readl(&xhci->op_regs->command); in xhci_resume()
1134 writel(command, &xhci->op_regs->command); in xhci_resume()
1140 if (xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1143 spin_unlock_irq(&xhci->lock); in xhci_resume()
1144 return -ETIMEDOUT; in xhci_resume()
1146 temp = readl(&xhci->op_regs->status); in xhci_resume()
1149 /* If restore operation fails, re-initialize the HC during resume */ in xhci_resume()
1152 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_resume()
1154 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_resume()
1160 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); in xhci_resume()
1161 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); in xhci_resume()
1167 spin_unlock_irq(&xhci->lock); in xhci_resume()
1172 xhci_dbg(xhci, "// Disabling event ring interrupts\n"); in xhci_resume()
1173 temp = readl(&xhci->op_regs->status); in xhci_resume()
1174 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_resume()
1175 temp = readl(&xhci->ir_set->irq_pending); in xhci_resume()
1176 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending); in xhci_resume()
1181 xhci_dbg(xhci, "xhci_stop completed - status = %x\n", in xhci_resume()
1182 readl(&xhci->op_regs->status)); in xhci_resume()
1191 secondary_hcd = xhci->shared_hcd; in xhci_resume()
1194 retval = xhci_init(hcd->primary_hcd); in xhci_resume()
1200 retval = xhci_run(hcd->primary_hcd); in xhci_resume()
1205 hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1206 xhci->shared_hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1211 command = readl(&xhci->op_regs->command); in xhci_resume()
1213 writel(command, &xhci->op_regs->command); in xhci_resume()
1214 xhci_handshake(&xhci->op_regs->status, STS_HALT, in xhci_resume()
1226 spin_unlock_irq(&xhci->lock); in xhci_resume()
1244 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1250 * be re-initialized Always after a system resume. Ports are subject in xhci_resume()
1254 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running) in xhci_resume()
1257 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_resume()
1258 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller)); in xhci_resume()
1260 /* Re-enable port polling. */ in xhci_resume()
1262 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_resume()
1263 usb_hcd_poll_rh_status(xhci->shared_hcd); in xhci_resume()
1264 set_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_resume()
1272 /*-------------------------------------------------------------------------*/
1290 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1294 * Index = (epnum * 2) + direction - 1,
1297 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1306 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; in xhci_get_endpoint_index()
1346 return fls(added_ctxs) - 1; in xhci_last_valid_endpoint()
1350 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1360 return -EINVAL; in xhci_check_args()
1362 if (!udev->parent) { in xhci_check_args()
1369 if (!udev->slot_id || !xhci->devs[udev->slot_id]) { in xhci_check_args()
1372 return -EINVAL; in xhci_check_args()
1375 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_args()
1376 if (virt_dev->udev != udev) { in xhci_check_args()
1379 return -EINVAL; in xhci_check_args()
1383 if (xhci->xhc_state & XHCI_STATE_HALTED) in xhci_check_args()
1384 return -ENODEV; in xhci_check_args()
1410 out_ctx = xhci->devs[slot_id]->out_ctx; in xhci_check_maxpacket()
1412 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); in xhci_check_maxpacket()
1413 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc); in xhci_check_maxpacket()
1427 /* FIXME: This won't work if a non-default control endpoint in xhci_check_maxpacket()
1433 return -ENOMEM; in xhci_check_maxpacket()
1435 command->in_ctx = xhci->devs[slot_id]->in_ctx; in xhci_check_maxpacket()
1436 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_maxpacket()
1440 ret = -ENOMEM; in xhci_check_maxpacket()
1444 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, in xhci_check_maxpacket()
1445 xhci->devs[slot_id]->out_ctx, ep_index); in xhci_check_maxpacket()
1447 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_check_maxpacket()
1448 ep_ctx->ep_info &= cpu_to_le32(~EP_STATE_MASK);/* must clear */ in xhci_check_maxpacket()
1449 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); in xhci_check_maxpacket()
1450 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); in xhci_check_maxpacket()
1452 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); in xhci_check_maxpacket()
1453 ctrl_ctx->drop_flags = 0; in xhci_check_maxpacket()
1455 ret = xhci_configure_endpoint(xhci, urb->dev, command, in xhci_check_maxpacket()
1461 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); in xhci_check_maxpacket()
1463 kfree(command->completion); in xhci_check_maxpacket()
1470 * non-error returns are a promise to giveback() the urb later
1483 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, in xhci_urb_enqueue()
1485 return -EINVAL; in xhci_urb_enqueue()
1487 slot_id = urb->dev->slot_id; in xhci_urb_enqueue()
1488 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_enqueue()
1489 ep_state = &xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_urb_enqueue()
1494 return -ESHUTDOWN; in xhci_urb_enqueue()
1496 if (xhci->devs[slot_id]->flags & VDEV_PORT_ERROR) { in xhci_urb_enqueue()
1498 return -ENODEV; in xhci_urb_enqueue()
1501 if (usb_endpoint_xfer_isoc(&urb->ep->desc)) in xhci_urb_enqueue()
1502 num_tds = urb->number_of_packets; in xhci_urb_enqueue()
1503 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && in xhci_urb_enqueue()
1504 urb->transfer_buffer_length > 0 && in xhci_urb_enqueue()
1505 urb->transfer_flags & URB_ZERO_PACKET && in xhci_urb_enqueue()
1506 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) in xhci_urb_enqueue()
1513 return -ENOMEM; in xhci_urb_enqueue()
1515 urb_priv->num_tds = num_tds; in xhci_urb_enqueue()
1516 urb_priv->num_tds_done = 0; in xhci_urb_enqueue()
1517 urb->hcpriv = urb_priv; in xhci_urb_enqueue()
1521 if (usb_endpoint_xfer_control(&urb->ep->desc)) { in xhci_urb_enqueue()
1525 if (urb->dev->speed == USB_SPEED_FULL) { in xhci_urb_enqueue()
1530 urb->hcpriv = NULL; in xhci_urb_enqueue()
1536 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_enqueue()
1538 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_enqueue()
1539 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n", in xhci_urb_enqueue()
1540 urb->ep->desc.bEndpointAddress, urb); in xhci_urb_enqueue()
1541 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1547 ret = -EINVAL; in xhci_urb_enqueue()
1552 ret = -EINVAL; in xhci_urb_enqueue()
1556 switch (usb_endpoint_type(&urb->ep->desc)) { in xhci_urb_enqueue()
1578 urb->hcpriv = NULL; in xhci_urb_enqueue()
1580 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_enqueue()
1600 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1630 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_dequeue()
1640 vdev = xhci->devs[urb->dev->slot_id]; in xhci_urb_dequeue()
1641 urb_priv = urb->hcpriv; in xhci_urb_dequeue()
1645 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_dequeue()
1646 ep = &vdev->eps[ep_index]; in xhci_urb_dequeue()
1652 temp = readl(&xhci->op_regs->status); in xhci_urb_dequeue()
1653 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_dequeue()
1659 * check ring is not re-allocated since URB was enqueued. If it is, then in xhci_urb_dequeue()
1663 if (!td_on_ring(&urb_priv->td[0], ep_ring)) { in xhci_urb_dequeue()
1665 for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1666 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1667 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1668 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1673 if (xhci->xhc_state & XHCI_STATE_HALTED) { in xhci_urb_dequeue()
1676 for (i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1677 i < urb_priv->num_tds; in xhci_urb_dequeue()
1679 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1680 if (!list_empty(&td->td_list)) in xhci_urb_dequeue()
1681 list_del_init(&td->td_list); in xhci_urb_dequeue()
1682 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1683 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1688 i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1689 if (i < urb_priv->num_tds) in xhci_urb_dequeue()
1693 urb, urb->dev->devpath, in xhci_urb_dequeue()
1694 urb->ep->desc.bEndpointAddress, in xhci_urb_dequeue()
1696 urb_priv->td[i].start_seg, in xhci_urb_dequeue()
1697 urb_priv->td[i].first_trb)); in xhci_urb_dequeue()
1699 for (; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1700 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1701 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list); in xhci_urb_dequeue()
1707 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) { in xhci_urb_dequeue()
1710 ret = -ENOMEM; in xhci_urb_dequeue()
1713 ep->ep_state |= EP_STOP_CMD_PENDING; in xhci_urb_dequeue()
1714 ep->stop_cmd_timer.expires = jiffies + in xhci_urb_dequeue()
1716 add_timer(&ep->stop_cmd_timer); in xhci_urb_dequeue()
1717 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, in xhci_urb_dequeue()
1722 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1729 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1730 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); in xhci_urb_dequeue()
1745 * the xhci->devs[slot_id] structure.
1763 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_drop_endpoint()
1764 return -ENODEV; in xhci_drop_endpoint()
1767 drop_flag = xhci_get_endpoint_flag(&ep->desc); in xhci_drop_endpoint()
1769 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", in xhci_drop_endpoint()
1774 in_ctx = xhci->devs[udev->slot_id]->in_ctx; in xhci_drop_endpoint()
1775 out_ctx = xhci->devs[udev->slot_id]->out_ctx; in xhci_drop_endpoint()
1783 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_drop_endpoint()
1789 le32_to_cpu(ctrl_ctx->drop_flags) & in xhci_drop_endpoint()
1790 xhci_get_endpoint_flag(&ep->desc)) { in xhci_drop_endpoint()
1792 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL) in xhci_drop_endpoint()
1798 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); in xhci_drop_endpoint()
1799 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_drop_endpoint()
1801 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); in xhci_drop_endpoint()
1802 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_drop_endpoint()
1804 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index); in xhci_drop_endpoint()
1806 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); in xhci_drop_endpoint()
1808 if (xhci->quirks & XHCI_MTK_HOST) in xhci_drop_endpoint()
1812 (unsigned int) ep->desc.bEndpointAddress, in xhci_drop_endpoint()
1813 udev->slot_id, in xhci_drop_endpoint()
1829 * configuration or alt setting is installed in the device, so there's no need
1830 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1848 ep->hcpriv = NULL; in xhci_add_endpoint()
1852 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_add_endpoint()
1853 return -ENODEV; in xhci_add_endpoint()
1855 added_ctxs = xhci_get_endpoint_flag(&ep->desc); in xhci_add_endpoint()
1861 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", in xhci_add_endpoint()
1866 virt_dev = xhci->devs[udev->slot_id]; in xhci_add_endpoint()
1867 in_ctx = virt_dev->in_ctx; in xhci_add_endpoint()
1875 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_add_endpoint()
1879 if (virt_dev->eps[ep_index].ring && in xhci_add_endpoint()
1880 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) { in xhci_add_endpoint()
1883 (unsigned int) ep->desc.bEndpointAddress); in xhci_add_endpoint()
1884 return -EINVAL; in xhci_add_endpoint()
1890 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) { in xhci_add_endpoint()
1902 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", in xhci_add_endpoint()
1903 __func__, ep->desc.bEndpointAddress); in xhci_add_endpoint()
1904 return -ENOMEM; in xhci_add_endpoint()
1907 if (xhci->quirks & XHCI_MTK_HOST) { in xhci_add_endpoint()
1910 xhci_ring_free(xhci, virt_dev->eps[ep_index].new_ring); in xhci_add_endpoint()
1911 virt_dev->eps[ep_index].new_ring = NULL; in xhci_add_endpoint()
1916 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); in xhci_add_endpoint()
1917 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_add_endpoint()
1921 * this re-adds a new state for the endpoint from the new endpoint in xhci_add_endpoint()
1922 * descriptors. We must drop and re-add this endpoint, so we leave the in xhci_add_endpoint()
1925 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_add_endpoint()
1928 ep->hcpriv = udev; in xhci_add_endpoint()
1930 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_add_endpoint()
1934 (unsigned int) ep->desc.bEndpointAddress, in xhci_add_endpoint()
1935 udev->slot_id, in xhci_add_endpoint()
1948 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_zero_in_ctx()
1960 ctrl_ctx->drop_flags = 0; in xhci_zero_in_ctx()
1961 ctrl_ctx->add_flags = 0; in xhci_zero_in_ctx()
1962 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_zero_in_ctx()
1963 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_zero_in_ctx()
1965 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); in xhci_zero_in_ctx()
1967 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); in xhci_zero_in_ctx()
1968 ep_ctx->ep_info = 0; in xhci_zero_in_ctx()
1969 ep_ctx->ep_info2 = 0; in xhci_zero_in_ctx()
1970 ep_ctx->deq = 0; in xhci_zero_in_ctx()
1971 ep_ctx->tx_info = 0; in xhci_zero_in_ctx()
1984 ret = -ETIME; in xhci_configure_endpoint_result()
1987 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
1989 ret = -ENOMEM; in xhci_configure_endpoint_result()
1994 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
1996 ret = -ENOSPC; in xhci_configure_endpoint_result()
2001 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " in xhci_configure_endpoint_result()
2004 ret = -EINVAL; in xhci_configure_endpoint_result()
2007 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2009 ret = -ENODEV; in xhci_configure_endpoint_result()
2019 ret = -EINVAL; in xhci_configure_endpoint_result()
2034 ret = -ETIME; in xhci_evaluate_context_result()
2037 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2039 ret = -EINVAL; in xhci_evaluate_context_result()
2042 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2044 ret = -EINVAL; in xhci_evaluate_context_result()
2047 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2049 ret = -EINVAL; in xhci_evaluate_context_result()
2052 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2054 ret = -ENODEV; in xhci_evaluate_context_result()
2058 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); in xhci_evaluate_context_result()
2059 ret = -EINVAL; in xhci_evaluate_context_result()
2069 ret = -EINVAL; in xhci_evaluate_context_result()
2085 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_new_endpoints()
2086 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_new_endpoints()
2092 return hweight32(valid_add_flags) - in xhci_count_num_new_endpoints()
2102 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_dropped_endpoints()
2103 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_dropped_endpoints()
2105 return hweight32(valid_drop_flags) - in xhci_count_num_dropped_endpoints()
2115 * - the first configure endpoint command drops more endpoints than it adds
2116 * - a second configure endpoint command that adds more endpoints is queued
2117 * - the first configure endpoint command fails, so the config is unchanged
2118 * - the second command may succeed, even though there isn't enough resources
2120 * Must be called with xhci->lock held.
2128 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { in xhci_reserve_host_resources()
2132 xhci->num_active_eps, added_eps, in xhci_reserve_host_resources()
2133 xhci->limit_active_eps); in xhci_reserve_host_resources()
2134 return -ENOMEM; in xhci_reserve_host_resources()
2136 xhci->num_active_eps += added_eps; in xhci_reserve_host_resources()
2139 xhci->num_active_eps); in xhci_reserve_host_resources()
2147 * Must be called with xhci->lock held.
2155 xhci->num_active_eps -= num_failed_eps; in xhci_free_host_resources()
2159 xhci->num_active_eps); in xhci_free_host_resources()
2166 * Must be called with xhci->lock held.
2174 xhci->num_active_eps -= num_dropped_eps; in xhci_finish_resource_reservation()
2179 xhci->num_active_eps); in xhci_finish_resource_reservation()
2184 switch (udev->speed) { in xhci_get_block_size()
2204 if (interval_bw->overhead[LS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2206 if (interval_bw->overhead[FS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2223 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table; in xhci_check_tt_bw_table()
2224 tt_info = virt_dev->tt_info; in xhci_check_tt_bw_table()
2231 if (old_active_eps == 0 && tt_info->active_eps != 0) { in xhci_check_tt_bw_table()
2232 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) in xhci_check_tt_bw_table()
2233 return -ENOMEM; in xhci_check_tt_bw_table()
2251 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) in xhci_check_ss_bw()
2252 return -ENOMEM; in xhci_check_ss_bw()
2255 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) in xhci_check_ss_bw()
2256 return -ENOMEM; in xhci_check_ss_bw()
2262 * This algorithm is a very conservative estimate of the worst-case scheduling
2270 * over-estimate.
2317 if (virt_dev->udev->speed >= USB_SPEED_SUPER) in xhci_check_bw_table()
2320 if (virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2329 bw_table = virt_dev->bw_table; in xhci_check_bw_table()
2333 block_size = xhci_get_block_size(virt_dev->udev); in xhci_check_bw_table()
2338 if (virt_dev->tt_info) { in xhci_check_bw_table()
2341 virt_dev->real_port); in xhci_check_bw_table()
2345 return -ENOMEM; in xhci_check_bw_table()
2349 virt_dev->tt_info->slot_id, in xhci_check_bw_table()
2350 virt_dev->tt_info->ttport); in xhci_check_bw_table()
2354 virt_dev->real_port); in xhci_check_bw_table()
2360 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + in xhci_check_bw_table()
2361 bw_table->interval_bw[0].num_packets * in xhci_check_bw_table()
2362 xhci_get_largest_overhead(&bw_table->interval_bw[0]); in xhci_check_bw_table()
2375 bw_table->interval_bw[i].num_packets; in xhci_check_bw_table()
2380 if (list_empty(&bw_table->interval_bw[i].endpoints)) in xhci_check_bw_table()
2386 ep_entry = bw_table->interval_bw[i].endpoints.next; in xhci_check_bw_table()
2391 virt_ep->bw_info.max_packet_size, in xhci_check_bw_table()
2399 &bw_table->interval_bw[i]); in xhci_check_bw_table()
2438 return -ENOMEM; in xhci_check_bw_table()
2442 * Ok, we know we have some packets left over after even-handedly in xhci_check_bw_table()
2444 * fit into, so we over-schedule and say they will be scheduled every in xhci_check_bw_table()
2450 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2451 unsigned int port_index = virt_dev->real_port - 1; in xhci_check_bw_table()
2458 xhci->rh_bw[port_index].num_active_tts; in xhci_check_bw_table()
2465 (max_bandwidth - bw_used - bw_reserved) * 100 / in xhci_check_bw_table()
2472 return -ENOMEM; in xhci_check_bw_table()
2475 bw_table->bw_used = bw_used; in xhci_check_bw_table()
2493 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); in xhci_get_ss_bw_consumed()
2495 if (ep_bw->ep_interval == 0) in xhci_get_ss_bw_consumed()
2497 (ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2499 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2501 1 << ep_bw->ep_interval); in xhci_get_ss_bw_consumed()
2515 if (xhci_is_async_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2518 if (udev->speed >= USB_SPEED_SUPER) { in xhci_drop_ep_from_interval_table()
2519 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2520 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= in xhci_drop_ep_from_interval_table()
2523 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= in xhci_drop_ep_from_interval_table()
2531 if (list_empty(&virt_ep->bw_endpoint_list)) in xhci_drop_ep_from_interval_table()
2536 if (udev->speed == USB_SPEED_HIGH) in xhci_drop_ep_from_interval_table()
2537 normalized_interval = ep_bw->ep_interval; in xhci_drop_ep_from_interval_table()
2539 normalized_interval = ep_bw->ep_interval - 3; in xhci_drop_ep_from_interval_table()
2542 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; in xhci_drop_ep_from_interval_table()
2543 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_drop_ep_from_interval_table()
2544 interval_bw->num_packets -= ep_bw->num_packets; in xhci_drop_ep_from_interval_table()
2545 switch (udev->speed) { in xhci_drop_ep_from_interval_table()
2547 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2550 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2553 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2565 tt_info->active_eps -= 1; in xhci_drop_ep_from_interval_table()
2566 list_del_init(&virt_ep->bw_endpoint_list); in xhci_drop_ep_from_interval_table()
2580 if (xhci_is_async_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2583 if (udev->speed == USB_SPEED_SUPER) { in xhci_add_ep_to_interval_table()
2584 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2585 xhci->devs[udev->slot_id]->bw_table->ss_bw_in += in xhci_add_ep_to_interval_table()
2588 xhci->devs[udev->slot_id]->bw_table->ss_bw_out += in xhci_add_ep_to_interval_table()
2596 if (udev->speed == USB_SPEED_HIGH) in xhci_add_ep_to_interval_table()
2597 normalized_interval = ep_bw->ep_interval; in xhci_add_ep_to_interval_table()
2599 normalized_interval = ep_bw->ep_interval - 3; in xhci_add_ep_to_interval_table()
2602 bw_table->interval0_esit_payload += ep_bw->max_esit_payload; in xhci_add_ep_to_interval_table()
2603 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_add_ep_to_interval_table()
2604 interval_bw->num_packets += ep_bw->num_packets; in xhci_add_ep_to_interval_table()
2605 switch (udev->speed) { in xhci_add_ep_to_interval_table()
2607 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2610 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2613 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2626 tt_info->active_eps += 1; in xhci_add_ep_to_interval_table()
2628 list_for_each_entry(smaller_ep, &interval_bw->endpoints, in xhci_add_ep_to_interval_table()
2630 if (ep_bw->max_packet_size >= in xhci_add_ep_to_interval_table()
2631 smaller_ep->bw_info.max_packet_size) { in xhci_add_ep_to_interval_table()
2633 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2634 &smaller_ep->bw_endpoint_list); in xhci_add_ep_to_interval_table()
2639 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2640 &interval_bw->endpoints); in xhci_add_ep_to_interval_table()
2648 if (!virt_dev->tt_info) in xhci_update_tt_active_eps()
2651 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1]; in xhci_update_tt_active_eps()
2653 virt_dev->tt_info->active_eps != 0) { in xhci_update_tt_active_eps()
2654 rh_bw_info->num_active_tts += 1; in xhci_update_tt_active_eps()
2655 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2657 virt_dev->tt_info->active_eps == 0) { in xhci_update_tt_active_eps()
2658 rh_bw_info->num_active_tts -= 1; in xhci_update_tt_active_eps()
2659 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2672 if (virt_dev->tt_info) in xhci_reserve_bandwidth()
2673 old_active_eps = virt_dev->tt_info->active_eps; in xhci_reserve_bandwidth()
2679 return -ENOMEM; in xhci_reserve_bandwidth()
2687 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2694 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2695 virt_dev->bw_table, in xhci_reserve_bandwidth()
2696 virt_dev->udev, in xhci_reserve_bandwidth()
2697 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2698 virt_dev->tt_info); in xhci_reserve_bandwidth()
2701 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); in xhci_reserve_bandwidth()
2706 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2707 virt_dev->bw_table, in xhci_reserve_bandwidth()
2708 virt_dev->udev, in xhci_reserve_bandwidth()
2709 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2710 virt_dev->tt_info); in xhci_reserve_bandwidth()
2731 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2732 virt_dev->bw_table, in xhci_reserve_bandwidth()
2733 virt_dev->udev, in xhci_reserve_bandwidth()
2734 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2735 virt_dev->tt_info); in xhci_reserve_bandwidth()
2738 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], in xhci_reserve_bandwidth()
2743 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2744 virt_dev->bw_table, in xhci_reserve_bandwidth()
2745 virt_dev->udev, in xhci_reserve_bandwidth()
2746 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2747 virt_dev->tt_info); in xhci_reserve_bandwidth()
2749 return -ENOMEM; in xhci_reserve_bandwidth()
2768 return -EINVAL; in xhci_configure_endpoint()
2770 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2772 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_configure_endpoint()
2773 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2774 return -ESHUTDOWN; in xhci_configure_endpoint()
2777 virt_dev = xhci->devs[udev->slot_id]; in xhci_configure_endpoint()
2779 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_configure_endpoint()
2781 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2784 return -ENOMEM; in xhci_configure_endpoint()
2787 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && in xhci_configure_endpoint()
2789 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2792 xhci->num_active_eps); in xhci_configure_endpoint()
2793 return -ENOMEM; in xhci_configure_endpoint()
2795 if ((xhci->quirks & XHCI_SW_BW_CHECKING) && in xhci_configure_endpoint()
2796 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) { in xhci_configure_endpoint()
2797 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2799 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2801 return -ENOMEM; in xhci_configure_endpoint()
2804 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_configure_endpoint()
2811 command->in_ctx->dma, in xhci_configure_endpoint()
2812 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2815 command->in_ctx->dma, in xhci_configure_endpoint()
2816 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2818 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2820 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2823 return -ENOMEM; in xhci_configure_endpoint()
2826 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2829 wait_for_completion(command->completion); in xhci_configure_endpoint()
2833 &command->status); in xhci_configure_endpoint()
2836 &command->status); in xhci_configure_endpoint()
2838 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_configure_endpoint()
2839 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2847 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2855 struct xhci_virt_ep *ep = &vdev->eps[i]; in xhci_check_bw_drop_ep_streams()
2857 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_check_bw_drop_ep_streams()
2860 xhci_free_stream_info(xhci, ep->stream_info); in xhci_check_bw_drop_ep_streams()
2861 ep->stream_info = NULL; in xhci_check_bw_drop_ep_streams()
2862 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_check_bw_drop_ep_streams()
2871 * installing a new alt setting, the USB core won't allow URBs to be
2873 * else should be touching the xhci->devs[slot_id] structure, so we
2874 * don't need to take the xhci->lock for manipulating that.
2890 if ((xhci->xhc_state & XHCI_STATE_DYING) || in xhci_check_bandwidth()
2891 (xhci->xhc_state & XHCI_STATE_REMOVING)) in xhci_check_bandwidth()
2892 return -ENODEV; in xhci_check_bandwidth()
2895 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_bandwidth()
2899 return -ENOMEM; in xhci_check_bandwidth()
2901 command->in_ctx = virt_dev->in_ctx; in xhci_check_bandwidth()
2903 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ in xhci_check_bandwidth()
2904 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_bandwidth()
2908 ret = -ENOMEM; in xhci_check_bandwidth()
2911 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_check_bandwidth()
2912 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); in xhci_check_bandwidth()
2913 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); in xhci_check_bandwidth()
2916 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && in xhci_check_bandwidth()
2917 ctrl_ctx->drop_flags == 0) { in xhci_check_bandwidth()
2922 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_check_bandwidth()
2923 for (i = 31; i >= 1; i--) { in xhci_check_bandwidth()
2926 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32)) in xhci_check_bandwidth()
2927 || (ctrl_ctx->add_flags & le32) || i == 1) { in xhci_check_bandwidth()
2928 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_check_bandwidth()
2929 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i)); in xhci_check_bandwidth()
2942 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && in xhci_check_bandwidth()
2943 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { in xhci_check_bandwidth()
2954 if (!virt_dev->eps[i].new_ring) in xhci_check_bandwidth()
2959 if (virt_dev->eps[i].ring) { in xhci_check_bandwidth()
2963 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; in xhci_check_bandwidth()
2964 virt_dev->eps[i].new_ring = NULL; in xhci_check_bandwidth()
2968 kfree(command->completion); in xhci_check_bandwidth()
2986 virt_dev = xhci->devs[udev->slot_id]; in xhci_reset_bandwidth()
2989 if (virt_dev->eps[i].new_ring) { in xhci_reset_bandwidth()
2991 xhci_ring_free(xhci, virt_dev->eps[i].new_ring); in xhci_reset_bandwidth()
2992 virt_dev->eps[i].new_ring = NULL; in xhci_reset_bandwidth()
3004 ctrl_ctx->add_flags = cpu_to_le32(add_flags); in xhci_setup_input_ctx_for_config_ep()
3005 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); in xhci_setup_input_ctx_for_config_ep()
3007 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_setup_input_ctx_for_config_ep()
3020 in_ctx = xhci->devs[slot_id]->in_ctx; in xhci_setup_input_ctx_for_quirk()
3028 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, in xhci_setup_input_ctx_for_quirk()
3029 xhci->devs[slot_id]->out_ctx, ep_index); in xhci_setup_input_ctx_for_quirk()
3031 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg, in xhci_setup_input_ctx_for_quirk()
3032 deq_state->new_deq_ptr); in xhci_setup_input_ctx_for_quirk()
3037 deq_state->new_deq_seg, in xhci_setup_input_ctx_for_quirk()
3038 deq_state->new_deq_ptr); in xhci_setup_input_ctx_for_quirk()
3041 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state); in xhci_setup_input_ctx_for_quirk()
3044 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx, in xhci_setup_input_ctx_for_quirk()
3045 xhci->devs[slot_id]->out_ctx, ctrl_ctx, in xhci_setup_input_ctx_for_quirk()
3069 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) { in xhci_cleanup_stalled_ring()
3100 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_disable()
3102 udev = (struct usb_device *)host_ep->hcpriv; in xhci_endpoint_disable()
3103 if (!udev || !udev->slot_id) in xhci_endpoint_disable()
3106 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_disable()
3110 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_disable()
3111 ep = &vdev->eps[ep_index]; in xhci_endpoint_disable()
3116 if (ep->ep_state & EP_CLEARING_TT) { in xhci_endpoint_disable()
3117 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3122 if (ep->ep_state) in xhci_endpoint_disable()
3124 ep->ep_state); in xhci_endpoint_disable()
3126 host_ep->hcpriv = NULL; in xhci_endpoint_disable()
3127 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3133 * command issued when the STALL event was received.
3157 if (!host_ep->hcpriv) in xhci_endpoint_reset()
3159 udev = (struct usb_device *) host_ep->hcpriv; in xhci_endpoint_reset()
3160 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3163 * vdev may be lost due to xHC restore error and re-initialization in xhci_endpoint_reset()
3167 if (!udev->slot_id || !vdev) in xhci_endpoint_reset()
3169 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_reset()
3170 ep = &vdev->eps[ep_index]; in xhci_endpoint_reset()
3175 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3176 if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) { in xhci_endpoint_reset()
3177 ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE; in xhci_endpoint_reset()
3178 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3181 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3182 /* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */ in xhci_endpoint_reset()
3183 if (usb_endpoint_xfer_control(&host_ep->desc) || in xhci_endpoint_reset()
3184 usb_endpoint_xfer_isoc(&host_ep->desc)) in xhci_endpoint_reset()
3187 ep_flag = xhci_get_endpoint_flag(&host_ep->desc); in xhci_endpoint_reset()
3200 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3203 ep->ep_state |= EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3211 if (!list_empty(&ep->ring->td_list)) { in xhci_endpoint_reset()
3212 dev_err(&udev->dev, "EP not empty, refuse reset\n"); in xhci_endpoint_reset()
3213 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3218 err = xhci_queue_stop_endpoint(xhci, stop_cmd, udev->slot_id, in xhci_endpoint_reset()
3221 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3229 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3231 wait_for_completion(stop_cmd->completion); in xhci_endpoint_reset()
3233 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3236 ctrl_ctx = xhci_get_input_control_ctx(cfg_cmd->in_ctx); in xhci_endpoint_reset()
3238 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3245 xhci_setup_input_ctx_for_config_ep(xhci, cfg_cmd->in_ctx, vdev->out_ctx, in xhci_endpoint_reset()
3247 xhci_endpoint_copy(xhci, cfg_cmd->in_ctx, vdev->out_ctx, ep_index); in xhci_endpoint_reset()
3249 err = xhci_queue_configure_endpoint(xhci, cfg_cmd, cfg_cmd->in_ctx->dma, in xhci_endpoint_reset()
3250 udev->slot_id, false); in xhci_endpoint_reset()
3252 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3260 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3262 wait_for_completion(cfg_cmd->completion); in xhci_endpoint_reset()
3267 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3268 if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE) in xhci_endpoint_reset()
3269 ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3270 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3282 return -EINVAL; in xhci_check_streams_endpoint()
3285 return -EINVAL; in xhci_check_streams_endpoint()
3286 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) { in xhci_check_streams_endpoint()
3289 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3290 return -EINVAL; in xhci_check_streams_endpoint()
3293 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_check_streams_endpoint()
3294 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_check_streams_endpoint()
3299 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3302 return -EINVAL; in xhci_check_streams_endpoint()
3304 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { in xhci_check_streams_endpoint()
3307 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3308 return -EINVAL; in xhci_check_streams_endpoint()
3326 max_streams = HCC_MAX_PSA(xhci->hcc_params); in xhci_calculate_streams_entries()
3351 eps[i], udev->slot_id); in xhci_calculate_streams_and_bitmask()
3355 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); in xhci_calculate_streams_and_bitmask()
3356 if (max_streams < (*num_streams - 1)) { in xhci_calculate_streams_and_bitmask()
3358 eps[i]->desc.bEndpointAddress, in xhci_calculate_streams_and_bitmask()
3363 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_streams_and_bitmask()
3365 return -EINVAL; in xhci_calculate_streams_and_bitmask()
3381 slot_id = udev->slot_id; in xhci_calculate_no_streams_bitmask()
3382 if (!xhci->devs[slot_id]) in xhci_calculate_no_streams_bitmask()
3386 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3387 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_calculate_no_streams_bitmask()
3393 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3402 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3404 "with non-streams endpoint\n"); in xhci_calculate_no_streams_bitmask()
3407 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3444 return -EINVAL; in xhci_alloc_streams()
3455 if ((xhci->quirks & XHCI_BROKEN_STREAMS) || in xhci_alloc_streams()
3456 HCC_MAX_PSA(xhci->hcc_params) < 4) { in xhci_alloc_streams()
3458 return -ENOSYS; in xhci_alloc_streams()
3463 return -ENOMEM; in xhci_alloc_streams()
3465 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_alloc_streams()
3470 return -ENOMEM; in xhci_alloc_streams()
3477 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3482 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3489 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3490 return -EINVAL; in xhci_alloc_streams()
3492 vdev = xhci->devs[udev->slot_id]; in xhci_alloc_streams()
3497 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3498 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; in xhci_alloc_streams()
3500 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3511 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3512 max_packet = usb_endpoint_maxp(&eps[i]->desc); in xhci_alloc_streams()
3513 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, in xhci_alloc_streams()
3517 if (!vdev->eps[ep_index].stream_info) in xhci_alloc_streams()
3528 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3529 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); in xhci_alloc_streams()
3531 xhci_endpoint_copy(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3532 vdev->out_ctx, ep_index); in xhci_alloc_streams()
3534 vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3539 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3540 vdev->out_ctx, ctrl_ctx, in xhci_alloc_streams()
3554 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3556 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3557 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3559 udev->slot_id, ep_index); in xhci_alloc_streams()
3560 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; in xhci_alloc_streams()
3563 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3566 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3570 return num_streams - 1; in xhci_alloc_streams()
3575 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3576 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3577 vdev->eps[ep_index].stream_info = NULL; in xhci_alloc_streams()
3581 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3582 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_alloc_streams()
3586 return -ENOMEM; in xhci_alloc_streams()
3609 vdev = xhci->devs[udev->slot_id]; in xhci_free_streams()
3612 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3616 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3617 return -EINVAL; in xhci_free_streams()
3624 ep_index = xhci_get_endpoint_index(&eps[0]->desc); in xhci_free_streams()
3625 command = vdev->eps[ep_index].stream_info->free_streams_command; in xhci_free_streams()
3626 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_free_streams()
3628 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3631 return -EINVAL; in xhci_free_streams()
3637 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3638 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_free_streams()
3639 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= in xhci_free_streams()
3642 xhci_endpoint_copy(xhci, command->in_ctx, in xhci_free_streams()
3643 vdev->out_ctx, ep_index); in xhci_free_streams()
3645 &vdev->eps[ep_index]); in xhci_free_streams()
3647 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, in xhci_free_streams()
3648 vdev->out_ctx, ctrl_ctx, in xhci_free_streams()
3650 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3664 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3666 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3667 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_free_streams()
3668 vdev->eps[ep_index].stream_info = NULL; in xhci_free_streams()
3672 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; in xhci_free_streams()
3673 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_free_streams()
3675 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3685 * Must be called with xhci->lock held.
3695 if (virt_dev->eps[i].ring) { in xhci_free_device_endpoint_resources()
3700 xhci->num_active_eps -= num_dropped_eps; in xhci_free_device_endpoint_resources()
3706 xhci->num_active_eps); in xhci_free_device_endpoint_resources()
3713 * xhci_address_device(), and then re-set up the configuration. If this is
3715 * settings will be re-installed through the normal bandwidth allocation
3724 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3725 * re-allocate the device.
3743 slot_id = udev->slot_id; in xhci_discover_or_reset_device()
3744 virt_dev = xhci->devs[slot_id]; in xhci_discover_or_reset_device()
3747 "not exist. Re-allocate the device\n", slot_id); in xhci_discover_or_reset_device()
3752 return -EINVAL; in xhci_discover_or_reset_device()
3755 if (virt_dev->tt_info) in xhci_discover_or_reset_device()
3756 old_active_eps = virt_dev->tt_info->active_eps; in xhci_discover_or_reset_device()
3758 if (virt_dev->udev != udev) { in xhci_discover_or_reset_device()
3761 * Re-allocate the device. in xhci_discover_or_reset_device()
3764 "not match the udev. Re-allocate the device\n", in xhci_discover_or_reset_device()
3770 return -EINVAL; in xhci_discover_or_reset_device()
3774 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_discover_or_reset_device()
3775 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_discover_or_reset_device()
3791 return -ENOMEM; in xhci_discover_or_reset_device()
3795 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3800 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3804 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3807 wait_for_completion(reset_device_cmd->completion); in xhci_discover_or_reset_device()
3813 ret = reset_device_cmd->status; in xhci_discover_or_reset_device()
3818 ret = -ETIME; in xhci_discover_or_reset_device()
3824 xhci_get_slot_state(xhci, virt_dev->out_ctx)); in xhci_discover_or_reset_device()
3837 ret = -EINVAL; in xhci_discover_or_reset_device()
3842 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_discover_or_reset_device()
3843 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3846 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3851 struct xhci_virt_ep *ep = &virt_dev->eps[i]; in xhci_discover_or_reset_device()
3853 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_discover_or_reset_device()
3856 xhci_free_stream_info(xhci, ep->stream_info); in xhci_discover_or_reset_device()
3857 ep->stream_info = NULL; in xhci_discover_or_reset_device()
3858 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_discover_or_reset_device()
3861 if (ep->ring) { in xhci_discover_or_reset_device()
3865 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) in xhci_discover_or_reset_device()
3867 &virt_dev->eps[i].bw_info, in xhci_discover_or_reset_device()
3868 virt_dev->bw_table, in xhci_discover_or_reset_device()
3870 &virt_dev->eps[i], in xhci_discover_or_reset_device()
3871 virt_dev->tt_info); in xhci_discover_or_reset_device()
3872 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); in xhci_discover_or_reset_device()
3876 virt_dev->flags = 0; in xhci_discover_or_reset_device()
3901 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_free_dev()
3902 pm_runtime_put_noidle(hcd->self.controller); in xhci_free_dev()
3908 if (ret <= 0 && ret != -ENODEV) in xhci_free_dev()
3911 virt_dev = xhci->devs[udev->slot_id]; in xhci_free_dev()
3912 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_free_dev()
3917 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING; in xhci_free_dev()
3918 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer); in xhci_free_dev()
3920 virt_dev->udev = NULL; in xhci_free_dev()
3921 xhci_disable_slot(xhci, udev->slot_id); in xhci_free_dev()
3922 xhci_free_virt_device(xhci, udev->slot_id); in xhci_free_dev()
3934 return -ENOMEM; in xhci_disable_slot()
3938 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_slot()
3940 state = readl(&xhci->op_regs->status); in xhci_disable_slot()
3941 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || in xhci_disable_slot()
3942 (xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_disable_slot()
3943 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3945 return -ENODEV; in xhci_disable_slot()
3951 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3956 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3958 wait_for_completion(command->completion); in xhci_disable_slot()
3960 if (command->status != COMP_SUCCESS) in xhci_disable_slot()
3962 slot_id, command->status); in xhci_disable_slot()
3973 * Must be called with xhci->lock held.
3977 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { in xhci_reserve_host_control_ep_resources()
3981 xhci->num_active_eps, xhci->limit_active_eps); in xhci_reserve_host_control_ep_resources()
3982 return -ENOMEM; in xhci_reserve_host_control_ep_resources()
3984 xhci->num_active_eps += 1; in xhci_reserve_host_control_ep_resources()
3987 xhci->num_active_eps); in xhci_reserve_host_control_ep_resources()
4009 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4012 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4018 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4020 wait_for_completion(command->completion); in xhci_alloc_dev()
4021 slot_id = command->slot_id; in xhci_alloc_dev()
4023 if (!slot_id || command->status != COMP_SUCCESS) { in xhci_alloc_dev()
4027 readl(&xhci->cap_regs->hcs_params1))); in xhci_alloc_dev()
4034 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_alloc_dev()
4035 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4038 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4041 xhci->num_active_eps); in xhci_alloc_dev()
4044 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4054 vdev = xhci->devs[slot_id]; in xhci_alloc_dev()
4055 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx); in xhci_alloc_dev()
4058 udev->slot_id = slot_id; in xhci_alloc_dev()
4066 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_alloc_dev()
4067 pm_runtime_get_noresume(hcd->self.controller); in xhci_alloc_dev()
4074 xhci_disable_slot(xhci, udev->slot_id); in xhci_alloc_dev()
4075 xhci_free_virt_device(xhci, udev->slot_id); in xhci_alloc_dev()
4097 mutex_lock(&xhci->mutex); in xhci_setup_device()
4099 if (xhci->xhc_state) { /* dying, removing or halted */ in xhci_setup_device()
4100 ret = -ESHUTDOWN; in xhci_setup_device()
4104 if (!udev->slot_id) { in xhci_setup_device()
4106 "Bad Slot ID %d", udev->slot_id); in xhci_setup_device()
4107 ret = -EINVAL; in xhci_setup_device()
4111 virt_dev = xhci->devs[udev->slot_id]; in xhci_setup_device()
4116 * a zero-dereference was observed once due to virt_dev = 0. in xhci_setup_device()
4120 udev->slot_id); in xhci_setup_device()
4121 ret = -EINVAL; in xhci_setup_device()
4124 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4128 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_setup_device()
4137 ret = -ENOMEM; in xhci_setup_device()
4141 command->in_ctx = virt_dev->in_ctx; in xhci_setup_device()
4143 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_setup_device()
4144 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_setup_device()
4148 ret = -EINVAL; in xhci_setup_device()
4152 * If this is the first Set Address since device plug-in or in xhci_setup_device()
4156 if (!slot_ctx->dev_info) in xhci_setup_device()
4161 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); in xhci_setup_device()
4162 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4164 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4165 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4168 spin_lock_irqsave(&xhci->lock, flags); in xhci_setup_device()
4170 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, in xhci_setup_device()
4171 udev->slot_id, setup); in xhci_setup_device()
4173 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4179 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4182 wait_for_completion(command->completion); in xhci_setup_device()
4188 switch (command->status) { in xhci_setup_device()
4192 ret = -ETIME; in xhci_setup_device()
4197 act, udev->slot_id); in xhci_setup_device()
4198 ret = -EINVAL; in xhci_setup_device()
4201 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); in xhci_setup_device()
4203 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4204 ret = xhci_disable_slot(xhci, udev->slot_id); in xhci_setup_device()
4205 xhci_free_virt_device(xhci, udev->slot_id); in xhci_setup_device()
4208 kfree(command->completion); in xhci_setup_device()
4210 return -EPROTO; in xhci_setup_device()
4212 dev_warn(&udev->dev, in xhci_setup_device()
4214 ret = -ENODEV; in xhci_setup_device()
4223 act, command->status); in xhci_setup_device()
4224 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1); in xhci_setup_device()
4225 ret = -EINVAL; in xhci_setup_device()
4230 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_setup_device()
4235 udev->slot_id, in xhci_setup_device()
4236 &xhci->dcbaa->dev_context_ptrs[udev->slot_id], in xhci_setup_device()
4238 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); in xhci_setup_device()
4241 (unsigned long long)virt_dev->out_ctx->dma); in xhci_setup_device()
4242 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4243 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4248 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, in xhci_setup_device()
4249 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4251 ctrl_ctx->add_flags = 0; in xhci_setup_device()
4252 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4253 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4254 udev->devaddr = (u8)(le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4258 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4260 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4262 kfree(command->completion); in xhci_setup_device()
4289 return rhub->ports[port1 - 1]->hw_portnum + 1; in xhci_find_raw_port_number()
4306 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4308 virt_dev = xhci->devs[udev->slot_id]; in xhci_change_max_exit_latency()
4312 * xHC was re-initialized. Exit latency will be set later after in xhci_change_max_exit_latency()
4313 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated in xhci_change_max_exit_latency()
4316 if (!virt_dev || max_exit_latency == virt_dev->current_mel) { in xhci_change_max_exit_latency()
4317 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4322 command = xhci->lpm_command; in xhci_change_max_exit_latency()
4323 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_change_max_exit_latency()
4325 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4328 return -ENOMEM; in xhci_change_max_exit_latency()
4331 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx); in xhci_change_max_exit_latency()
4332 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4334 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_change_max_exit_latency()
4335 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_change_max_exit_latency()
4336 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT)); in xhci_change_max_exit_latency()
4337 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency); in xhci_change_max_exit_latency()
4338 slot_ctx->dev_state = 0; in xhci_change_max_exit_latency()
4348 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4349 virt_dev->current_mel = max_exit_latency; in xhci_change_max_exit_latency()
4350 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4369 u2del = HCS_U2_LATENCY(xhci->hcs_params3); in xhci_calculate_hird_besl()
4370 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_hird_besl()
4386 besl_host = (u2del - 51) / 75 + 1; in xhci_calculate_hird_besl()
4404 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_usb2_hw_lpm_params()
4407 l1 = udev->l1_params.timeout / 256; in xhci_calculate_usb2_hw_lpm_params()
4430 if (xhci->quirks & XHCI_HW_LPM_DISABLE) in xhci_set_usb2_hardware_lpm()
4431 return -EPERM; in xhci_set_usb2_hardware_lpm()
4433 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || in xhci_set_usb2_hardware_lpm()
4434 !udev->lpm_capable) in xhci_set_usb2_hardware_lpm()
4435 return -EPERM; in xhci_set_usb2_hardware_lpm()
4437 if (!udev->parent || udev->parent->parent || in xhci_set_usb2_hardware_lpm()
4438 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_set_usb2_hardware_lpm()
4439 return -EPERM; in xhci_set_usb2_hardware_lpm()
4441 if (udev->usb2_hw_lpm_capable != 1) in xhci_set_usb2_hardware_lpm()
4442 return -EPERM; in xhci_set_usb2_hardware_lpm()
4444 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4446 ports = xhci->usb2_rhub.ports; in xhci_set_usb2_hardware_lpm()
4447 port_num = udev->portnum - 1; in xhci_set_usb2_hardware_lpm()
4448 pm_addr = ports[port_num]->addr + PORTPMSC; in xhci_set_usb2_hardware_lpm()
4450 hlpm_addr = ports[port_num]->addr + PORTHLPMC; in xhci_set_usb2_hardware_lpm()
4457 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4462 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_set_usb2_hardware_lpm()
4467 hird = udev->l1_params.besl; in xhci_set_usb2_hardware_lpm()
4470 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4472 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx in xhci_set_usb2_hardware_lpm()
4474 * context commands. It is protected by hcd->bandwidth in xhci_set_usb2_hardware_lpm()
4479 mutex_lock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4482 mutex_unlock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4486 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4497 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); in xhci_set_usb2_hardware_lpm()
4509 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4510 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4511 mutex_lock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4513 mutex_unlock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4514 readl_poll_timeout(ports[port_num]->addr, pm_val, in xhci_set_usb2_hardware_lpm()
4521 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4535 for (i = 0; i < xhci->num_ext_caps; i++) { in xhci_check_usb2_port_capability()
4536 if (xhci->ext_caps[i] & capability) { in xhci_check_usb2_port_capability()
4538 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1; in xhci_check_usb2_port_capability()
4539 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]); in xhci_check_usb2_port_capability()
4551 int portnum = udev->portnum - 1; in xhci_update_device()
4553 if (hcd->speed >= HCD_USB3 || !udev->lpm_capable) in xhci_update_device()
4556 /* we only support lpm for non-hub device connected to root hub yet */ in xhci_update_device()
4557 if (!udev->parent || udev->parent->parent || in xhci_update_device()
4558 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_update_device()
4561 if (xhci->hw_lpm_support == 1 && in xhci_update_device()
4564 udev->usb2_hw_lpm_capable = 1; in xhci_update_device()
4565 udev->l1_params.timeout = XHCI_L1_TIMEOUT; in xhci_update_device()
4566 udev->l1_params.besl = XHCI_DEFAULT_BESL; in xhci_update_device()
4569 udev->usb2_hw_lpm_besl_capable = 1; in xhci_update_device()
4575 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4577 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4581 return (1ULL << (desc->bInterval - 1)) * 125 * 1000; in xhci_service_interval_to_ns()
4595 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4596 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4601 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4602 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4607 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n", in xhci_get_timeout_no_hub_lpm()
4616 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4620 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4627 * - For control endpoints, U1 system exit latency (SEL) * 3
4628 * - For bulk endpoints, U1 SEL * 5
4629 * - For interrupt endpoints:
4630 * - Notification EPs, U1 SEL * 3
4631 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4632 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4645 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4648 timeout_ns = udev->u1_params.sel * 5; in xhci_calculate_intel_u1_timeout()
4653 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4661 if (timeout_ns < udev->u1_params.sel * 2) in xhci_calculate_intel_u1_timeout()
4662 timeout_ns = udev->u1_params.sel * 2; in xhci_calculate_intel_u1_timeout()
4671 /* Returns the hub-encoded U1 timeout value. */
4680 if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) { in xhci_calculate_u1_timeout()
4681 dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n"); in xhci_calculate_u1_timeout()
4686 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_calculate_u1_timeout()
4689 timeout_ns = udev->u1_params.sel; in xhci_calculate_u1_timeout()
4700 * USB 3.0 hub, we have to disable hub-initiated U1. in xhci_calculate_u1_timeout()
4704 dev_dbg(&udev->dev, "Hub-initiated U1 disabled " in xhci_calculate_u1_timeout()
4710 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4711 * - largest bInterval of any active periodic endpoint (to avoid going
4713 * - the U2 Exit Latency of the device
4728 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL; in xhci_calculate_intel_u2_timeout()
4735 /* Returns the hub-encoded U2 timeout value. */
4744 if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) { in xhci_calculate_u2_timeout()
4745 dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n"); in xhci_calculate_u2_timeout()
4750 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_calculate_u2_timeout()
4753 timeout_ns = udev->u2_params.sel; in xhci_calculate_u2_timeout()
4758 * USB 3.0 hub, we have to disable hub-initiated U2. in xhci_calculate_u2_timeout()
4762 dev_dbg(&udev->dev, "Hub-initiated U2 disabled " in xhci_calculate_u2_timeout()
4792 /* If we found we can't enable hub-initiated LPM, and in xhci_update_timeout_for_endpoint()
4794 * device-initiated LPM as well, then we will disable LPM in xhci_update_timeout_for_endpoint()
4799 return -E2BIG; in xhci_update_timeout_for_endpoint()
4808 struct usb_host_interface *alt, in xhci_update_timeout_for_interface() argument
4814 for (j = 0; j < alt->desc.bNumEndpoints; j++) { in xhci_update_timeout_for_interface()
4816 &alt->endpoint[j].desc, state, timeout)) in xhci_update_timeout_for_interface()
4817 return -E2BIG; in xhci_update_timeout_for_interface()
4833 for (parent = udev->parent, num_hubs = 0; parent->parent; in xhci_check_intel_tier_policy()
4834 parent = parent->parent) in xhci_check_intel_tier_policy()
4840 dev_dbg(&udev->dev, "Disabling U1 link state for device" in xhci_check_intel_tier_policy()
4841 " below second-tier hub.\n"); in xhci_check_intel_tier_policy()
4842 dev_dbg(&udev->dev, "Plug device into first-tier hub " in xhci_check_intel_tier_policy()
4844 return -E2BIG; in xhci_check_intel_tier_policy()
4851 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_check_tier_policy()
4858 * If the tier check or timeout setting functions return with a non-zero exit
4876 dev_warn(&udev->dev, "Can't enable unknown link state %i\n", in xhci_calculate_lpm_timeout()
4887 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc, in xhci_calculate_lpm_timeout()
4891 config = udev->actconfig; in xhci_calculate_lpm_timeout()
4895 for (i = 0; i < config->desc.bNumInterfaces; i++) { in xhci_calculate_lpm_timeout()
4897 struct usb_interface *intf = config->interface[i]; in xhci_calculate_lpm_timeout()
4902 /* Check if any currently bound drivers want hub-initiated LPM in xhci_calculate_lpm_timeout()
4905 if (intf->dev.driver) { in xhci_calculate_lpm_timeout()
4906 driver = to_usb_driver(intf->dev.driver); in xhci_calculate_lpm_timeout()
4907 if (driver && driver->disable_hub_initiated_lpm) { in xhci_calculate_lpm_timeout()
4908 dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n", in xhci_calculate_lpm_timeout()
4909 state_name, driver->name); in xhci_calculate_lpm_timeout()
4918 if (!intf->cur_altsetting) in xhci_calculate_lpm_timeout()
4922 intf->cur_altsetting, in xhci_calculate_lpm_timeout()
4954 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) || in calculate_max_exit_latency()
4956 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000); in calculate_max_exit_latency()
4957 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) || in calculate_max_exit_latency()
4959 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000); in calculate_max_exit_latency()
4967 dev_warn(&udev->dev, "Link PM max exit latency of %lluus " in calculate_max_exit_latency()
4969 return -E2BIG; in calculate_max_exit_latency()
4974 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4984 /* The LPM timeout values are pretty host-controller specific, so don't in xhci_enable_usb3_lpm_timeout()
4985 * enable hub-initiated timeouts unless the vendor has provided in xhci_enable_usb3_lpm_timeout()
4988 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_enable_usb3_lpm_timeout()
4989 !xhci->devs[udev->slot_id]) in xhci_enable_usb3_lpm_timeout()
5013 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_disable_usb3_lpm_timeout()
5014 !xhci->devs[udev->slot_id]) in xhci_disable_usb3_lpm_timeout()
5046 /*-------------------------------------------------------------------------*/
5064 if (!hdev->parent) in xhci_update_hub_device()
5067 vdev = xhci->devs[hdev->slot_id]; in xhci_update_hub_device()
5070 return -EINVAL; in xhci_update_hub_device()
5075 return -ENOMEM; in xhci_update_hub_device()
5077 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_update_hub_device()
5082 return -ENOMEM; in xhci_update_hub_device()
5085 spin_lock_irqsave(&xhci->lock, flags); in xhci_update_hub_device()
5086 if (hdev->speed == USB_SPEED_HIGH && in xhci_update_hub_device()
5090 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5091 return -ENOMEM; in xhci_update_hub_device()
5094 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); in xhci_update_hub_device()
5095 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_update_hub_device()
5096 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); in xhci_update_hub_device()
5097 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); in xhci_update_hub_device()
5103 if (tt->multi) in xhci_update_hub_device()
5104 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_update_hub_device()
5105 else if (hdev->speed == USB_SPEED_FULL) in xhci_update_hub_device()
5106 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); in xhci_update_hub_device()
5108 if (xhci->hci_version > 0x95) { in xhci_update_hub_device()
5111 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5112 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); in xhci_update_hub_device()
5113 /* Set TT think time - convert from ns to FS bit times. in xhci_update_hub_device()
5118 * High-spped hub. in xhci_update_hub_device()
5120 think_time = tt->think_time; in xhci_update_hub_device()
5122 think_time = (think_time / 666) - 1; in xhci_update_hub_device()
5123 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) in xhci_update_hub_device()
5124 slot_ctx->tt_info |= in xhci_update_hub_device()
5129 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5131 slot_ctx->dev_state = 0; in xhci_update_hub_device()
5132 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5135 (xhci->hci_version > 0x95) ? in xhci_update_hub_device()
5141 if (xhci->hci_version > 0x95) in xhci_update_hub_device()
5156 return readl(&xhci->run_regs->microframe_index) >> 3; in xhci_get_frame()
5166 struct device *dev = hcd->self.sysdev; in xhci_gen_setup()
5170 /* Accept arbitrarily long scatter-gather lists */ in xhci_gen_setup()
5171 hcd->self.sg_tablesize = ~0; in xhci_gen_setup()
5174 hcd->self.no_sg_constraint = 1; in xhci_gen_setup()
5177 hcd->self.no_stop_on_short = 1; in xhci_gen_setup()
5182 xhci->main_hcd = hcd; in xhci_gen_setup()
5183 xhci->usb2_rhub.hcd = hcd; in xhci_gen_setup()
5187 hcd->speed = HCD_USB2; in xhci_gen_setup()
5188 hcd->self.root_hub->speed = USB_SPEED_HIGH; in xhci_gen_setup()
5194 hcd->has_tt = 1; in xhci_gen_setup()
5199 * is a two digit BCD containig minor and sub-minor numbers. in xhci_gen_setup()
5205 if (xhci->usb3_rhub.min_rev == 0x1) in xhci_gen_setup()
5208 minor_rev = xhci->usb3_rhub.min_rev / 0x10; in xhci_gen_setup()
5212 hcd->speed = HCD_USB32; in xhci_gen_setup()
5213 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_gen_setup()
5214 hcd->self.root_hub->rx_lanes = 2; in xhci_gen_setup()
5215 hcd->self.root_hub->tx_lanes = 2; in xhci_gen_setup()
5218 hcd->speed = HCD_USB31; in xhci_gen_setup()
5219 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_gen_setup()
5226 xhci->usb3_rhub.hcd = hcd; in xhci_gen_setup()
5233 mutex_init(&xhci->mutex); in xhci_gen_setup()
5234 xhci->cap_regs = hcd->regs; in xhci_gen_setup()
5235 xhci->op_regs = hcd->regs + in xhci_gen_setup()
5236 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5237 xhci->run_regs = hcd->regs + in xhci_gen_setup()
5238 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK); in xhci_gen_setup()
5239 /* Cache read-only capability registers */ in xhci_gen_setup()
5240 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1); in xhci_gen_setup()
5241 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2); in xhci_gen_setup()
5242 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3); in xhci_gen_setup()
5243 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase); in xhci_gen_setup()
5244 xhci->hci_version = HC_VERSION(xhci->hcc_params); in xhci_gen_setup()
5245 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params); in xhci_gen_setup()
5246 if (xhci->hci_version > 0x100) in xhci_gen_setup()
5247 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2); in xhci_gen_setup()
5249 xhci->quirks |= quirks; in xhci_gen_setup()
5254 * success event after a short transfer. This quirk will ignore such in xhci_gen_setup()
5255 * spurious event. in xhci_gen_setup()
5257 if (xhci->hci_version > 0x96) in xhci_gen_setup()
5258 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_gen_setup()
5275 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0) in xhci_gen_setup()
5276 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit in xhci_gen_setup()
5278 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev, in xhci_gen_setup()
5281 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT) in xhci_gen_setup()
5282 xhci->hcc_params &= ~BIT(0); in xhci_gen_setup()
5284 /* Set dma_mask and coherent_dma_mask to 64-bits, in xhci_gen_setup()
5285 * if xHC supports 64-bit addressing */ in xhci_gen_setup()
5286 if (HCC_64BIT_ADDR(xhci->hcc_params) && in xhci_gen_setup()
5288 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); in xhci_gen_setup()
5292 * This is to avoid error in cases where a 32-bit USB in xhci_gen_setup()
5293 * controller is used on a 64-bit capable system. in xhci_gen_setup()
5298 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n"); in xhci_gen_setup()
5310 xhci->hcc_params, xhci->hci_version, xhci->quirks); in xhci_gen_setup()
5327 spin_lock_irqsave(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5328 udev = (struct usb_device *)ep->hcpriv; in xhci_clear_tt_buffer_complete()
5329 slot_id = udev->slot_id; in xhci_clear_tt_buffer_complete()
5330 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_clear_tt_buffer_complete()
5332 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT; in xhci_clear_tt_buffer_complete()
5334 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5338 .description = "xhci-hcd",
5412 drv->hcd_priv_size += over->extra_priv_size; in xhci_init_driver()
5413 if (over->reset) in xhci_init_driver()
5414 drv->reset = over->reset; in xhci_init_driver()
5415 if (over->start) in xhci_init_driver()
5416 drv->start = over->start; in xhci_init_driver()
5417 if (over->check_bandwidth) in xhci_init_driver()
5418 drv->check_bandwidth = over->check_bandwidth; in xhci_init_driver()
5419 if (over->reset_bandwidth) in xhci_init_driver()
5420 drv->reset_bandwidth = over->reset_bandwidth; in xhci_init_driver()
5450 return -ENODEV; in xhci_hcd_init()