Lines Matching +full:codec +full:- +full:irq
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * This is modified (by Sasha Khapyorsky <sashak@alsa-project.org>) version
28 MODULE_SUPPORTED_DEVICE("{{Intel,82801AA-ICH},"
29 "{Intel,82901AB-ICH0},"
30 "{Intel,82801BA-ICH2},"
31 "{Intel,82801CA-ICH3},"
32 "{Intel,82801DB-ICH4},"
44 static int index = -2; /* Exclude the first card */
53 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (0 = auto-detect).");
68 ICH_REG_##name##_BDBAR = base + 0x0, /* dword - buffer descriptor list base address */ \
69 ICH_REG_##name##_CIV = base + 0x04, /* byte - current index value */ \
70 ICH_REG_##name##_LVI = base + 0x05, /* byte - last valid index */ \
71 ICH_REG_##name##_SR = base + 0x06, /* byte - status register */ \
72 ICH_REG_##name##_PICB = base + 0x08, /* word - position in current buffer */ \
73 ICH_REG_##name##_PIV = base + 0x0a, /* byte - prefetched index value */ \
74 ICH_REG_##name##_CR = base + 0x0b, /* byte - control register */ \
104 #define ICH_REG_GLOB_CNT 0x3c /* dword - global control */
112 #define ICH_REG_GLOB_STA 0x40 /* dword - global status */
114 #define ICH_TCR 0x10000000 /* ICH4: tertiary (AC_SDIN2) codec ready */
117 #define ICH_P2INT 0x02000000 /* ICH4: PCM2-In interrupt */
118 #define ICH_M2INT 0x01000000 /* ICH4: Mic2-In interrupt */
120 #define ICH_MULTICHAN_CAP 0x00300000 /* ICH4: multi-channel capability bits (RO) */
129 #define ICH_SCR 0x00000200 /* secondary (AC_SDIN1) codec ready */
130 #define ICH_PCR 0x00000100 /* primary (AC_SDIN0) codec ready */
138 #define ICH_REG_ACC_SEMA 0x44 /* byte - codec write semaphore */
139 #define ICH_CAS 0x01 /* codec access semaphore */
151 #define get_ichdev(substream) (substream->runtime->private_data)
181 int irq; member
233 * Lowlevel I/O - busmaster
238 return ioread8(chip->bmaddr + offset); in igetbyte()
243 return ioread16(chip->bmaddr + offset); in igetword()
248 return ioread32(chip->bmaddr + offset); in igetdword()
253 iowrite8(val, chip->bmaddr + offset); in iputbyte()
258 iowrite16(val, chip->bmaddr + offset); in iputword()
263 iowrite32(val, chip->bmaddr + offset); in iputdword()
267 * Lowlevel I/O - AC'97 registers
272 return ioread16(chip->addr + offset); in iagetword()
277 iowrite16(val, chip->addr + offset); in iaputword()
285 * access to AC97 codec via normal i/o (for ICH and SIS7013)
288 /* return the GLOB_STA bit for the corresponding codec */
289 static unsigned int get_ich_codec_bit(struct intel8x0m *chip, unsigned int codec) in get_ich_codec_bit() argument
294 if (snd_BUG_ON(codec >= 3)) in get_ich_codec_bit()
296 return codec_bit[codec]; in get_ich_codec_bit()
299 static int snd_intel8x0m_codec_semaphore(struct intel8x0m *chip, unsigned int codec) in snd_intel8x0m_codec_semaphore() argument
303 if (codec > 1) in snd_intel8x0m_codec_semaphore()
304 return -EIO; in snd_intel8x0m_codec_semaphore()
305 codec = get_ich_codec_bit(chip, codec); in snd_intel8x0m_codec_semaphore()
307 /* codec ready ? */ in snd_intel8x0m_codec_semaphore()
308 if ((igetdword(chip, ICHREG(GLOB_STA)) & codec) == 0) in snd_intel8x0m_codec_semaphore()
309 return -EIO; in snd_intel8x0m_codec_semaphore()
317 } while (time--); in snd_intel8x0m_codec_semaphore()
322 dev_err(chip->card->dev, in snd_intel8x0m_codec_semaphore()
327 return -EBUSY; in snd_intel8x0m_codec_semaphore()
334 struct intel8x0m *chip = ac97->private_data; in snd_intel8x0m_codec_write()
336 if (snd_intel8x0m_codec_semaphore(chip, ac97->num) < 0) { in snd_intel8x0m_codec_write()
337 if (! chip->in_ac97_init) in snd_intel8x0m_codec_write()
338 dev_err(chip->card->dev, in snd_intel8x0m_codec_write()
340 ac97->num, reg); in snd_intel8x0m_codec_write()
342 iaputword(chip, reg + ac97->num * 0x80, val); in snd_intel8x0m_codec_write()
348 struct intel8x0m *chip = ac97->private_data; in snd_intel8x0m_codec_read()
352 if (snd_intel8x0m_codec_semaphore(chip, ac97->num) < 0) { in snd_intel8x0m_codec_read()
353 if (! chip->in_ac97_init) in snd_intel8x0m_codec_read()
354 dev_err(chip->card->dev, in snd_intel8x0m_codec_read()
356 ac97->num, reg); in snd_intel8x0m_codec_read()
359 res = iagetword(chip, reg + ac97->num * 0x80); in snd_intel8x0m_codec_read()
364 if (! chip->in_ac97_init) in snd_intel8x0m_codec_read()
365 dev_err(chip->card->dev, in snd_intel8x0m_codec_read()
367 ac97->num, reg); in snd_intel8x0m_codec_read()
383 __le32 *bdbar = ichdev->bdbar; in snd_intel8x0m_setup_periods()
384 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_setup_periods()
386 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); in snd_intel8x0m_setup_periods()
387 if (ichdev->size == ichdev->fragsize) { in snd_intel8x0m_setup_periods()
388 ichdev->ack_reload = ichdev->ack = 2; in snd_intel8x0m_setup_periods()
389 ichdev->fragsize1 = ichdev->fragsize >> 1; in snd_intel8x0m_setup_periods()
391 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf); in snd_intel8x0m_setup_periods()
393 ichdev->fragsize1 >> chip->pcm_pos_shift); in snd_intel8x0m_setup_periods()
394 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1)); in snd_intel8x0m_setup_periods()
396 ichdev->fragsize1 >> chip->pcm_pos_shift); in snd_intel8x0m_setup_periods()
398 ichdev->frags = 2; in snd_intel8x0m_setup_periods()
400 ichdev->ack_reload = ichdev->ack = 1; in snd_intel8x0m_setup_periods()
401 ichdev->fragsize1 = ichdev->fragsize; in snd_intel8x0m_setup_periods()
403 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size)); in snd_intel8x0m_setup_periods()
405 ichdev->fragsize >> chip->pcm_pos_shift); in snd_intel8x0m_setup_periods()
407 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n", in snd_intel8x0m_setup_periods()
411 ichdev->frags = ichdev->size / ichdev->fragsize; in snd_intel8x0m_setup_periods()
413 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK); in snd_intel8x0m_setup_periods()
414 ichdev->civ = 0; in snd_intel8x0m_setup_periods()
416 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags; in snd_intel8x0m_setup_periods()
417 ichdev->position = 0; in snd_intel8x0m_setup_periods()
419 dev_dbg(chip->card->dev, in snd_intel8x0m_setup_periods()
421 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, in snd_intel8x0m_setup_periods()
422 ichdev->fragsize1); in snd_intel8x0m_setup_periods()
425 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_setup_periods()
434 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_update()
439 if (civ == ichdev->civ) { in snd_intel8x0m_update()
442 ichdev->civ++; in snd_intel8x0m_update()
443 ichdev->civ &= ICH_REG_LVI_MASK; in snd_intel8x0m_update()
445 step = civ - ichdev->civ; in snd_intel8x0m_update()
449 // snd_printd("step = %d, %d -> %d\n", step, ichdev->civ, civ); in snd_intel8x0m_update()
450 ichdev->civ = civ; in snd_intel8x0m_update()
453 ichdev->position += step * ichdev->fragsize1; in snd_intel8x0m_update()
454 ichdev->position %= ichdev->size; in snd_intel8x0m_update()
455 ichdev->lvi += step; in snd_intel8x0m_update()
456 ichdev->lvi &= ICH_REG_LVI_MASK; in snd_intel8x0m_update()
457 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); in snd_intel8x0m_update()
459 ichdev->lvi_frag++; in snd_intel8x0m_update()
460 ichdev->lvi_frag %= ichdev->frags; in snd_intel8x0m_update()
461 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + in snd_intel8x0m_update()
462 ichdev->lvi_frag * in snd_intel8x0m_update()
463 ichdev->fragsize1); in snd_intel8x0m_update()
465 dev_dbg(chip->card->dev, in snd_intel8x0m_update()
467 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], in snd_intel8x0m_update()
468 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), in snd_intel8x0m_update()
471 if (--ichdev->ack == 0) { in snd_intel8x0m_update()
472 ichdev->ack = ichdev->ack_reload; in snd_intel8x0m_update()
476 if (ack && ichdev->substream) { in snd_intel8x0m_update()
477 spin_unlock(&chip->reg_lock); in snd_intel8x0m_update()
478 snd_pcm_period_elapsed(ichdev->substream); in snd_intel8x0m_update()
479 spin_lock(&chip->reg_lock); in snd_intel8x0m_update()
481 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_update()
484 static irqreturn_t snd_intel8x0m_interrupt(int irq, void *dev_id) in snd_intel8x0m_interrupt() argument
491 spin_lock(&chip->reg_lock); in snd_intel8x0m_interrupt()
492 status = igetdword(chip, chip->int_sta_reg); in snd_intel8x0m_interrupt()
494 spin_unlock(&chip->reg_lock); in snd_intel8x0m_interrupt()
497 if ((status & chip->int_sta_mask) == 0) { in snd_intel8x0m_interrupt()
499 iputdword(chip, chip->int_sta_reg, status); in snd_intel8x0m_interrupt()
500 spin_unlock(&chip->reg_lock); in snd_intel8x0m_interrupt()
504 for (i = 0; i < chip->bdbars_count; i++) { in snd_intel8x0m_interrupt()
505 ichdev = &chip->ichd[i]; in snd_intel8x0m_interrupt()
506 if (status & ichdev->int_sta_mask) in snd_intel8x0m_interrupt()
511 iputdword(chip, chip->int_sta_reg, status & chip->int_sta_mask); in snd_intel8x0m_interrupt()
512 spin_unlock(&chip->reg_lock); in snd_intel8x0m_interrupt()
526 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_pcm_trigger()
544 return -EINVAL; in snd_intel8x0m_pcm_trigger()
549 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ; in snd_intel8x0m_pcm_trigger()
562 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift; in snd_intel8x0m_pcm_pointer()
564 ptr = ichdev->fragsize1 - ptr1; in snd_intel8x0m_pcm_pointer()
567 ptr += ichdev->position; in snd_intel8x0m_pcm_pointer()
568 if (ptr >= ichdev->size) in snd_intel8x0m_pcm_pointer()
570 return bytes_to_frames(substream->runtime, ptr); in snd_intel8x0m_pcm_pointer()
576 struct snd_pcm_runtime *runtime = substream->runtime; in snd_intel8x0m_pcm_prepare()
579 ichdev->physbuf = runtime->dma_addr; in snd_intel8x0m_pcm_prepare()
580 ichdev->size = snd_pcm_lib_buffer_bytes(substream); in snd_intel8x0m_pcm_prepare()
581 ichdev->fragsize = snd_pcm_lib_period_bytes(substream); in snd_intel8x0m_pcm_prepare()
582 snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate); in snd_intel8x0m_pcm_prepare()
583 snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0); in snd_intel8x0m_pcm_prepare()
618 struct snd_pcm_runtime *runtime = substream->runtime; in snd_intel8x0m_pcm_open()
621 ichdev->substream = substream; in snd_intel8x0m_pcm_open()
622 runtime->hw = snd_intel8x0m_stream; in snd_intel8x0m_pcm_open()
627 runtime->private_data = ichdev; in snd_intel8x0m_pcm_open()
635 return snd_intel8x0m_pcm_open(substream, &chip->ichd[ICHD_MDMOUT]); in snd_intel8x0m_playback_open()
642 chip->ichd[ICHD_MDMOUT].substream = NULL; in snd_intel8x0m_playback_close()
650 return snd_intel8x0m_pcm_open(substream, &chip->ichd[ICHD_MDMIN]); in snd_intel8x0m_capture_open()
657 chip->ichd[ICHD_MDMIN].substream = NULL; in snd_intel8x0m_capture_close()
695 if (rec->suffix) in snd_intel8x0m_pcm1()
696 sprintf(name, "Intel ICH - %s", rec->suffix); in snd_intel8x0m_pcm1()
699 err = snd_pcm_new(chip->card, name, device, in snd_intel8x0m_pcm1()
700 rec->playback_ops ? 1 : 0, in snd_intel8x0m_pcm1()
701 rec->capture_ops ? 1 : 0, &pcm); in snd_intel8x0m_pcm1()
705 if (rec->playback_ops) in snd_intel8x0m_pcm1()
706 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, rec->playback_ops); in snd_intel8x0m_pcm1()
707 if (rec->capture_ops) in snd_intel8x0m_pcm1()
708 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, rec->capture_ops); in snd_intel8x0m_pcm1()
710 pcm->private_data = chip; in snd_intel8x0m_pcm1()
711 pcm->info_flags = 0; in snd_intel8x0m_pcm1()
712 pcm->dev_class = SNDRV_PCM_CLASS_MODEM; in snd_intel8x0m_pcm1()
713 if (rec->suffix) in snd_intel8x0m_pcm1()
714 sprintf(pcm->name, "%s - %s", chip->card->shortname, rec->suffix); in snd_intel8x0m_pcm1()
716 strcpy(pcm->name, chip->card->shortname); in snd_intel8x0m_pcm1()
717 chip->pcm[device] = pcm; in snd_intel8x0m_pcm1()
720 &chip->pci->dev, in snd_intel8x0m_pcm1()
721 rec->prealloc_size, in snd_intel8x0m_pcm1()
722 rec->prealloc_max_size); in snd_intel8x0m_pcm1()
746 switch (chip->device_type) { in snd_intel8x0m_pcm()
764 if (i > 0 && rec->ac97_idx) { in snd_intel8x0m_pcm()
765 /* activate PCM only when associated AC'97 codec */ in snd_intel8x0m_pcm()
766 if (! chip->ichd[rec->ac97_idx].ac97) in snd_intel8x0m_pcm()
775 chip->pcm_devs = device; in snd_intel8x0m_pcm()
786 struct intel8x0m *chip = bus->private_data; in snd_intel8x0m_mixer_free_ac97_bus()
787 chip->ac97_bus = NULL; in snd_intel8x0m_mixer_free_ac97_bus()
792 struct intel8x0m *chip = ac97->private_data; in snd_intel8x0m_mixer_free_ac97()
793 chip->ac97 = NULL; in snd_intel8x0m_mixer_free_ac97()
809 chip->in_ac97_init = 1; in snd_intel8x0m_mixer()
818 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) in snd_intel8x0m_mixer()
820 pbus->private_free = snd_intel8x0m_mixer_free_ac97_bus; in snd_intel8x0m_mixer()
822 pbus->clock = ac97_clock; in snd_intel8x0m_mixer()
823 chip->ac97_bus = pbus; in snd_intel8x0m_mixer()
825 ac97.pci = chip->pci; in snd_intel8x0m_mixer()
828 dev_err(chip->card->dev, in snd_intel8x0m_mixer()
829 "Unable to initialize codec #%d\n", ac97.num); in snd_intel8x0m_mixer()
834 chip->ac97 = x97; in snd_intel8x0m_mixer()
835 if(ac97_is_modem(x97) && !chip->ichd[ICHD_MDMIN].ac97) { in snd_intel8x0m_mixer()
836 chip->ichd[ICHD_MDMIN].ac97 = x97; in snd_intel8x0m_mixer()
837 chip->ichd[ICHD_MDMOUT].ac97 = x97; in snd_intel8x0m_mixer()
840 chip->in_ac97_init = 0; in snd_intel8x0m_mixer()
844 /* clear the cold-reset bit for the next chance */ in snd_intel8x0m_mixer()
845 if (chip->device_type != DEVICE_ALI) in snd_intel8x0m_mixer()
880 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n", in snd_intel8x0m_ich_chip_init()
882 return -EIO; in snd_intel8x0m_ich_chip_init()
886 /* wait for any codec ready status. in snd_intel8x0m_ich_chip_init()
899 /* no codec is found */ in snd_intel8x0m_ich_chip_init()
900 dev_err(chip->card->dev, in snd_intel8x0m_ich_chip_init()
901 "codec_ready: codec is not ready [0x%x]\n", in snd_intel8x0m_ich_chip_init()
903 return -EIO; in snd_intel8x0m_ich_chip_init()
919 if (chip->ac97) in snd_intel8x0m_ich_chip_init()
920 status |= get_ich_codec_bit(chip, chip->ac97->num); in snd_intel8x0m_ich_chip_init()
932 if (chip->device_type == DEVICE_SIS) { in snd_intel8x0m_ich_chip_init()
950 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_chip_init()
951 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0m_chip_init()
953 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_chip_init()
954 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); in snd_intel8x0m_chip_init()
956 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_chip_init()
957 iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset, chip->ichd[i].bdbar_addr); in snd_intel8x0m_chip_init()
965 if (chip->irq < 0) in snd_intel8x0m_free()
968 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_free()
969 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0m_free()
971 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_free()
972 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); in snd_intel8x0m_free()
974 if (chip->irq >= 0) in snd_intel8x0m_free()
975 free_irq(chip->irq, chip); in snd_intel8x0m_free()
976 if (chip->bdbars.area) in snd_intel8x0m_free()
977 snd_dma_free_pages(&chip->bdbars); in snd_intel8x0m_free()
978 if (chip->addr) in snd_intel8x0m_free()
979 pci_iounmap(chip->pci, chip->addr); in snd_intel8x0m_free()
980 if (chip->bmaddr) in snd_intel8x0m_free()
981 pci_iounmap(chip->pci, chip->bmaddr); in snd_intel8x0m_free()
982 pci_release_regions(chip->pci); in snd_intel8x0m_free()
983 pci_disable_device(chip->pci); in snd_intel8x0m_free()
995 struct intel8x0m *chip = card->private_data; in intel8x0m_suspend()
998 snd_ac97_suspend(chip->ac97); in intel8x0m_suspend()
999 if (chip->irq >= 0) { in intel8x0m_suspend()
1000 free_irq(chip->irq, chip); in intel8x0m_suspend()
1001 chip->irq = -1; in intel8x0m_suspend()
1002 card->sync_irq = -1; in intel8x0m_suspend()
1011 struct intel8x0m *chip = card->private_data; in intel8x0m_resume()
1013 if (request_irq(pci->irq, snd_intel8x0m_interrupt, in intel8x0m_resume()
1015 dev_err(dev, "unable to grab IRQ %d, disabling device\n", in intel8x0m_resume()
1016 pci->irq); in intel8x0m_resume()
1018 return -EIO; in intel8x0m_resume()
1020 chip->irq = pci->irq; in intel8x0m_resume()
1021 card->sync_irq = chip->irq; in intel8x0m_resume()
1023 snd_ac97_resume(chip->ac97); in intel8x0m_resume()
1038 struct intel8x0m *chip = entry->private_data; in snd_intel8x0m_proc_read()
1042 if (chip->device_type == DEVICE_ALI) in snd_intel8x0m_proc_read()
1057 snd_card_ro_proc_new(chip->card, "intel8x0m", chip, in snd_intel8x0m_proc_init()
1063 struct intel8x0m *chip = device->device_data; in snd_intel8x0m_dev_free()
1099 return -ENOMEM; in snd_intel8x0m_create()
1101 spin_lock_init(&chip->reg_lock); in snd_intel8x0m_create()
1102 chip->device_type = device_type; in snd_intel8x0m_create()
1103 chip->card = card; in snd_intel8x0m_create()
1104 chip->pci = pci; in snd_intel8x0m_create()
1105 chip->irq = -1; in snd_intel8x0m_create()
1107 if ((err = pci_request_regions(pci, card->shortname)) < 0) { in snd_intel8x0m_create()
1115 chip->bmaddr = pci_iomap(pci, 0, 0); in snd_intel8x0m_create()
1120 chip->addr = pci_iomap(pci, 2, 0); in snd_intel8x0m_create()
1122 chip->addr = pci_iomap(pci, 0, 0); in snd_intel8x0m_create()
1123 if (!chip->addr) { in snd_intel8x0m_create()
1124 dev_err(card->dev, "AC'97 space ioremap problem\n"); in snd_intel8x0m_create()
1126 return -EIO; in snd_intel8x0m_create()
1129 chip->bmaddr = pci_iomap(pci, 3, 0); in snd_intel8x0m_create()
1131 chip->bmaddr = pci_iomap(pci, 1, 0); in snd_intel8x0m_create()
1132 if (!chip->bmaddr) { in snd_intel8x0m_create()
1133 dev_err(card->dev, "Controller space ioremap problem\n"); in snd_intel8x0m_create()
1135 return -EIO; in snd_intel8x0m_create()
1140 chip->bdbars_count = 2; in snd_intel8x0m_create()
1143 for (i = 0; i < chip->bdbars_count; i++) { in snd_intel8x0m_create()
1144 ichdev = &chip->ichd[i]; in snd_intel8x0m_create()
1145 ichdev->ichd = i; in snd_intel8x0m_create()
1146 ichdev->reg_offset = tbl[i].offset; in snd_intel8x0m_create()
1147 ichdev->int_sta_mask = tbl[i].int_sta_mask; in snd_intel8x0m_create()
1150 ichdev->roff_sr = ICH_REG_OFF_PICB; in snd_intel8x0m_create()
1151 ichdev->roff_picb = ICH_REG_OFF_SR; in snd_intel8x0m_create()
1153 ichdev->roff_sr = ICH_REG_OFF_SR; in snd_intel8x0m_create()
1154 ichdev->roff_picb = ICH_REG_OFF_PICB; in snd_intel8x0m_create()
1157 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10; in snd_intel8x0m_create()
1160 chip->pcm_pos_shift = (device_type == DEVICE_SIS) ? 0 : 1; in snd_intel8x0m_create()
1164 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, in snd_intel8x0m_create()
1165 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, in snd_intel8x0m_create()
1166 &chip->bdbars) < 0) { in snd_intel8x0m_create()
1168 return -ENOMEM; in snd_intel8x0m_create()
1173 for (i = 0; i < chip->bdbars_count; i++) { in snd_intel8x0m_create()
1174 ichdev = &chip->ichd[i]; in snd_intel8x0m_create()
1175 ichdev->bdbar = ((__le32 *)chip->bdbars.area) + (i * ICH_MAX_FRAGS * 2); in snd_intel8x0m_create()
1176 ichdev->bdbar_addr = chip->bdbars.addr + (i * sizeof(u32) * ICH_MAX_FRAGS * 2); in snd_intel8x0m_create()
1177 int_sta_masks |= ichdev->int_sta_mask; in snd_intel8x0m_create()
1179 chip->int_sta_reg = ICH_REG_GLOB_STA; in snd_intel8x0m_create()
1180 chip->int_sta_mask = int_sta_masks; in snd_intel8x0m_create()
1189 if (request_irq(pci->irq, snd_intel8x0m_interrupt, IRQF_SHARED, in snd_intel8x0m_create()
1191 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); in snd_intel8x0m_create()
1193 return -EBUSY; in snd_intel8x0m_create()
1195 chip->irq = pci->irq; in snd_intel8x0m_create()
1196 card->sync_irq = chip->irq; in snd_intel8x0m_create()
1211 { PCI_DEVICE_ID_INTEL_82801AA_6, "Intel 82801AA-ICH" },
1212 { PCI_DEVICE_ID_INTEL_82801AB_6, "Intel 82901AB-ICH0" },
1213 { PCI_DEVICE_ID_INTEL_82801BA_6, "Intel 82801BA-ICH2" },
1215 { PCI_DEVICE_ID_INTEL_82801CA_6, "Intel 82801CA-ICH3" },
1216 { PCI_DEVICE_ID_INTEL_82801DB_6, "Intel 82801DB-ICH4" },
1241 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); in snd_intel8x0m_probe()
1245 strcpy(card->driver, "ICH-MODEM"); in snd_intel8x0m_probe()
1246 strcpy(card->shortname, "Intel ICH"); in snd_intel8x0m_probe()
1247 for (name = shortnames; name->id; name++) { in snd_intel8x0m_probe()
1248 if (pci->device == name->id) { in snd_intel8x0m_probe()
1249 strcpy(card->shortname, name->s); in snd_intel8x0m_probe()
1253 strcat(card->shortname," Modem"); in snd_intel8x0m_probe()
1255 if ((err = snd_intel8x0m_create(card, pci, pci_id->driver_data, &chip)) < 0) { in snd_intel8x0m_probe()
1259 card->private_data = chip; in snd_intel8x0m_probe()
1272 sprintf(card->longname, "%s at irq %i", in snd_intel8x0m_probe()
1273 card->shortname, chip->irq); in snd_intel8x0m_probe()