Lines Matching +full:8 +full:- +full:12
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5616.h -- RT5616 ALSA SoC audio driver
17 /* I/O - Output */
21 /* I/O - Input */
24 /* I/O - ADC/DAC/DMIC */
28 /* Mixer - D-D */
33 /* Mixer - ADC */
38 /* Mixer - DAC */
57 /* Format - ADC/DAC */
62 /* Function - Analog */
75 /* Function - Digital */
160 #define RT5616_L_VOL_MASK (0x3f << 8)
161 #define RT5616_L_VOL_SFT 8
170 #define RT5616_BST_MASK1 (0xf<<12)
171 #define RT5616_BST_SFT1 12
172 #define RT5616_BST_MASK2 (0xf<<8)
173 #define RT5616_BST_SFT2 8
180 #define RT5616_INL_VOL_MASK (0x1f << 8)
181 #define RT5616_INL_VOL_SFT 8
190 #define RT5616_DAC_L1_VOL_MASK (0xff << 8)
191 #define RT5616_DAC_L1_VOL_SFT 8
196 #define RT5616_DAC_L2_VOL_MASK (0xff << 8)
197 #define RT5616_DAC_L2_VOL_SFT 8
202 #define RT5616_ADC_L_VOL_MASK (0x7f << 8)
203 #define RT5616_ADC_L_VOL_SFT 8
210 #define RT5616_MONO_ADC_L_VOL_MASK (0x7f << 8)
211 #define RT5616_MONO_ADC_L_VOL_SFT 8
220 #define RT5616_ADC_R_BST_MASK (0x3 << 12)
221 #define RT5616_ADC_R_BST_SFT 12
248 #define RT5616_DAC_R1_STO_L_VOL_MASK (0x1 << 8)
249 #define RT5616_DAC_R1_STO_L_VOL_SFT 8
264 #define RT5616_M_STO_DD_L2 (0x1 << 12)
265 #define RT5616_M_STO_DD_L2_SFT 12
292 #define RT5616_DAC_L2_DAC_L_VOL_MASK (0x1 << 12)
293 #define RT5616_DAC_L2_DAC_L_VOL_SFT 12
300 #define RT5616_DAC_R2_DAC_R_VOL_MASK (0x1 << 8)
301 #define RT5616_DAC_R2_DAC_R_VOL_SFT 8
320 #define RT5616_DAC_R2_SEL_MASK (0x3 << 12)
321 #define RT5616_DAC_R2_SEL_SFT 12
322 #define RT5616_DAC_R2_SEL_IF2 (0x0 << 12)
323 #define RT5616_DAC_R2_SEL_IF3 (0x1 << 12)
324 #define RT5616_DAC_R2_SEL_TXDC (0x2 << 12)
333 #define RT5616_RXDC_SEL_MASK (0x3 << 8)
334 #define RT5616_RXDC_SEL_SFT 8
335 #define RT5616_RXDC_SEL_NOR (0x0 << 8)
336 #define RT5616_RXDC_SEL_L2R (0x1 << 8)
337 #define RT5616_RXDC_SEL_R2L (0x2 << 8)
338 #define RT5616_RXDC_SEL_SWAP (0x3 << 8)
419 #define RT5616_G_HPOMIX_MASK (0x1 << 12)
420 #define RT5616_G_HPOMIX_SFT 12
425 #define RT5616_G_IN_L_SM_L_MASK (0x3 << 12)
426 #define RT5616_G_IN_L_SM_L_SFT 12
429 #define RT5616_G_DAC_L2_SM_L_MASK (0x3 << 8)
430 #define RT5616_G_DAC_L2_SM_L_SFT 8
447 #define RT5616_G_IN_R_SM_R_MASK (0x3 << 12)
448 #define RT5616_G_IN_R_SM_R_SFT 12
451 #define RT5616_G_DAC_R2_SM_R_MASK (0x3 << 8)
452 #define RT5616_G_DAC_R2_SM_R_SFT 8
473 #define RT5616_M_SV_L_SPM_L (0x1 << 12)
474 #define RT5616_M_SV_L_SPM_L_SFT 12
481 #define RT5616_M_SV_R_SPM_R (0x1 << 12)
482 #define RT5616_M_SV_R_SPM_R_SFT 12
497 #define RT5616_M_OV_L_MM (0x1 << 12)
498 #define RT5616_M_OV_L_MM_SFT 12
571 #define RT5616_M_OV_R_LM (0x1 << 12)
572 #define RT5616_M_OV_R_LM_SFT 12
581 #define RT5616_PWR_DAC_L1 (0x1 << 12)
582 #define RT5616_PWR_DAC_L1_BIT 12
603 #define RT5616_PWR_LM (0x1 << 12)
604 #define RT5616_PWR_LM_BIT 12
660 #define RT5616_PWR_OV_R (0x1 << 12)
661 #define RT5616_PWR_OV_R_BIT 12
668 #define RT5616_PWR_IN1_R (0x1 << 8)
669 #define RT5616_PWR_IN1_R_BIT 8
685 #define RT5616_I2S_I_CP_MASK (0x3 << 8)
686 #define RT5616_I2S_I_CP_SFT 8
687 #define RT5616_I2S_I_CP_OFF (0x0 << 8)
688 #define RT5616_I2S_I_CP_U_LAW (0x1 << 8)
689 #define RT5616_I2S_I_CP_A_LAW (0x2 << 8)
708 #define RT5616_I2S_PD1_MASK (0x7 << 12)
709 #define RT5616_I2S_PD1_SFT 12
710 #define RT5616_I2S_PD1_1 (0x0 << 12)
711 #define RT5616_I2S_PD1_2 (0x1 << 12)
712 #define RT5616_I2S_PD1_3 (0x2 << 12)
713 #define RT5616_I2S_PD1_4 (0x3 << 12)
714 #define RT5616_I2S_PD1_6 (0x4 << 12)
715 #define RT5616_I2S_PD1_8 (0x5 << 12)
716 #define RT5616_I2S_PD1_12 (0x6 << 12)
717 #define RT5616_I2S_PD1_16 (0x7 << 12)
747 #define RT5616_TDM_CH_NUM_SEL_MASK (0x3 << 12)
748 #define RT5616_TDM_CH_NUM_SEL_SFT 12
749 #define RT5616_TDM_CH_NUM_SEL_2 (0x0 << 12)
750 #define RT5616_TDM_CH_NUM_SEL_4 (0x1 << 12)
751 #define RT5616_TDM_CH_NUM_SEL_6 (0x2 << 12)
752 #define RT5616_TDM_CH_NUM_SEL_8 (0x3 << 12)
763 #define RT5616_TDM_ADC_START_SEL_MASK (0x1 << 8)
764 #define RT5616_TDM_ADC_START_SEL_SFT 8
765 #define RT5616_TDM_ADC_START_SEL_SL0 (0x0 << 8)
766 #define RT5616_TDM_ADC_START_SEL_SL4 (0x1 << 8)
803 #define RT5616_TDM_LPBK_EN (0x1 << 12)
804 #define RT5616_TDM_LPBK_SFT 12
815 #define RT5616_TDM_TRAN_EDGE_SEL_MASK (0x1 << 8)
816 #define RT5616_TDM_TRAN_EDGE_SEL_SFT 8
817 #define RT5616_TDM_TRAN_EDGE_SEL_POS (0x0 << 8)
818 #define RT5616_TDM_TRAN_EDGE_SEL_NEG (0x1 << 8)
833 #define RT5616_PLL1_SRC_MASK (0x3 << 12)
834 #define RT5616_PLL1_SRC_SFT 12
835 #define RT5616_PLL1_SRC_MCLK (0x0 << 12)
836 #define RT5616_PLL1_SRC_BCLK1 (0x1 << 12)
837 #define RT5616_PLL1_SRC_BCLK2 (0x2 << 12)
855 #define RT5616_PLL_M_MASK (RT5616_PLL_M_MAX << 12)
856 #define RT5616_PLL_M_SFT 12
865 #define RT5616_STO2_T_MASK (0x1 << 12)
866 #define RT5616_STO2_T_SFT 12
867 #define RT5616_STO2_T_I2S2 (0x0 << 12)
868 #define RT5616_STO2_T_LRCK2 (0x1 << 12)
887 #define RT5616_STO2_DAC_M_MASK (0x1 << 12)
888 #define RT5616_STO2_DAC_M_SFT 12
889 #define RT5616_STO2_DAC_M_NOR (0x0 << 12)
890 #define RT5616_STO2_DAC_M_ASRC (0x1 << 12)
910 #define RT5616_I2S1_RATE_MASK (0xf << 12)
911 #define RT5616_I2S1_RATE_SFT 12
912 #define RT5616_I2S2_RATE_MASK (0xf << 8)
913 #define RT5616_I2S2_RATE_SFT 8
928 #define RT5616_I2S1_PD_MASK (0x7 << 12)
929 #define RT5616_I2S1_PD_SFT 12
930 #define RT5616_I2S2_PD_MASK (0x7 << 8)
931 #define RT5616_I2S2_PD_SFT 8
934 #define RT5616_FSI1_RATE_MASK (0xf << 12)
935 #define RT5616_FSI1_RATE_SFT 12
936 #define RT5616_FSI2_RATE_MASK (0xf << 8)
937 #define RT5616_FSI2_RATE_SFT 8
944 #define RT5616_HP_OC_TH_MASK (0x3 << 8)
945 #define RT5616_HP_OC_TH_SFT 8
946 #define RT5616_HP_OC_TH_90 (0x0 << 8)
947 #define RT5616_HP_OC_TH_105 (0x1 << 8)
948 #define RT5616_HP_OC_TH_120 (0x2 << 8)
949 #define RT5616_HP_OC_TH_135 (0x3 << 8)
960 #define RT5616_HP_R_SMT_MASK (0x1 << 8)
961 #define RT5616_HP_R_SMT_SFT 8
962 #define RT5616_HP_R_SMT_DIS (0x0 << 8)
963 #define RT5616_HP_R_SMT_EN (0x1 << 8)
1002 #define RT5616_RAMP_MASK (0x1 << 12)
1003 #define RT5616_RAMP_SFT 12
1004 #define RT5616_RAMP_DIS (0x0 << 12)
1005 #define RT5616_RAMP_EN (0x1 << 12)
1014 #define RT5616_MRES_MASK (0x3 << 8)
1015 #define RT5616_MRES_SFT 8
1016 #define RT5616_MRES_15MO (0x0 << 8)
1017 #define RT5616_MRES_25MO (0x1 << 8)
1018 #define RT5616_MRES_35MO (0x2 << 8)
1019 #define RT5616_MRES_45MO (0x3 << 8)
1032 #define RT5616_CP_SYS_MASK (0x7 << 12)
1033 #define RT5616_CP_SYS_SFT 12
1034 #define RT5616_CP_FQ1_MASK (0x7 << 8)
1035 #define RT5616_CP_FQ1_SFT 8
1058 #define RT5616_PM_HP_MASK (0x3 << 8)
1059 #define RT5616_PM_HP_SFT 8
1060 #define RT5616_PM_HP_LV (0x0 << 8)
1061 #define RT5616_PM_HP_MV (0x1 << 8)
1062 #define RT5616_PM_HP_HV (0x2 << 8)
1098 #define RT5616_JD2_CMP_MASK (0x7 << 12)
1099 #define RT5616_JD2_CMP_SFT 12
1104 #define RT5616_JD_MODE_SEL_MASK (0x3 << 8)
1105 #define RT5616_JD_MODE_SEL_SFT 8
1106 #define RT5616_JD_MODE_SEL_M0 (0x0 << 8)
1107 #define RT5616_JD_MODE_SEL_M1 (0x1 << 8)
1108 #define RT5616_JD_MODE_SEL_M2 (0x2 << 8)
1122 #define RT5616_JD3_CMP_MASK (0x7 << 12)
1123 #define RT5616_JD3_CMP_SFT 12
1136 #define RT5616_EQ_DITH_MASK (0x3 << 8)
1137 #define RT5616_EQ_DITH_SFT 8
1138 #define RT5616_EQ_DITH_NOR (0x0 << 8)
1139 #define RT5616_EQ_DITH_LSB (0x1 << 8)
1140 #define RT5616_EQ_DITH_LSB_1 (0x2 << 8)
1141 #define RT5616_EQ_DITH_LSB_2 (0x3 << 8)
1160 #define RT5616_EQ_HPF1_M_MASK (0x1 << 8)
1161 #define RT5616_EQ_HPF1_M_SFT 8
1162 #define RT5616_EQ_HPF1_M_HI (0x0 << 8)
1163 #define RT5616_EQ_HPF1_M_1ST (0x1 << 8)
1215 #define RT5616_DRC_AGC_AR_MASK (0x1f << 8)
1216 #define RT5616_DRC_AGC_AR_SFT 8
1229 #define RT5616_DRC_AGC_POB_MASK (0x3f << 8)
1230 #define RT5616_DRC_AGC_POB_SFT 8
1245 #define RT5616_DRC_AGC_NGB_MASK (0xf << 12)
1246 #define RT5616_DRC_AGC_NGB_SFT 12
1282 #define RT5616_JD_SPL_TRG_MASK (0x1 << 8)
1283 #define RT5616_JD_SPL_TRG_SFT 8
1284 #define RT5616_JD_SPL_TRG_LO (0x0 << 8)
1285 #define RT5616_JD_SPL_TRG_HI (0x1 << 8)
1311 #define RT5616_JD3_IRQ_EN (0x1 << 8)
1312 #define RT5616_JD3_IRQ_EN_SFT 8
1333 #define RT5616_JD1_1_EN_STKY (0x1 << 8)
1334 #define RT5616_JD1_1_EN_STKY_SFT 8
1376 #define RT5616_STA_JD1_1 (0x1 << 12)
1377 #define RT5616_STA_JD1_1_BIT 12
1384 #define RT5616_STA_GP1 (0x1 << 8)
1385 #define RT5616_STA_GP1_BIT 8
1408 #define RT5616_I2S2_SEL_MASK (0x1 << 8)
1409 #define RT5616_I2S2_SEL_SFT 8
1410 #define RT5616_I2S2_SEL_I2S (0x0 << 8)
1411 #define RT5616_I2S2_SEL_GPIO (0x1 << 8)
1442 #define RT5616_GP5_P_MASK (0x1 << 12)
1443 #define RT5616_GP5_P_SFT 12
1444 #define RT5616_GP5_P_NOR (0x0 << 12)
1445 #define RT5616_GP5_P_INV (0x1 << 12)
1458 #define RT5616_GP3_DR_MASK (0x1 << 8)
1459 #define RT5616_GP3_DR_SFT 8
1460 #define RT5616_GP3_DR_IN (0x0 << 8)
1461 #define RT5616_GP3_DR_OUT (0x1 << 8)
1496 #define RT5616_GP8_DR_MASK (0x1 << 8)
1497 #define RT5616_GP8_DR_SFT 8
1498 #define RT5616_GP8_DR_IN (0x0 << 8)
1499 #define RT5616_GP8_DR_OUT (0x1 << 8)
1548 #define RT5616_BB_CT_MASK (0x7 << 12)
1549 #define RT5616_BB_CT_SFT 12
1550 #define RT5616_BB_CT_A (0x0 << 12)
1551 #define RT5616_BB_CT_B (0x1 << 12)
1552 #define RT5616_BB_CT_C (0x2 << 12)
1553 #define RT5616_BB_CT_D (0x3 << 12)
1556 #define RT5616_M_BB_R_MASK (0x1 << 8)
1557 #define RT5616_M_BB_R_SFT 8
1574 #define RT5616_EG_MP3_MASK (0x1f << 8)
1575 #define RT5616_EG_MP3_SFT 8
1590 #define RT5616_OG_MP3_MASK (0x1f << 8)
1591 #define RT5616_OG_MP3_SFT 8
1616 #define RT5616_M_3D_D2H_MASK (0x1 << 8)
1617 #define RT5616_M_3D_D2H_SFT 8
1628 #define RT5616_HPF_CF_L_MASK (0x7 << 12)
1629 #define RT5616_HPF_CF_L_SFT 12
1630 #define RT5616_HPF_CF_R_MASK (0x7 << 8)
1631 #define RT5616_HPF_CF_R_SFT 8
1642 #define RT5616_HPF_CF_L_NUM_MASK (0x3f << 8)
1643 #define RT5616_HPF_CF_L_NUM_SFT 8
1693 #define RT5616_HP_SV_MASK (0x1 << 12)
1694 #define RT5616_HP_SV_SFT 12
1695 #define RT5616_HP_SV_DIS (0x0 << 12)
1696 #define RT5616_HP_SV_EN (0x1 << 12)
1721 #define RT5616_I2S2_MS_SP_MASK (0x1 << 8)
1722 #define RT5616_I2S2_MS_SP_SEL 8
1723 #define RT5616_I2S2_MS_SP_64 (0x0 << 8)
1724 #define RT5616_I2S2_MS_SP_50 (0x1 << 8)
1740 #define RT5616_3D_SPK_CG_MASK (0x1f << 8)
1741 #define RT5616_3D_SPK_CG_SFT 8
1771 /* Wind Noise Detection Control 8 (0x73) */
1772 #define RT5616_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1774 #define RT5616_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1775 #define RT5616_WND_STRONG_SFT 12