Lines Matching +full:8 +full:- +full:12
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
221 #define RT5670_L_VOL_MASK (0x3f << 8)
222 #define RT5670_L_VOL_SFT 8
233 #define RT5670_CBJ_BST1_MASK (0xf << 12)
234 #define RT5670_CBJ_BST1_SFT (12)
236 #define RT5670_CBJ_JD_MIC_EN (0x1 << 8)
240 #define RT5670_CBJ_MN_JD (0x1 << 12)
245 #define RT5670_BST_MASK1 (0xf<<12)
246 #define RT5670_BST_SFT1 12
247 #define RT5670_BST_MASK2 (0xf<<8)
248 #define RT5670_BST_SFT2 8
259 #define RT5670_INL_VOL_MASK (0x1f << 8)
260 #define RT5670_INL_VOL_SFT 8
271 #define RT5670_M_ST_DACR2 (0x1 << 8)
272 #define RT5670_M_ST_DACR2_SFT 8
279 #define RT5670_DAC_L1_VOL_MASK (0xff << 8)
280 #define RT5670_DAC_L1_VOL_SFT 8
285 #define RT5670_DAC_L2_VOL_MASK (0xff << 8)
286 #define RT5670_DAC_L2_VOL_SFT 8
293 #define RT5670_M_DAC_R2_VOL (0x1 << 12)
294 #define RT5670_M_DAC_R2_VOL_SFT 12
301 #define RT5670_ADC_L_VOL_MASK (0x7f << 8)
302 #define RT5670_ADC_L_VOL_SFT 8
307 #define RT5670_MONO_ADC_L_VOL_MASK (0x7f << 8)
308 #define RT5670_MONO_ADC_L_VOL_SFT 8
315 #define RT5670_STO1_ADC_R_BST_MASK (0x3 << 12)
316 #define RT5670_STO1_ADC_R_BST_SFT 12
319 #define RT5670_STO2_ADC_L_BST_MASK (0x3 << 8)
320 #define RT5670_STO2_ADC_L_BST_SFT 8
335 #define RT5670_ADC_1_SRC_MASK (0x1 << 12)
336 #define RT5670_ADC_1_SRC_SFT 12
337 #define RT5670_ADC_1_SRC_ADC (0x1 << 12)
338 #define RT5670_ADC_1_SRC_DACMIX (0x0 << 12)
343 #define RT5670_DMIC_SRC_MASK (0x3 << 8)
344 #define RT5670_DMIC_SRC_SFT 8
357 #define RT5670_MONO_ADC_L1_SRC_MASK (0x1 << 12)
358 #define RT5670_MONO_ADC_L1_SRC_SFT 12
359 #define RT5670_MONO_ADC_L1_SRC_DACMIXL (0x0 << 12)
360 #define RT5670_MONO_ADC_L1_SRC_ADCL (0x1 << 12)
365 #define RT5670_MONO_DMIC_L_SRC_MASK (0x3 << 8)
366 #define RT5670_MONO_DMIC_L_SRC_SFT 8
391 #define RT5670_DAC1_L_SEL_MASK (0x3 << 8)
392 #define RT5670_DAC1_L_SEL_SFT 8
393 #define RT5670_DAC1_L_SEL_IF1 (0x0 << 8)
394 #define RT5670_DAC1_L_SEL_IF2 (0x1 << 8)
395 #define RT5670_DAC1_L_SEL_IF3 (0x2 << 8)
396 #define RT5670_DAC1_L_SEL_IF4 (0x3 << 8)
407 #define RT5670_M_DAC_L2 (0x1 << 12)
408 #define RT5670_M_DAC_L2_SFT 12
413 #define RT5670_DAC_R1_STO_L_VOL_MASK (0x1 << 8)
414 #define RT5670_DAC_R1_STO_L_VOL_SFT 8
433 #define RT5670_M_DAC_L2_MONO_L (0x1 << 12)
434 #define RT5670_M_DAC_L2_MONO_L_SFT 12
461 #define RT5670_DAC_L2_DAC_L_VOL_MASK (0x1 << 12)
462 #define RT5670_DAC_L2_DAC_L_VOL_SFT 12
469 #define RT5670_DAC_R2_DAC_R_VOL_MASK (0x1 << 8)
470 #define RT5670_DAC_R2_DAC_R_VOL_SFT 8
501 #define RT5670_TXDP_L_VOL_MASK (0x7f << 8)
502 #define RT5670_TXDP_L_VOL_SFT 8
509 #define RT5670_IF2_ADC_IN_MASK (0x7 << 12)
510 #define RT5670_IF2_ADC_IN_SFT 12
513 #define RT5670_IF2_ADC_SEL_MASK (0x3 << 8)
514 #define RT5670_IF2_ADC_SEL_SFT 8
527 #define RT5670_M_PDM1_R (0x1 << 12)
528 #define RT5670_M_PDM1_R_SFT 12
535 #define RT5670_M_PDM2_R (0x1 << 8)
536 #define RT5670_M_PDM2_R_SFT 8
594 #define RT5670_G_HPOMIX_MASK (0x1 << 12)
595 #define RT5670_G_HPOMIX_SFT 12
612 #define RT5670_M_OV_L_MM (0x1 << 12)
613 #define RT5670_M_OV_L_MM_SFT 12
618 #define RT5670_M_DAC_L2_MM (0x1 << 8)
619 #define RT5670_M_DAC_L2_MM_SFT 8
690 #define RT5670_M_OV_R_LM (0x1 << 12)
691 #define RT5670_M_OV_R_LM_SFT 12
700 #define RT5670_PWR_DAC_L1 (0x1 << 12)
701 #define RT5670_PWR_DAC_L1_BIT 12
722 #define RT5670_PWR_I2S_DSP (0x1 << 12)
723 #define RT5670_PWR_I2S_DSP_BIT 12
730 #define RT5670_PWR_ADC_S2F (0x1 << 8)
731 #define RT5670_PWR_ADC_S2F_BIT 8
744 #define RT5670_PWR_LM (0x1 << 12)
745 #define RT5670_PWR_LM_BIT 12
798 #define RT5670_PWR_IN_R (0x1 << 8)
799 #define RT5670_PWR_IN_R_BIT 8
808 #define RT5670_I2S_IF_MASK (0x7 << 12)
809 #define RT5670_I2S_IF_SFT 12
815 #define RT5670_I2S_I_CP_MASK (0x3 << 8)
816 #define RT5670_I2S_I_CP_SFT 8
817 #define RT5670_I2S_I_CP_OFF (0x0 << 8)
818 #define RT5670_I2S_I_CP_U_LAW (0x1 << 8)
819 #define RT5670_I2S_I_CP_A_LAW (0x2 << 8)
848 #define RT5670_I2S_PD1_MASK (0x7 << 12)
849 #define RT5670_I2S_PD1_SFT 12
850 #define RT5670_I2S_PD1_1 (0x0 << 12)
851 #define RT5670_I2S_PD1_2 (0x1 << 12)
852 #define RT5670_I2S_PD1_3 (0x2 << 12)
853 #define RT5670_I2S_PD1_4 (0x3 << 12)
854 #define RT5670_I2S_PD1_6 (0x4 << 12)
855 #define RT5670_I2S_PD1_8 (0x5 << 12)
856 #define RT5670_I2S_PD1_12 (0x6 << 12)
857 #define RT5670_I2S_PD1_16 (0x7 << 12)
862 #define RT5670_I2S_PD2_MASK (0x7 << 8)
863 #define RT5670_I2S_PD2_SFT 8
864 #define RT5670_I2S_PD2_1 (0x0 << 8)
865 #define RT5670_I2S_PD2_2 (0x1 << 8)
866 #define RT5670_I2S_PD2_3 (0x2 << 8)
867 #define RT5670_I2S_PD2_4 (0x3 << 8)
868 #define RT5670_I2S_PD2_6 (0x4 << 8)
869 #define RT5670_I2S_PD2_8 (0x5 << 8)
870 #define RT5670_I2S_PD2_12 (0x6 << 8)
871 #define RT5670_I2S_PD2_16 (0x7 << 8)
906 #define RT5670_ADC_R_OSR_MASK (0x3 << 12)
907 #define RT5670_ADC_R_OSR_SFT 12
908 #define RT5670_ADC_R_OSR_128 (0x0 << 12)
909 #define RT5670_ADC_R_OSR_64 (0x1 << 12)
910 #define RT5670_ADC_R_OSR_32 (0x2 << 12)
911 #define RT5670_ADC_R_OSR_16 (0x3 << 12)
930 #define RT5670_DMIC_1R_LH_MASK (0x1 << 12)
931 #define RT5670_DMIC_1R_LH_SFT 12
932 #define RT5670_DMIC_1R_LH_FALLING (0x0 << 12)
933 #define RT5670_DMIC_1R_LH_RISING (0x1 << 12)
942 #define RT5670_DMIC_2R_LH_MASK (0x1 << 8)
943 #define RT5670_DMIC_2R_LH_SFT 8
944 #define RT5670_DMIC_2R_LH_FALLING (0x0 << 8)
945 #define RT5670_DMIC_2R_LH_RISING (0x1 << 8)
994 #define RT5670_PLL_M_MASK (RT5670_PLL_M_MAX << 12)
995 #define RT5670_PLL_M_SFT 12
1008 #define RT5670_I2S2_F_MASK (0x1 << 12)
1009 #define RT5670_I2S2_F_SFT 12
1010 #define RT5670_I2S2_F_I2S2_D2 (0x0 << 12)
1011 #define RT5670_I2S2_F_I2S1_TCLK (0x1 << 12)
1016 #define RT5670_DMIC_2_M_MASK (0x1 << 8)
1017 #define RT5670_DMIC_2_M_SFT 8
1018 #define RT5670_DMIC_2_M_NOR (0x0 << 8)
1019 #define RT5670_DMIC_2_M_ASYN (0x1 << 8)
1030 #define RT5670_DA_STO_CLK_SEL_MASK (0xf << 12)
1031 #define RT5670_DA_STO_CLK_SEL_SFT 12
1032 #define RT5670_DA_MONOL_CLK_SEL_MASK (0xf << 8)
1033 #define RT5670_DA_MONOL_CLK_SEL_SFT 8
1040 #define RT5670_UP_CLK_SEL_MASK (0xf << 12)
1041 #define RT5670_UP_CLK_SEL_SFT 12
1042 #define RT5670_DOWN_CLK_SEL_MASK (0xf << 8)
1043 #define RT5670_DOWN_CLK_SEL_SFT 8
1050 #define RT5670_I2S1_PD_MASK (0x7 << 12)
1051 #define RT5670_I2S1_PD_SFT 12
1052 #define RT5670_I2S2_PD_MASK (0x7 << 8)
1053 #define RT5670_I2S2_PD_SFT 8
1060 #define RT5670_HP_OC_TH_MASK (0x3 << 8)
1061 #define RT5670_HP_OC_TH_SFT 8
1062 #define RT5670_HP_OC_TH_90 (0x0 << 8)
1063 #define RT5670_HP_OC_TH_105 (0x1 << 8)
1064 #define RT5670_HP_OC_TH_120 (0x2 << 8)
1065 #define RT5670_HP_OC_TH_135 (0x3 << 8)
1072 #define RT5670_AUTO_PD_MASK (0x1 << 8)
1073 #define RT5670_AUTO_PD_SFT 8
1074 #define RT5670_AUTO_PD_DIS (0x0 << 8)
1075 #define RT5670_AUTO_PD_EN (0x1 << 8)
1080 #define RT5670_CLSD_RATIO_MASK (0xf << 12)
1081 #define RT5670_CLSD_RATIO_SFT 12
1100 #define RT5670_HP_R_SMT_MASK (0x1 << 8)
1101 #define RT5670_HP_R_SMT_SFT 8
1102 #define RT5670_HP_R_SMT_DIS (0x0 << 8)
1103 #define RT5670_HP_R_SMT_EN (0x1 << 8)
1142 #define RT5670_RAMP_MASK (0x1 << 12)
1143 #define RT5670_RAMP_SFT 12
1144 #define RT5670_RAMP_DIS (0x0 << 12)
1145 #define RT5670_RAMP_EN (0x1 << 12)
1154 #define RT5670_MRES_MASK (0x3 << 8)
1155 #define RT5670_MRES_SFT 8
1156 #define RT5670_MRES_15MO (0x0 << 8)
1157 #define RT5670_MRES_25MO (0x1 << 8)
1158 #define RT5670_MRES_35MO (0x2 << 8)
1159 #define RT5670_MRES_45MO (0x3 << 8)
1172 #define RT5670_CP_SYS_MASK (0x7 << 12)
1173 #define RT5670_CP_SYS_SFT 12
1174 #define RT5670_CP_FQ1_MASK (0x7 << 8)
1175 #define RT5670_CP_FQ1_SFT 8
1198 #define RT5670_PM_HP_MASK (0x3 << 8)
1199 #define RT5670_PM_HP_SFT 8
1200 #define RT5670_PM_HP_LV (0x0 << 8)
1201 #define RT5670_PM_HP_MV (0x1 << 8)
1202 #define RT5670_PM_HP_HV (0x2 << 8)
1233 #define RT5670_MIC2_CLK_MASK (0x1 << 12)
1234 #define RT5670_MIC2_CLK_SFT 12
1235 #define RT5670_MIC2_CLK_DIS (0x0 << 12)
1236 #define RT5670_MIC2_CLK_EN (0x1 << 12)
1246 #define RT5670_MIC2_OVCD_MASK (0x1 << 8)
1247 #define RT5670_MIC2_OVCD_SFT 8
1248 #define RT5670_MIC2_OVCD_DIS (0x0 << 8)
1249 #define RT5670_MIC2_OVCD_EN (0x1 << 8)
1271 #define RT5670_VAD_SEL_MASK (0x3 << 8)
1272 #define RT5670_VAD_SEL_SFT 8
1285 #define RT5670_EQ_DITH_MASK (0x3 << 8)
1286 #define RT5670_EQ_DITH_SFT 8
1287 #define RT5670_EQ_DITH_NOR (0x0 << 8)
1288 #define RT5670_EQ_DITH_LSB (0x1 << 8)
1289 #define RT5670_EQ_DITH_LSB_1 (0x2 << 8)
1290 #define RT5670_EQ_DITH_LSB_2 (0x3 << 8)
1293 #define RT5670_EQ_HPF1_M_MASK (0x1 << 8)
1294 #define RT5670_EQ_HPF1_M_SFT 8
1295 #define RT5670_EQ_HPF1_M_HI (0x0 << 8)
1296 #define RT5670_EQ_HPF1_M_1ST (0x1 << 8)
1348 #define RT5670_DRC_AGC_AR_MASK (0x1f << 8)
1349 #define RT5670_DRC_AGC_AR_SFT 8
1362 #define RT5670_DRC_AGC_POB_MASK (0x3f << 8)
1363 #define RT5670_DRC_AGC_POB_SFT 8
1378 #define RT5670_DRC_AGC_NGB_MASK (0xf << 12)
1379 #define RT5670_DRC_AGC_NGB_SFT 12
1415 #define RT5670_JD_SPL_TRG_MASK (0x1 << 8)
1416 #define RT5670_JD_SPL_TRG_SFT 8
1417 #define RT5670_JD_SPL_TRG_LO (0x0 << 8)
1418 #define RT5670_JD_SPL_TRG_HI (0x1 << 8)
1465 #define RT5670_OT_STKY_MASK (0x1 << 12)
1466 #define RT5670_OT_STKY_SFT 12
1467 #define RT5670_OT_STKY_DIS (0x0 << 12)
1468 #define RT5670_OT_STKY_EN (0x1 << 12)
1521 #define RT5670_GP3_PIN_MASK (0x3 << 12)
1522 #define RT5670_GP3_PIN_SFT 12
1523 #define RT5670_GP3_PIN_GPIO3 (0x0 << 12)
1524 #define RT5670_GP3_PIN_DMIC1_SDA (0x1 << 12)
1525 #define RT5670_GP3_PIN_IRQ (0x2 << 12)
1538 #define RT5670_I2S2_PIN_MASK (0x1 << 8)
1539 #define RT5670_I2S2_PIN_SFT 8
1540 #define RT5670_I2S2_PIN_I2S (0x0 << 8)
1541 #define RT5670_I2S2_PIN_GPIO (0x1 << 8)
1582 #define RT5670_GP3_PF_MASK (0x1 << 8)
1583 #define RT5670_GP3_PF_SFT 8
1584 #define RT5670_GP3_PF_IN (0x0 << 8)
1585 #define RT5670_GP3_PF_OUT (0x1 << 8)
1638 #define RT5670_BB_CT_MASK (0x7 << 12)
1639 #define RT5670_BB_CT_SFT 12
1640 #define RT5670_BB_CT_A (0x0 << 12)
1641 #define RT5670_BB_CT_B (0x1 << 12)
1642 #define RT5670_BB_CT_C (0x2 << 12)
1643 #define RT5670_BB_CT_D (0x3 << 12)
1646 #define RT5670_M_BB_R_MASK (0x1 << 8)
1647 #define RT5670_M_BB_R_SFT 8
1664 #define RT5670_EG_MP3_MASK (0x1f << 8)
1665 #define RT5670_EG_MP3_SFT 8
1680 #define RT5670_OG_MP3_MASK (0x1f << 8)
1681 #define RT5670_OG_MP3_SFT 8
1706 #define RT5670_M_3D_D2H_MASK (0x1 << 8)
1707 #define RT5670_M_3D_D2H_SFT 8
1718 #define RT5670_HPF_CF_L_MASK (0x7 << 12)
1719 #define RT5670_HPF_CF_L_SFT 12
1724 #define RT5670_HPF_CF_R_MASK (0x7 << 8)
1725 #define RT5670_HPF_CF_R_SFT 8
1785 #define RT5670_HP_SV_MASK (0x1 << 12)
1786 #define RT5670_HP_SV_SFT 12
1787 #define RT5670_HP_SV_DIS (0x0 << 12)
1788 #define RT5670_HP_SV_EN (0x1 << 12)
1800 #define RT5670_M_ZCD_RM_R (0x1 << 8)
1827 #define RT5670_3D_SPK_CG_MASK (0x1f << 8)
1828 #define RT5670_3D_SPK_CG_SFT 8
1858 /* Wind Noise Detection Control 8 (0x73) */
1859 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1861 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1862 #define RT5670_WND_STRONG_SFT 12
1886 #define RT5670_CMP_MIC_IN_DET_MASK (0x7 << 12)
1910 #define RT5670_IF1_ADC1_IN1_SEL (0x1 << 12)
1911 #define RT5670_IF1_ADC1_IN1_SFT 12