Lines Matching +full:codec +full:- +full:aif1
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * This driver supports the digital controls for the internal codec
6 * (C) Copyright 2010-2016
9 * Mylène Josserand <mylene.josserand@free-electrons.com>
23 #include <sound/soc-dapm.h>
114 regcache_cache_only(scodec->regmap, false); in sun8i_codec_runtime_resume()
116 ret = regcache_sync(scodec->regmap); in sun8i_codec_runtime_resume()
129 regcache_cache_only(scodec->regmap, true); in sun8i_codec_runtime_suspend()
130 regcache_mark_dirty(scodec->regmap); in sun8i_codec_runtime_suspend()
164 return -EINVAL; in sun8i_codec_get_hw_rate()
175 case SND_SOC_DAIFMT_CBS_CFS: /* Codec slave, DAI master */ in sun8i_set_fmt()
178 case SND_SOC_DAIFMT_CBM_CFM: /* Codec Master, DAI slave */ in sun8i_set_fmt()
182 return -EINVAL; in sun8i_set_fmt()
184 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_set_fmt()
197 return -EINVAL; in sun8i_set_fmt()
199 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_set_fmt()
204 * It appears that the DAI and the codec in the A33 SoC don't in sun8i_set_fmt()
210 * that the codec probably gets it backward, and we have to in sun8i_set_fmt()
213 value ^= scodec->quirks->lrck_inversion; in sun8i_set_fmt()
214 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_set_fmt()
234 return -EINVAL; in sun8i_set_fmt()
236 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_set_fmt()
269 unsigned long clk_rate = clk_get_rate(scodec->clk_module); in sun8i_codec_get_bclk_div()
276 unsigned int diff = abs(bdiv->div - div); in sun8i_codec_get_bclk_div()
280 best_val = bdiv->val; in sun8i_codec_get_bclk_div()
293 return -EINVAL; in sun8i_codec_get_lrck_div()
295 return ilog2(div) - 4; in sun8i_codec_get_lrck_div()
308 * codec to handle this type of sample resolution. in sun8i_codec_hw_params()
310 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_codec_hw_params()
315 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_codec_hw_params()
324 regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL, in sun8i_codec_hw_params()
332 regmap_update_bits(scodec->regmap, SUN8I_SYS_SR_CTRL, in sun8i_codec_hw_params()
350 SOC_DAPM_ENUM("AIF1 AD0 Stereo Capture Route",
354 SOC_DAPM_DOUBLE("AIF1 Slot 0 Digital ADC Capture Switch",
362 SOC_DAPM_DOUBLE("AIF1 Data Digital ADC Capture Switch",
379 SOC_DAPM_ENUM("AIF1 DA0 Stereo Playback Route",
383 SOC_DAPM_DOUBLE("AIF1 Slot 0 Digital DAC Playback Switch",
387 SOC_DAPM_DOUBLE("AIF1 Slot 1 Digital DAC Playback Switch",
411 SND_SOC_DAPM_SUPPLY("CLK AIF1",
422 SND_SOC_DAPM_SUPPLY("RST AIF1",
441 SND_SOC_DAPM_AIF_OUT("AIF1 AD0L", "Capture", 0,
444 SND_SOC_DAPM_AIF_OUT("AIF1 AD0R", "Capture", 1,
449 SND_SOC_DAPM_MUX("AIF1 AD0L Stereo Mux", SND_SOC_NOPM, 0, 0,
451 SND_SOC_DAPM_MUX("AIF1 AD0R Stereo Mux", SND_SOC_NOPM, 0, 0,
455 SOC_MIXER_ARRAY("AIF1 AD0L Mixer", SND_SOC_NOPM, 0, 0,
457 SOC_MIXER_ARRAY("AIF1 AD0R Mixer", SND_SOC_NOPM, 0, 0,
461 SND_SOC_DAPM_MUX("AIF1 DA0L Stereo Mux", SND_SOC_NOPM, 0, 0,
463 SND_SOC_DAPM_MUX("AIF1 DA0R Stereo Mux", SND_SOC_NOPM, 0, 0,
467 SND_SOC_DAPM_AIF_IN("AIF1 DA0L", "Playback", 0,
470 SND_SOC_DAPM_AIF_IN("AIF1 DA0R", "Playback", 1,
474 /* ADC Inputs (connected to analog codec DAPM context) */
478 /* DAC Outputs (connected to analog codec DAPM context) */
495 { "CLK AIF1", NULL, "AIF1CLK" },
496 { "CLK AIF1", NULL, "SYSCLK" },
497 { "RST AIF1", NULL, "CLK AIF1" },
498 { "AIF1 AD0L", NULL, "RST AIF1" },
499 { "AIF1 AD0R", NULL, "RST AIF1" },
500 { "AIF1 DA0L", NULL, "RST AIF1" },
501 { "AIF1 DA0R", NULL, "RST AIF1" },
516 { "AIF1 AD0L", NULL, "AIF1 AD0L Stereo Mux" },
517 { "AIF1 AD0R", NULL, "AIF1 AD0R Stereo Mux" },
520 { "AIF1 AD0L Stereo Mux", "Stereo", "AIF1 AD0L Mixer" },
521 { "AIF1 AD0L Stereo Mux", "Reverse Stereo", "AIF1 AD0R Mixer" },
522 { "AIF1 AD0L Stereo Mux", "Sum Mono", "AIF1 AD0L Mixer" },
523 { "AIF1 AD0L Stereo Mux", "Sum Mono", "AIF1 AD0R Mixer" },
524 { "AIF1 AD0L Stereo Mux", "Mix Mono", "AIF1 AD0L Mixer" },
525 { "AIF1 AD0L Stereo Mux", "Mix Mono", "AIF1 AD0R Mixer" },
527 { "AIF1 AD0R Stereo Mux", "Stereo", "AIF1 AD0R Mixer" },
528 { "AIF1 AD0R Stereo Mux", "Reverse Stereo", "AIF1 AD0L Mixer" },
529 { "AIF1 AD0R Stereo Mux", "Sum Mono", "AIF1 AD0L Mixer" },
530 { "AIF1 AD0R Stereo Mux", "Sum Mono", "AIF1 AD0R Mixer" },
531 { "AIF1 AD0R Stereo Mux", "Mix Mono", "AIF1 AD0L Mixer" },
532 { "AIF1 AD0R Stereo Mux", "Mix Mono", "AIF1 AD0R Mixer" },
535 { "AIF1 AD0L Mixer", "AIF1 Slot 0 Digital ADC Capture Switch", "AIF1 DA0L Stereo Mux" },
536 { "AIF1 AD0L Mixer", "AIF1 Data Digital ADC Capture Switch", "ADCL" },
538 { "AIF1 AD0R Mixer", "AIF1 Slot 0 Digital ADC Capture Switch", "AIF1 DA0R Stereo Mux" },
539 { "AIF1 AD0R Mixer", "AIF1 Data Digital ADC Capture Switch", "ADCR" },
542 { "AIF1 DA0L Stereo Mux", "Stereo", "AIF1 DA0L" },
543 { "AIF1 DA0L Stereo Mux", "Reverse Stereo", "AIF1 DA0R" },
544 { "AIF1 DA0L Stereo Mux", "Sum Mono", "AIF1 DA0L" },
545 { "AIF1 DA0L Stereo Mux", "Sum Mono", "AIF1 DA0R" },
546 { "AIF1 DA0L Stereo Mux", "Mix Mono", "AIF1 DA0L" },
547 { "AIF1 DA0L Stereo Mux", "Mix Mono", "AIF1 DA0R" },
549 { "AIF1 DA0R Stereo Mux", "Stereo", "AIF1 DA0R" },
550 { "AIF1 DA0R Stereo Mux", "Reverse Stereo", "AIF1 DA0L" },
551 { "AIF1 DA0R Stereo Mux", "Sum Mono", "AIF1 DA0L" },
552 { "AIF1 DA0R Stereo Mux", "Sum Mono", "AIF1 DA0R" },
553 { "AIF1 DA0R Stereo Mux", "Mix Mono", "AIF1 DA0L" },
554 { "AIF1 DA0R Stereo Mux", "Mix Mono", "AIF1 DA0R" },
561 { "DACL Mixer", "AIF1 Slot 0 Digital DAC Playback Switch", "AIF1 DA0L Stereo Mux" },
564 { "DACR Mixer", "AIF1 Slot 0 Digital DAC Playback Switch", "AIF1 DA0R Stereo Mux" },
569 /* Legacy ADC Inputs (connected to analog codec DAPM context) */
570 SND_SOC_DAPM_ADC("AIF1 Slot 0 Left ADC", NULL, SND_SOC_NOPM, 0, 0),
571 SND_SOC_DAPM_ADC("AIF1 Slot 0 Right ADC", NULL, SND_SOC_NOPM, 0, 0),
573 /* Legacy DAC Outputs (connected to analog codec DAPM context) */
574 SND_SOC_DAPM_DAC("AIF1 Slot 0 Left", NULL, SND_SOC_NOPM, 0, 0),
575 SND_SOC_DAPM_DAC("AIF1 Slot 0 Right", NULL, SND_SOC_NOPM, 0, 0),
580 { "ADCL", NULL, "AIF1 Slot 0 Left ADC" },
581 { "ADCR", NULL, "AIF1 Slot 0 Right ADC" },
584 { "AIF1 Slot 0 Left", NULL, "DACL" },
585 { "AIF1 Slot 0 Right", NULL, "DACR" },
595 if (scodec->quirks->legacy_widgets) { in sun8i_codec_component_probe()
609 * and MCLK (from the CPU DAI connected to AIF1). MCLK's parent is also in sun8i_codec_component_probe()
613 regmap_update_bits(scodec->regmap, SUN8I_SYSCLK_CTL, in sun8i_codec_component_probe()
619 /* Use AIF1CLK as the SYSCLK parent since AIF1 is used most often. */ in sun8i_codec_component_probe()
620 regmap_update_bits(scodec->regmap, SUN8I_SYSCLK_CTL, in sun8i_codec_component_probe()
682 scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL); in sun8i_codec_probe()
684 return -ENOMEM; in sun8i_codec_probe()
686 scodec->clk_module = devm_clk_get(&pdev->dev, "mod"); in sun8i_codec_probe()
687 if (IS_ERR(scodec->clk_module)) { in sun8i_codec_probe()
688 dev_err(&pdev->dev, "Failed to get the module clock\n"); in sun8i_codec_probe()
689 return PTR_ERR(scodec->clk_module); in sun8i_codec_probe()
694 dev_err(&pdev->dev, "Failed to map the registers\n"); in sun8i_codec_probe()
698 scodec->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "bus", base, in sun8i_codec_probe()
700 if (IS_ERR(scodec->regmap)) { in sun8i_codec_probe()
701 dev_err(&pdev->dev, "Failed to create our regmap\n"); in sun8i_codec_probe()
702 return PTR_ERR(scodec->regmap); in sun8i_codec_probe()
705 scodec->quirks = of_device_get_match_data(&pdev->dev); in sun8i_codec_probe()
709 pm_runtime_enable(&pdev->dev); in sun8i_codec_probe()
710 if (!pm_runtime_enabled(&pdev->dev)) { in sun8i_codec_probe()
711 ret = sun8i_codec_runtime_resume(&pdev->dev); in sun8i_codec_probe()
716 ret = devm_snd_soc_register_component(&pdev->dev, &sun8i_soc_component, in sun8i_codec_probe()
719 dev_err(&pdev->dev, "Failed to register codec\n"); in sun8i_codec_probe()
726 if (!pm_runtime_status_suspended(&pdev->dev)) in sun8i_codec_probe()
727 sun8i_codec_runtime_suspend(&pdev->dev); in sun8i_codec_probe()
730 pm_runtime_disable(&pdev->dev); in sun8i_codec_probe()
737 pm_runtime_disable(&pdev->dev); in sun8i_codec_remove()
738 if (!pm_runtime_status_suspended(&pdev->dev)) in sun8i_codec_remove()
739 sun8i_codec_runtime_suspend(&pdev->dev); in sun8i_codec_remove()
753 { .compatible = "allwinner,sun8i-a33-codec", .data = &sun8i_a33_quirks },
754 { .compatible = "allwinner,sun50i-a64-codec", .data = &sun50i_a64_quirks },
766 .name = "sun8i-codec",
775 MODULE_DESCRIPTION("Allwinner A33 (sun8i) codec driver");
776 MODULE_AUTHOR("Mylène Josserand <mylene.josserand@free-electrons.com>");
778 MODULE_ALIAS("platform:sun8i-codec");