Lines Matching refs:addr
41 #define MMI_LWX(reg, addr, stride, bias) \ argument
42 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
45 #define MMI_SWX(reg, addr, stride, bias) \ argument
46 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
49 #define MMI_LDX(reg, addr, stride, bias) \ argument
50 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
53 #define MMI_SDX(reg, addr, stride, bias) \ argument
54 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
57 #define MMI_LWC1(fp, addr, bias) \ argument
58 "lwc1 "#fp", "#bias"("#addr") \n\t"
60 #define MMI_ULWC1(fp, addr, bias) \ argument
61 "ulw %[low32], "#bias"("#addr") \n\t" \
64 #define MMI_LWXC1(fp, addr, stride, bias) \ argument
65 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
68 #define MMI_SWC1(fp, addr, bias) \ argument
69 "swc1 "#fp", "#bias"("#addr") \n\t"
71 #define MMI_USWC1(fp, addr, bias) \ argument
73 "usw %[low32], "#bias"("#addr") \n\t"
75 #define MMI_SWXC1(fp, addr, stride, bias) \ argument
76 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
79 #define MMI_LDC1(fp, addr, bias) \ argument
80 "ldc1 "#fp", "#bias"("#addr") \n\t"
82 #define MMI_ULDC1(fp, addr, bias) \ argument
83 "uld %[all64], "#bias"("#addr") \n\t" \
86 #define MMI_LDXC1(fp, addr, stride, bias) \ argument
87 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
90 #define MMI_SDC1(fp, addr, bias) \ argument
91 "sdc1 "#fp", "#bias"("#addr") \n\t"
93 #define MMI_USDC1(fp, addr, bias) \ argument
95 "usd %[all64], "#bias"("#addr") \n\t"
97 #define MMI_SDXC1(fp, addr, stride, bias) \ argument
98 PTR_ADDU "%[addrt], "#addr", "#stride" \n\t" \
101 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
102 "ld "#reg1", "#bias"("#addr") \n\t" \
103 "ld "#reg2", 8+"#bias"("#addr") \n\t"
105 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
106 "sd "#reg1", "#bias"("#addr") \n\t" \
107 "sd "#reg2", 8+"#bias"("#addr") \n\t"
109 #define MMI_LQC1(fp1, fp2, addr, bias) \ argument
110 "ldc1 "#fp1", "#bias"("#addr") \n\t" \
111 "ldc1 "#fp2", 8+"#bias"("#addr") \n\t"
113 #define MMI_SQC1(fp1, fp2, addr, bias) \ argument
114 "sdc1 "#fp1", "#bias"("#addr") \n\t" \
115 "sdc1 "#fp2", 8+"#bias"("#addr") \n\t"
124 #define MMI_LWX(reg, addr, stride, bias) \ argument
125 "gslwx "#reg", "#bias"("#addr", "#stride") \n\t"
127 #define MMI_SWX(reg, addr, stride, bias) \ argument
128 "gsswx "#reg", "#bias"("#addr", "#stride") \n\t"
130 #define MMI_LDX(reg, addr, stride, bias) \ argument
131 "gsldx "#reg", "#bias"("#addr", "#stride") \n\t"
133 #define MMI_SDX(reg, addr, stride, bias) \ argument
134 "gssdx "#reg", "#bias"("#addr", "#stride") \n\t"
136 #define MMI_LWC1(fp, addr, bias) \ argument
137 "lwc1 "#fp", "#bias"("#addr") \n\t"
144 #define MMI_ULWC1(fp, addr, bias) \ argument
145 "ulw %[low32], "#bias"("#addr") \n\t" \
153 #define MMI_ULWC1(fp, addr, bias) \ argument
154 "gslwlc1 "#fp", 3+"#bias"("#addr") \n\t" \
155 "gslwrc1 "#fp", "#bias"("#addr") \n\t"
159 #define MMI_LWXC1(fp, addr, stride, bias) \ argument
160 "gslwxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
162 #define MMI_SWC1(fp, addr, bias) \ argument
163 "swc1 "#fp", "#bias"("#addr") \n\t"
165 #define MMI_USWC1(fp, addr, bias) \ argument
166 "gsswlc1 "#fp", 3+"#bias"("#addr") \n\t" \
167 "gsswrc1 "#fp", "#bias"("#addr") \n\t"
169 #define MMI_SWXC1(fp, addr, stride, bias) \ argument
170 "gsswxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
172 #define MMI_LDC1(fp, addr, bias) \ argument
173 "ldc1 "#fp", "#bias"("#addr") \n\t"
175 #define MMI_ULDC1(fp, addr, bias) \ argument
176 "gsldlc1 "#fp", 7+"#bias"("#addr") \n\t" \
177 "gsldrc1 "#fp", "#bias"("#addr") \n\t"
179 #define MMI_LDXC1(fp, addr, stride, bias) \ argument
180 "gsldxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
182 #define MMI_SDC1(fp, addr, bias) \ argument
183 "sdc1 "#fp", "#bias"("#addr") \n\t"
185 #define MMI_USDC1(fp, addr, bias) \ argument
186 "gssdlc1 "#fp", 7+"#bias"("#addr") \n\t" \
187 "gssdrc1 "#fp", "#bias"("#addr") \n\t"
189 #define MMI_SDXC1(fp, addr, stride, bias) \ argument
190 "gssdxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
192 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
193 "gslq "#reg1", "#reg2", "#bias"("#addr") \n\t"
195 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
196 "gssq "#reg1", "#reg2", "#bias"("#addr") \n\t"
198 #define MMI_LQC1(fp1, fp2, addr, bias) \ argument
199 "gslqc1 "#fp1", "#fp2", "#bias"("#addr") \n\t"
201 #define MMI_SQC1(fp1, fp2, addr, bias) \ argument
202 "gssqc1 "#fp1", "#fp2", "#bias"("#addr") \n\t"