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/kernel/linux/linux-5.10/arch/mips/include/asm/txx9/
Dtx3927.h19 #define TX3927_NR_TMR 3
27 volatile unsigned long tr[3];
58 #define endian_def_sb2(e1, e2, e3) \ argument
59 volatile unsigned short e1;volatile unsigned char e2, e3
60 #define endian_def_b2s(e1, e2, e3) \ argument
61 volatile unsigned char e1, e2;volatile unsigned short e3
62 #define endian_def_b4(e1, e2, e3, e4) \ argument
63 volatile unsigned char e1, e2, e3, e4
67 #define endian_def_sb2(e1, e2, e3) \ argument
68 volatile unsigned char e3, e2;volatile unsigned short e1
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/kernel/linux/linux-5.10/arch/m68k/fpsp040/
Dx_ovfl.S77 btstb #E3,E_BYTE(%a6)
79 bfextu CMDREG3B(%a6){#6:#3},%d0 |get dest reg no
100 | andi.b #$3,%d0
107 btstb #E3,E_BYTE(%a6)
109 bfextu CMDREG3B(%a6){#6:#3},%d0 |get dest reg no
124 bclrb #E3,E_BYTE(%a6) |test and clear E3 bit
130 bfextu CMDREG3B(%a6){#6:#3},%d0 |get dest reg no
156 btstb #E3,E_BYTE(%a6) |test E3 bit
169 cmpiw #3,%d0 |check for opclass3
Dx_unfl.S61 btstb #E3,E_BYTE(%a6)
67 bfextu CMDREG3B(%a6){#6:#3},%d0 |get dest reg no
95 btstb #E3,E_BYTE(%a6)
101 bfextu CMDREG3B(%a6){#6:#3},%d0 |get dest reg no
116 bclrb #E3,E_BYTE(%a6)
122 bfextu CMDREG3B(%a6){#6:#3},%d0 |get dest reg no
151 | If the exception bit set is E3, the exceptional operand from the
154 btstb #E3,E_BYTE(%a6)
232 | ;double $3ff $3fe
Dgen_except.S80 bfextu CMDREG1B(%a6){#10:#3},%d1 |extract bit 3,4,5
168 | exception is to set the E1/E3 byte and clr the U flag.
170 | operr, and dz. commonE3 does this for E3 exceptions, which
182 bsetb #E3,E_BYTE(%a6) |set E3 flag
190 bsetb #E3,E_BYTE(%a6) |set E3 flag
199 bfextu CMDREG1B(%a6){#10:#3},%d1 |extract bit 3,4,5
300 bsetb #E3,E_BYTE(%a6) |set E3 flag
311 bfextu CMDREG1B(%a6){#10:#3},%d1 |extract bit 3,4,5
319 |** NOTE *** Bug fix for errata (0d43b #3)
Dutil.S103 btstb #E3,E_BYTE(%a6) |check for nu exception
159 | This entry point used by x_ovfl. (opclass 3 only)
182 lsll #2,%d0 |move round precision to d0{3:2}
184 orl %d1,%d0 |index is fmt:mode in d0{3:0}
328 | if E3
355 btstb #E3,E_BYTE(%a6)
423 btstb #E3,E_BYTE(%a6)
426 clrl %d0 |if E3, only opclass 0x0 is possible
430 bfextu %d0{#0:#3},%d0 |shift opclass bits d0{31:29} to d0{2:0}
436 | If E3, the format is extended.
[all …]
Dskeleton.S84 | The provided code will clear the E3 exception (if pending),
145 bclrb #E3,E_BYTE(%a6) |clear and test E3 flag
152 bfextu CMDREG1B(%a6){#6:#3},%d0 |get dest reg no
182 bclrb #E3,E_BYTE(%a6) |clear and test E3 flag
208 bclrb #E3,E_BYTE(%a6) |clear and test E3 flag
Dfpsp.h93 .set FPCR_MODE,USER_FPCR+3 | FPCR rounding mode control
98 .set FPSR_AEXCEPT,USER_FPSR+3 | FPSR accrued exception
142 .set CMDREG3B,LV-48 | cmd reg for E3 exceptions (2 bytes)
153 .set nmc_snan_bit,3
162 .set stag_mask,0xE0 | upper 3 bits are source tag type
183 .set dtag_mask,0xE0 | upper 3 bits are dest type tag
189 .set E_BYTE,LV-28 | holds E1 and E3 bits (1 byte)
191 .set E3,1 | which bit is E3 flag
222 .set neg_bit,3 | negative result
233 .set unfl_bit,3 | underflow
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/kernel/linux/linux-5.10/drivers/edac/
Die31200_edac.c3 * Intel E3-1200
6 * Support for the E3-1200 processor family. Heavily based on previous
14 * 0108: Xeon E3-1200 Processor Family DRAM Controller
15 * 010c: Xeon E3-1200/2nd Generation Core Processor Family DRAM Controller
16 * 0150: Xeon E3-1200 v2/3rd Gen Core processor DRAM Controller
17 * 0158: Xeon E3-1200 v2/Ivy Bridge DRAM Controller
18 * 015c: Xeon E3-1200 v2/3rd Gen Core processor DRAM Controller
19 * 0c04: Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller
20 * 0c08: Xeon E3-1200 v3 Processor DRAM Controller
21 * 1918: Xeon E3-1200 v5 Skylake Host Bridge/DRAM Registers
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/kernel/liteos_a/testsuites/unittest/libc/time/clock/full/
Dclock_test_010.cpp15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
76 (void)SleepTest(3); // 3, ns. in ClockTestThread()
77 (void)SleepTest(40e3); // 40us in ClockTestThread()
78 (void)SleepTest(50e3); // 50us in ClockTestThread()
79 (void)SleepTest(50e3 + 1); // 50us+1ns in ClockTestThread()
80 (void)SleepTest(60e3); // 60us in ClockTestThread()
81 (void)SleepTest(65e3); // 65us in ClockTestThread()
/kernel/linux/linux-5.10/Documentation/input/
Dshape.svg9 …<polyline transform="translate(-121.88 -68.4)" points="3600 3600 3e3 3600" fill="none" stroke="#00…
10 …<polyline transform="translate(-121.88 -68.4)" points="4125 3075 3e3 3075" fill="none" stroke="#00…
17 …<polyline transform="translate(-121.88 -68.4)" points="3e3 3167 3e3 3583" fill="none" stroke="#000…
18 …<polyline transform="translate(-121.88 -68.4)" points="2970 3478 3e3 3598 3030 3478" fill="none" s…
19 …<polyline transform="translate(-121.88 -68.4)" points="3030 3272 3e3 3152 2970 3272" fill="none" s…
Dinteractive.svg2 …<polyline transform="translate(-18.5,-16.294)" points="1200 3600 1800 3600 2400 4800 3e3 4800 4200…
6 …<polyline transform="translate(-18.5,-16.294)" points="3e3 4800 3e3 6525 3600 7125 3600 7800" fill…
/kernel/linux/linux-5.10/drivers/gpu/drm/rcar-du/
Drcar_lvds_regs.h26 #define LVDCR1_CHSTBY(n) (3 << (2 + (n) * 2))
27 #define LVDCR1_CLKSTBY (3 << 0)
39 /* Gen3 but V3M,D3 and E3 */
45 /* D3 and E3 */
51 #define LVDPLLCR_CKSEL_EXTAL (3 << 17)
58 #define LVDPLLCR_PLLN(n) ((n) << 3)
69 #define LVDCTRCR_CTR2SEL_HSYNC (3 << 8)
75 #define LVDCTRCR_CTR1SEL_CDE (3 << 4)
81 #define LVDCTRCR_CTR0SEL_ODD (3 << 0)
86 #define LVDCHCR_CHSEL_CH(n, c) ((((c) - (n)) & 3) << ((n) * 4))
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/kernel/linux/linux-5.10/drivers/soc/renesas/
Dr8a77990-sysc.c3 * Renesas R-Car E3 System Controller
27 { "3dg-a", 0x100, 0, R8A77990_PD_3DG_A, R8A77990_PD_ALWAYS_ON },
28 { "3dg-b", 0x100, 1, R8A77990_PD_3DG_B, R8A77990_PD_3DG_A },
31 /* Fixups for R-Car E3 ES1.0 revision */
40 /* Fix incorrect 3DG hierarchy */ in r8a77990_sysc_init()
Dr8a774c0-sysc.c6 * Based on Renesas R-Car E3 System Controller
27 { "3dg-a", 0x100, 0, R8A774C0_PD_3DG_A, R8A774C0_PD_ALWAYS_ON },
28 { "3dg-b", 0x100, 1, R8A774C0_PD_3DG_B, R8A774C0_PD_3DG_A },
40 /* Fix incorrect 3DG hierarchy */ in r8a774c0_sysc_init()
/kernel/linux/linux-5.10/lib/
Dlocking-selftest.c275 static void name##_123(void) { E1(); E2(); E3(); } \
276 static void name##_132(void) { E1(); E3(); E2(); } \
277 static void name##_213(void) { E2(); E1(); E3(); } \
278 static void name##_231(void) { E2(); E3(); E1(); } \
279 static void name##_312(void) { E3(); E1(); E2(); } \
280 static void name##_321(void) { E3(); E2(); E1(); }
896 #define E3() \ macro
926 #undef E3
945 #define E3() \ macro
974 #undef E3
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/kernel/linux/linux-5.10/Documentation/admin-guide/hw-vuln/
Dprocessor_mmio_stale_data.rst37 Intel Xeon server E3) uncore implementation. The sideband response buffer is
47 Intel Xeon server E3) uncore implementation. Similar to the sideband response
68 the fill buffer. It is limited to the client (including Intel Xeon server E3)
75 the client (including Intel Xeon server E3) uncore implementation.
80 processors for the server market (excluding Intel Xeon E3 processors) are
89 SKYLAKE_L 06_4EH 3
91 SKYLAKE_X 06_55H 3,4,6,7,11
92 BROADWELL_D 06_56H 3,4,5
93 SKYLAKE 06_5EH 3
103 COMETLAKE 06_A5H 2,3,5
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/
Dmdp_format.c63 #define FMT(name, a, r, g, b, e0, e1, e2, e3, alpha, tight, c, cnt, fp, cs, yuv) { \ argument
69 .unpack = { e0, e1, e2, e3 }, \
86 /* name a r g b e0 e1 e2 e3 alpha tight cpp cnt ... */
87 FMT(ARGB8888, 8, 8, 8, 8, 1, 0, 2, 3, true, true, 4, 4,
89 FMT(ABGR8888, 8, 8, 8, 8, 2, 0, 1, 3, true, true, 4, 4,
91 FMT(RGBA8888, 8, 8, 8, 8, 3, 1, 0, 2, true, true, 4, 4,
93 FMT(BGRA8888, 8, 8, 8, 8, 3, 2, 0, 1, true, true, 4, 4,
95 FMT(XRGB8888, 8, 8, 8, 8, 1, 0, 2, 3, false, true, 4, 4,
97 FMT(XBGR8888, 8, 8, 8, 8, 2, 0, 1, 3, false, true, 4, 4,
99 FMT(RGBX8888, 8, 8, 8, 8, 3, 1, 0, 2, false, true, 4, 4,
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/kernel/linux/linux-5.10/arch/powerpc/crypto/
Daes-tab-4k.S50 .long R(3d, 93, 93, ae), R(4c, 26, 26, 6a)
51 .long R(6c, 36, 36, 5a), R(7e, 3f, 3f, 41)
56 .long R(62, 31, 31, 53), R(2a, 15, 15, 3f)
62 .long R(1b, 80, 80, 9b), R(df, e2, e2, 3d)
69 .long R(a4, 52, 52, f6), R(76, 3b, 3b, 4d)
71 .long R(52, 29, 29, 7b), R(dd, e3, e3, 3e)
75 .long R(40, 20, 20, 60), R(e3, fc, fc, 1f)
87 .long R(a0, 50, 50, f0), R(78, 3c, 3c, 44)
88 .long R(25, 9f, 9f, ba), R(4b, a8, a8, e3)
91 .long R(3f, 92, 92, ad), R(21, 9d, 9d, bc)
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/kernel/linux/linux-5.10/drivers/video/fbdev/omap/
Dlcd_ams_delta.c5 * LCD panel support for the Amstrad E3 (Delta) videophone.
112 .hsw = 3,
178 MODULE_DESCRIPTION("LCD panel support for the Amstrad E3 (Delta) videophone");
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Dallwinner,sun8i-a23-rsb.yaml66 clocks = <&apb0_gates 3>;
68 resets = <&apb0_rst 3>;
72 pmic@3e3 {
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Drenesas,du.txt27 - "renesas,du-r8a77990" for R8A77990 (R-Car E3) compatible DU
95 R8A77990 (R-Car E3) DPAD 0 LVDS 0 LVDS 1 -
112 clock-names = "du.0", "du.1", "du.2", "du.3";
139 port@3 {
140 reg = <3>;
/kernel/linux/linux-5.10/sound/soc/ti/
DKconfig62 Texas Instruments OMAP1/2/3/4/5 SoCs.
132 tristate "SoC Audio support for Amstrad E3 (Delta) videophone"
138 connected to a handset and a speakerphone found on Amstrad E3 (Delta)
/kernel/linux/linux-5.10/Documentation/x86/
Dexception-tables.rst86 "3: movl %3,%0\n"
91 " .long 1b,3b\n"
100 "3: movl %3,%0\n"
105 " .long 1b,3b\n"
114 "3: movl %3,%0\n"
118 " .align 4\n" " .long 1b,3b\n"
147 > 3: movl $-14,%eax
152 > .long 1b,3b
177 > 3 __ex_table 000015c0 c01a9724 c01a9724 000aa724 2**2
199 > c017e79d <do_con_write+d9> ja c017e7a7 <do_con_write+e3>
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_formats.c33 #define INTERLEAVED_RGB_FMT(fmt, a, r, g, b, e0, e1, e2, e3, uc, alpha, \ argument
39 .element = { (e0), (e1), (e2), (e3) }, \
52 #define INTERLEAVED_RGB_FMT_TILED(fmt, a, r, g, b, e0, e1, e2, e3, uc, \ argument
58 .element = { (e0), (e1), (e2), (e3) }, \
72 #define INTERLEAVED_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, e3, \ argument
78 .element = { (e0), (e1), (e2), (e3)}, \
246 C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
247 false, 3, 0,
252 C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
253 false, 3, 0,
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/kernel/linux/linux-5.10/drivers/media/usb/gspca/gl860/
Dgl860.c246 .priv = 3
273 .priv = 3
477 if (sd->nbRightUp == -3) { in sd_callback()
486 if (sd->nbRightUp == 3) { in sd_callback()
616 if (memcmp(tbl[n].data, "\xff\xff\xff", 3) != 0) in fetch_idxdata()
617 ctrl_out(gspca_dev, 0x40, 3, 0x7a00, tbl[n].idx, in fetch_idxdata()
618 3, tbl[n].data); in fetch_idxdata()
638 msleep(3); in gl860_guess_sensor()
640 msleep(3); in gl860_guess_sensor()
642 msleep(3); in gl860_guess_sensor()
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