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/kernel/linux/linux-5.10/arch/x86/crypto/
Dserpent-sse2-i586-asm_32.S3 * Serpent Cipher 4-way parallel algorithm (i586/SSE2)
17 #define arg_ctx 4
23 4-way SSE2 serpent
39 movd (4*(i)+(j))*4(CTX), t; \
42 #define K(x0, x1, x2, x3, x4, i) \ argument
48 pxor RT1, x2; \
52 #define LK(x0, x1, x2, x3, x4, i) \ argument
58 movdqa x2, x4; \
59 pslld $3, x2; \
61 por x4, x2; \
[all …]
Dserpent-sse2-x86_64-asm_64.S41 #define S0_1(x0, x1, x2, x3, x4) \ argument
45 pxor x2, x4; \
50 pxor x0, x2;
51 #define S0_2(x0, x1, x2, x3, x4) \ argument
54 pxor x2, x0; \
55 pand x1, x2; \
56 pxor x2, x3; \
58 pxor x4, x2; \
59 pxor x2, x1;
61 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
Dglue_helper-asm-avx.S8 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
11 vmovdqu (2*16)(src), x2; \
13 vmovdqu (4*16)(src), x4; \
18 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
21 vmovdqu x2, (2*16)(dst); \
23 vmovdqu x4, (4*16)(dst); \
28 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
30 vpxor (1*16)(src), x2, x2; \
33 vpxor (4*16)(src), x5, x5; \
36 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
[all …]
Dglue_helper-asm-avx2.S8 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
11 vmovdqu (2*32)(src), x2; \
13 vmovdqu (4*32)(src), x4; \
18 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
21 vmovdqu x2, (2*32)(dst); \
23 vmovdqu x4, (4*32)(dst); \
28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument
33 vpxor (1*32+16)(src), x2, x2; \
36 vpxor (4*32+16)(src), x5, x5; \
39 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
[all …]
/kernel/linux/linux-5.10/crypto/
Dserpent_generic.c32 #define loadkeys(x0, x1, x2, x3, i) \ argument
33 ({ x0 = k[i]; x1 = k[i+1]; x2 = k[i+2]; x3 = k[i+3]; })
35 #define storekeys(x0, x1, x2, x3, i) \ argument
36 ({ k[i] = x0; k[i+1] = x1; k[i+2] = x2; k[i+3] = x3; })
38 #define store_and_load_keys(x0, x1, x2, x3, s, l) \ argument
39 ({ storekeys(x0, x1, x2, x3, s); loadkeys(x0, x1, x2, x3, l); })
41 #define K(x0, x1, x2, x3, i) ({ \ argument
42 x3 ^= k[4*(i)+3]; x2 ^= k[4*(i)+2]; \
43 x1 ^= k[4*(i)+1]; x0 ^= k[4*(i)+0]; \
46 #define LK(x0, x1, x2, x3, x4, i) ({ \ argument
[all …]
/kernel/linux/linux-5.10/arch/arm64/crypto/
Dchacha-neon-core.S42 ld1 {v12.4s}, [x10]
46 add v0.4s, v0.4s, v1.4s
50 // x2 += x3, x1 = rotl32(x1 ^ x2, 12)
51 add v2.4s, v2.4s, v3.4s
53 shl v1.4s, v4.4s, #12
54 sri v1.4s, v4.4s, #20
57 add v0.4s, v0.4s, v1.4s
61 // x2 += x3, x1 = rotl32(x1 ^ x2, 7)
62 add v2.4s, v2.4s, v3.4s
64 shl v1.4s, v4.4s, #7
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/sunxi/
Dpinctrl-sun9i-a80.c25 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
31 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
37 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
43 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
49 SUNXI_FUNCTION(0x2, "gmac"), /* RXCK */
51 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PA_EINT4 */
55 SUNXI_FUNCTION(0x2, "gmac"), /* RXCTL */
61 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
67 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
[all …]
Dpinctrl-sun50i-a100.c21 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
35 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
42 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
49 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
52 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
56 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
69 SUNXI_FUNCTION(0x2, "spdif"), /* DIN */
76 SUNXI_FUNCTION(0x2, "spdif"), /* DOUT */
[all …]
Dpinctrl-sun8i-a23.c29 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
35 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
41 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
47 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
50 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
53 SUNXI_FUNCTION(0x2, "uart4"), /* TX */
54 SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PA_EINT4 */
58 SUNXI_FUNCTION(0x2, "uart4"), /* RX */
63 SUNXI_FUNCTION(0x2, "uart4"), /* RTS */
68 SUNXI_FUNCTION(0x2, "uart4"), /* CTS */
[all …]
Dpinctrl-sun8i-a33.c28 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
34 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
40 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
45 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
47 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
50 SUNXI_FUNCTION(0x2, "i2s0"), /* SYNC */
52 SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PB_EINT4 */
56 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
62 SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
68 SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
[all …]
Dpinctrl-sun50i-h6.c18 SUNXI_FUNCTION(0x2, "emac")), /* ERXD1 */
20 SUNXI_FUNCTION(0x2, "emac")), /* ERXD0 */
22 SUNXI_FUNCTION(0x2, "emac")), /* ECRS_DV */
24 SUNXI_FUNCTION(0x2, "emac")), /* ERXERR */
25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
26 SUNXI_FUNCTION(0x2, "emac")), /* ETXD1 */
28 SUNXI_FUNCTION(0x2, "emac")), /* ETXD0 */
30 SUNXI_FUNCTION(0x2, "emac")), /* ETXCK */
32 SUNXI_FUNCTION(0x2, "emac")), /* ETXEN */
34 SUNXI_FUNCTION(0x2, "emac")), /* EMDC */
[all …]
Dpinctrl-sun8i-a83t.c28 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
34 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
40 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
46 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
49 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
52 SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */
54 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PB_EINT4 */
58 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
64 SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
70 SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
[all …]
Dpinctrl-sun50i-a64.c27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
33 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
40 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
47 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
55 SUNXI_FUNCTION(0x2, "aif2"), /* SYNC */
58 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* EINT4 */
62 SUNXI_FUNCTION(0x2, "aif2"), /* BCLK */
69 SUNXI_FUNCTION(0x2, "aif2"), /* DOUT */
76 SUNXI_FUNCTION(0x2, "aif2"), /* DIN */
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dtscs454.h17 #define R_IRQEN VIRT_ADDR(0x0, 0x2)
69 #define R_HSDCTL2 VIRT_ADDR(0x1, 0x2)
100 #define R_DACCTL VIRT_ADDR(0x2, 0x1)
101 #define R_SPKCTL VIRT_ADDR(0x2, 0x2)
102 #define R_SUBCTL VIRT_ADDR(0x2, 0x3)
103 #define R_DCCTL VIRT_ADDR(0x2, 0x4)
104 #define R_OVOLCTLU VIRT_ADDR(0x2, 0x6)
105 #define R_MUTEC VIRT_ADDR(0x2, 0x7)
106 #define R_MVOLL VIRT_ADDR(0x2, 0x8)
107 #define R_MVOLR VIRT_ADDR(0x2, 0x9)
[all …]
Dtas5720.h45 #define TAS5720_SAIF_RIGHTJ_18BIT (0x2)
53 #define TAS5720_MUTE BIT(4)
57 #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4)
58 #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4)
59 #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4)
60 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4)
61 #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4)
62 #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4)
63 #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4)
64 #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4)
[all …]
Dtas2552.h43 #define TAS2552_PLL_SRC_MCLK (0x0 << 4)
44 #define TAS2552_PLL_SRC_BCLK (0x1 << 4)
45 #define TAS2552_PLL_SRC_IVCLKIN (0x2 << 4)
46 #define TAS2552_PLL_SRC_1_8_FIXED (0x3 << 4)
60 #define TAS2552_WCLK_FREQ_16KHZ (0x2 << 0)
69 #define TAS2552_DIN_SRC_SEL_RIGHT (0x2 << 3)
81 #define TAS2552_WORDLENGTH_24BIT (0x2 << 0)
86 #define TAS2552_DATAFORMAT_RIGHT_J (0x2 << 2)
89 #define TAS2552_CLKSPERFRAME_32 (0x0 << 4)
90 #define TAS2552_CLKSPERFRAME_64 (0x1 << 4)
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/drx39xyj/
Ddrxj_map.h62 #define ATV_COMM_EXEC_HOLD 0x2
108 #define ATV_TOP_COMM_EXEC_HOLD 0x2
129 #define ATV_TOP_COMM_MB_OBS__M 0x2
133 #define ATV_TOP_COMM_MB_MUX_CTRL__W 4
147 #define ATV_TOP_COMM_MB_MUX_OBS__W 4
176 #define ATV_TOP_COMM_INT_STA_OVM_STA__M 0x2
196 #define ATV_TOP_COMM_INT_MSK_OVM_MSK__M 0x2
216 #define ATV_TOP_COMM_INT_STM_OVM_STM__M 0x2
277 #define ATV_TOP_NOISE_TH__W 4
346 #define ATV_TOP_MOD_CONTROL_MOD_IF__W 4
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dmpc8569mds.dts34 0x2 0x0 0x0 0xf0000000 0x04000000
91 pib@4,0 {
93 reg = <4 0 0x8000>;
143 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
144 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */
145 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
148 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
149 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
150 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */
151 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
[all …]
Dp1025rdb.dtsi102 /* 4MB for Linux Kernel Image */
108 /* 4MB for Compressed Root file System Image */
158 /* 4MB for Linux Kernel Image */
164 /* 4MB for Compressed RFS Image */
253 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
254 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
255 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
256 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
257 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
258 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
[all …]
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/
Dentry.S28 adr_this_cpu x1, kvm_hyp_ctxt, x2
34 save_sp_el0 x1, x2
50 set_loaded_vcpu x0, x1, x2
59 ptrauth_switch_to_guest x29, x0, x1, x2
66 ldp x2, x3, [x29, #CPU_XREG_OFFSET(2)]
67 ldp x4, x5, [x29, #CPU_XREG_OFFSET(4)]
83 // x2-x29,lr: vcpu regs
105 // x2-x29,lr: vcpu regs
112 // Store the guest regs x2 and x3
113 stp x2, x3, [x1, #CPU_XREG_OFFSET(2)]
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/selftests/
Dtest-drm_rect.c52 FAIL(src.x1 != 0 || src.x2 != 1 << 16 || in igt_drm_rect_clip_scaled_not_clipped()
55 FAIL(dst.x1 != 0 || dst.x2 != 1 || in igt_drm_rect_clip_scaled_not_clipped()
68 FAIL(src.x1 != 0 || src.x2 != 2 << 16 || in igt_drm_rect_clip_scaled_not_clipped()
71 FAIL(dst.x1 != 0 || dst.x2 != 1 || in igt_drm_rect_clip_scaled_not_clipped()
84 FAIL(src.x1 != 0 || src.x2 != 1 << 16 || in igt_drm_rect_clip_scaled_not_clipped()
87 FAIL(dst.x1 != 0 || dst.x2 != 2 || in igt_drm_rect_clip_scaled_not_clipped()
108 FAIL(src.x1 != 0 || src.x2 != 1 << 16 || in igt_drm_rect_clip_scaled_clipped()
111 FAIL(dst.x1 != 0 || dst.x2 != 1 || in igt_drm_rect_clip_scaled_clipped()
124 FAIL(src.x1 != 1 << 16 || src.x2 != 2 << 16 || in igt_drm_rect_clip_scaled_clipped()
127 FAIL(dst.x1 != 1 || dst.x2 != 2 || in igt_drm_rect_clip_scaled_clipped()
[all …]
/kernel/linux/linux-5.10/arch/arm64/lib/
Dcrc32.S15 cmp x2, #16
18 and x7, x2, #0x1f
19 and x2, x2, #~0x1f
36 tst x7, #4
53 cbz x2, 0f
56 sub x2, x2, #32
66 cbnz x2, 32b
69 8: tbz x2, #3, 4f
73 4: tbz x2, #2, 2f
74 ldr w3, [x1], #4
[all …]
/kernel/linux/linux-5.10/drivers/power/supply/
Dpm2301_charger.h12 #define WD_TIMER 0x30 /* 4min */
78 #define PM2XXX_CH_AUTO_RESUME_EN 0X2
86 #define PM2XXX_CH_WD_CC_PHASE_10MIN 0x2
95 #define PM2XXX_CH_WD_CV_PHASE_10MIN (0x2<<3)
102 /* control Reg 4 */
105 #define PM2XXX_CH_WD_PRECH_PHASE_5MIN 0x2
119 #define PM2XXX_DIR_CH_CC_CURRENT_400MA 0x2
135 #define PM2XXX_CH_PRECH_CURRENT_25MA (0x0<<4)
136 #define PM2XXX_CH_PRECH_CURRENT_50MA (0x1<<4)
137 #define PM2XXX_CH_PRECH_CURRENT_75MA (0x2<<4)
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/syscon/
Dimx6q-iomuxc-gpr.h29 #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_SSI3_SSI_SRCK (0x2 << 30)
34 #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_DO_SCKR (0x2 << 28)
38 #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_SSI3_SSI_STCK (0x2 << 26)
48 #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_SSI2_SSI_STCK (0x2 << 22)
53 #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_SSI2_SSI_SRCK (0x2 << 20)
58 #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_SSI1_SSI_STCK (0x2 << 18)
63 #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_SSI1_SSI_SRCK (0x2 << 16)
68 #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK3 (0x2 << 14)
78 #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_MASK BIT(4)
80 #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_I2C1 BIT(4)
[all …]
/kernel/linux/linux-5.10/include/soc/fsl/qe/
Dimmap_qe.h60 u8 res1[0x2];
69 u8 res3[0x2];
72 u8 res5[0x2];
74 u8 res6[0x2];
76 u8 res7[0x2];
78 u8 res8[0x2];
80 u8 res9[0x2];
82 u8 res10[0x2];
83 __be16 ceexe4; /* QE external request 4 event register */
84 u8 res11[0x2];
[all …]

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