Home
last modified time | relevance | path

Searched +full:7 +full:- +full:bit (Results 1 – 25 of 1066) sorted by relevance

12345678910>>...43

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
32 - ad,adm9240
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/da9062/
Dregisters.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
151 * Bit fields
158 #define DA9062AA_WRITE_MODE_MASK BIT(6)
159 #define DA9062AA_REVERT_SHIFT 7
160 #define DA9062AA_REVERT_MASK BIT(7)
166 #define DA9062AA_DVC_BUSY_MASK BIT(2)
172 #define DA9062AA_GPI1_MASK BIT(1)
174 #define DA9062AA_GPI2_MASK BIT(2)
176 #define DA9062AA_GPI3_MASK BIT(3)
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/da9150/
Dregisters.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * DA9150 MFD Driver - Registers
160 #define DA9150_WRITE_MODE_MASK BIT(6)
161 #define DA9150_REVERT_SHIFT 7
162 #define DA9150_REVERT_MASK BIT(7)
172 #define DA9150_VFAULT_STAT_MASK BIT(0)
174 #define DA9150_TFAULT_STAT_MASK BIT(1)
178 #define DA9150_VDD33_STAT_MASK BIT(0)
180 #define DA9150_VDD33_SLEEP_MASK BIT(1)
181 #define DA9150_LFOSC_STAT_SHIFT 7
[all …]
/kernel/linux/linux-5.10/include/linux/soundwire/
Dsdw_registers.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
36 #define SDW_DP0_INT_TEST_FAIL BIT(0)
37 #define SDW_DP0_INT_PORT_READY BIT(1)
38 #define SDW_DP0_INT_BRA_FAILURE BIT(2)
39 #define SDW_DP0_SDCA_CASCADE BIT(3)
40 /* BIT(4) not allocated in SoundWire specification 1.2 */
41 #define SDW_DP0_INT_IMPDEF1 BIT(5)
42 #define SDW_DP0_INT_IMPDEF2 BIT(6)
43 #define SDW_DP0_INT_IMPDEF3 BIT(7)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
35 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7)
36 #define BIT_SYS_CTRL1_VSYNCPIN BIT(6)
37 #define BIT_SYS_CTRL1_OTPADROPOVR_SET BIT(5)
38 #define BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD BIT(4)
39 #define BIT_SYS_CTRL1_OTP2XVOVR_EN BIT(3)
40 #define BIT_SYS_CTRL1_OTP2XAOVR_EN BIT(2)
41 #define BIT_SYS_CTRL1_TX_CTRL_HDMI BIT(1)
42 #define BIT_SYS_CTRL1_OTPAMUTEOVR_SET BIT(0)
[all …]
/kernel/linux/linux-5.10/sound/soc/hisilicon/
Dhi6210-i2s.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/sound/soc/hisilicon/hi6210-i2s.h
29 #define HII2S_SW_RST_N__SW_RST_N BIT(0)
41 #define HII2S_IF_CLK_EN_CFG__THIRDMD_UPLINK_EN BIT(25)
42 #define HII2S_IF_CLK_EN_CFG__THIRDMD_DLINK_EN BIT(24)
43 #define HII2S_IF_CLK_EN_CFG__S3_IF_CLK_EN BIT(20)
44 #define HII2S_IF_CLK_EN_CFG__S2_IF_CLK_EN BIT(16)
45 #define HII2S_IF_CLK_EN_CFG__S2_OL_MIXER_EN BIT(15)
46 #define HII2S_IF_CLK_EN_CFG__S2_OL_SRC_EN BIT(14)
47 #define HII2S_IF_CLK_EN_CFG__S2_IR_PGA_EN BIT(13)
[all …]
/kernel/linux/linux-5.10/drivers/net/dsa/microchip/
Dksz8795_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
34 #define SW_NEW_BACKOFF BIT(7)
35 #define SW_GLOBAL_RESET BIT(6)
36 #define SW_FLUSH_DYN_MAC_TABLE BIT(5)
37 #define SW_FLUSH_STA_MAC_TABLE BIT(4)
38 #define SW_LINK_AUTO_AGING BIT(0)
42 #define SW_HUGE_PACKET BIT(6)
43 #define SW_TX_FLOW_CTRL_DISABLE BIT(5)
44 #define SW_RX_FLOW_CTRL_DISABLE BIT(4)
45 #define SW_CHECK_LENGTH BIT(3)
[all …]
Dksz9477_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Microchip Technology Inc.
14 /* 0 - Operation */
44 #define PME_ENABLE BIT(1)
45 #define PME_POLARITY BIT(0)
49 #define SW_GIGABIT_ABLE BIT(6)
50 #define SW_REDUNDANCY_ABLE BIT(5)
51 #define SW_AVB_ABLE BIT(4)
69 #define SW_QW_ABLE BIT(5)
75 #define LUE_INT BIT(31)
[all …]
/kernel/linux/linux-5.10/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
25 5.2.1 Parity checking and packet re-synchronization
33 7. Hardware version 4
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
118 calculating a parity bit for the last 3 bytes of each packet. The driver
145 4 bytes version: (after the arrow is the name given in the Dell-provided driver)
173 ---------
179 echo -n 0x16 > reg_10
183 bit 7 6 5 4 3 2 1 0
197 bit 7 6 5 4 3 2 1 0
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h1 /* SPDX-License-Identifier: ISC */
10 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
24 PKT_TYPE_RX_EVENT = 7,
29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22)
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/wil6210/
Dtxrx.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
26 return le32_to_cpu(addr->addr_low) | in wil_desc_addr()
27 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr()
33 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set()
34 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set()
37 /* Tx descriptor - MAC part
39 * bit 0.. 9 : lifetime_expiry_value:10
40 * bit 10 : interrupt_en:1
[all …]
/kernel/linux/linux-5.10/drivers/scsi/
DBusLogic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com>
12 Special thanks to Wayne Yen, Jin-Lon Hon, and Alex Win of BusLogic, whose
60 #define BLOGIC_MIN_AUTO_TAG_DEPTH 7
91 #define BLOGIC_CCB_GRP_ALLOCSIZE 7
160 (adapter->adapter_type == BLOGIC_MULTIMASTER)
163 (adapter->adapter_type == BLOGIC_FLASHPOINT)
189 BLOGIC_VESA_BUS, /* BT-4xx */
190 BLOGIC_ISA_BUS, /* BT-5xx */
191 BLOGIC_MCA_BUS, /* BT-6xx */
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/mediatek/
Dmtk_hdmi_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #define LR_SWAP BIT(0)
13 #define LFE_CC_SWAP BIT(1)
14 #define LSRS_SWAP BIT(2)
15 #define RLS_RRS_SWAP BIT(3)
16 #define LR_STATUS_SWAP BIT(4)
23 #define I2S_UV_V BIT(0)
24 #define I2S_UV_U BIT(1)
26 #define I2S_UV_CH_EN(x) BIT((x) + 2)
27 #define I2S_UV_TMDS_DEBUG BIT(6)
[all …]
Dmtk_mt8173_mipi_tx.c1 // SPDX-License-Identifier: GPL-2.0
10 #define RG_DSI_LDOCORE_EN BIT(0)
11 #define RG_DSI_CKG_LDOOUT_EN BIT(1)
13 #define RG_DSI_LD_IDX_SEL (7 << 4)
15 #define RG_DSI_DSICLK_FREQ_SEL BIT(10)
16 #define RG_DSI_LPTX_CLMP_EN BIT(11)
23 #define RG_DSI_LNTx_LDOOUT_EN BIT(0)
24 #define RG_DSI_LNTx_CKLANE_EN BIT(1)
25 #define RG_DSI_LNTx_LPTX_IPLUS1 BIT(2)
26 #define RG_DSI_LNTx_LPTX_IPLUS2 BIT(3)
[all …]
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Dni_stc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Register descriptions for NI DAQ-STC chip
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1998-9 David A. Schleef <ds@schleef.org>
11 * DAQ-STC Technical Reference Manual
21 * Registers in the National Instruments DAQ-STC chip
25 #define NISTC_INTA_ACK_G0_GATE BIT(15)
26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
28 #define NISTC_INTA_ACK_AI_STOP BIT(12)
[all …]
/kernel/linux/linux-5.10/drivers/media/i2c/
Dtda1997x_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
125 #define DETECT_UTIL BIT(7) /* utility of HDMI level */
126 #define DETECT_HPD BIT(6) /* HPD of HDMI level */
127 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */
128 #define DETECT_5V_B BIT(1) /* 5V present on input B */
129 #define DETECT_5V_A BIT(0) /* 5V present on input A */
132 #define INPUT_SEL_RST_FMT BIT(7) /* 1=reset format measurement */
133 #define INPUT_SEL_RST_VDP BIT(2) /* 1=reset video data path */
134 #define INPUT_SEL_OUT_MODE BIT(1) /* 0=loop 1=bypass */
[all …]
/kernel/linux/linux-5.10/drivers/platform/x86/
Dmlx-platform.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
5 * Copyright (C) 2016-2018 Mellanox Technologies
6 * Copyright (C) 2016-2018 Vadim Pasternak <vadimp@mellanox.com>
12 #include <linux/i2c-mux.h>
16 #include <linux/platform_data/i2c-mux-reg.h>
130 #define MLXPLAT_CPLD_AGGR_MASK_COMEX BIT(0)
132 #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6)
140 #define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4)
147 #define MLXPLAT_CPLD_AGGR_MASK_CARRIER BIT(1)
171 #define MLXPLAT_CPLD_NR_NONE -1
[all …]
/kernel/linux/linux-5.10/drivers/net/ieee802154/
Dmcr20a.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for NXP MCR20A 802.15.4 Wireless-PAN Networking controller
50 /*------------------ 0x27 */
69 /*----------------------- 0x3A */
118 /*-------------------- 0x29 */
124 /*------------------ 0x2F */
128 /*------------------- 0x33 */
147 /*-------------------- 0x46 */
163 /*------------------- 0x56 */
164 /*------------------- 0x57 */
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/
Dtps65218.h6 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
71 #define TPS65218_INT1_VPRG BIT(5)
72 #define TPS65218_INT1_AC BIT(4)
73 #define TPS65218_INT1_PB BIT(3)
74 #define TPS65218_INT1_HOT BIT(2)
75 #define TPS65218_INT1_CC_AQC BIT(1)
76 #define TPS65218_INT1_PRGC BIT(0)
78 #define TPS65218_INT2_LS3_F BIT(5)
79 #define TPS65218_INT2_LS2_F BIT(4)
80 #define TPS65218_INT2_LS1_F BIT(3)
[all …]
Das3722.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
174 /* AS3722 register bits and bit masks */
175 #define AS3722_LDO_ILIMIT_MASK BIT(7)
176 #define AS3722_LDO_ILIMIT_BIT BIT(7)
193 #define AS3722_LDO0_CTRL BIT(0)
194 #define AS3722_LDO1_CTRL BIT(1)
195 #define AS3722_LDO2_CTRL BIT(2)
196 #define AS3722_LDO3_CTRL BIT(3)
197 #define AS3722_LDO4_CTRL BIT(4)
198 #define AS3722_LDO5_CTRL BIT(5)
[all …]
/kernel/linux/linux-5.10/drivers/usb/typec/tcpm/
Dfusb302_reg.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
[all …]
/kernel/linux/linux-5.10/include/soc/mscc/
Docelot_hsio.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
85 #define HSIO_PLL5G_CFG0_ENA_ROT BIT(31)
86 #define HSIO_PLL5G_CFG0_ENA_LANE BIT(30)
87 #define HSIO_PLL5G_CFG0_ENA_CLKTREE BIT(29)
88 #define HSIO_PLL5G_CFG0_DIV4 BIT(28)
89 #define HSIO_PLL5G_CFG0_ENA_LOCK_FINE BIT(27)
99 #define HSIO_PLL5G_CFG0_ENA_VCO_CONTRH BIT(15)
100 #define HSIO_PLL5G_CFG0_ENA_CP1 BIT(14)
101 #define HSIO_PLL5G_CFG0_ENA_VCO_BUF BIT(13)
102 #define HSIO_PLL5G_CFG0_ENA_BIAS BIT(12)
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt7601u/
Dmac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
46 #define MT_RXINFO_BA BIT(0)
47 #define MT_RXINFO_DATA BIT(1)
48 #define MT_RXINFO_NULL BIT(2)
49 #define MT_RXINFO_FRAG BIT(3)
50 #define MT_RXINFO_U2M BIT(4)
51 #define MT_RXINFO_MULTICAST BIT(5)
52 #define MT_RXINFO_BROADCAST BIT(6)
53 #define MT_RXINFO_MYBSS BIT(7)
54 #define MT_RXINFO_CRCERR BIT(8)
[all …]
Dregs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 #define MT_CMB_CTRL_XTAL_RDY BIT(22)
19 #define MT_CMB_CTRL_PLL_LD BIT(23)
23 #define MT_EFUSE_CTRL_MODE GENMASK(7, 6)
27 #define MT_EFUSE_CTRL_KICK BIT(30)
28 #define MT_EFUSE_CTRL_SEL BIT(31)
34 #define MT_COEXCFG0_COEX_EN BIT(0)
37 #define MT_WLAN_FUN_CTRL_WLAN_EN BIT(0)
38 #define MT_WLAN_FUN_CTRL_WLAN_CLK_EN BIT(1)
39 #define MT_WLAN_FUN_CTRL_WLAN_RESET_RF BIT(2)
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8188eu/include/
Dpwrseq.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
14 * Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
16 * 0: POFF--Power Off
17 * 1: PDN--Power Down
18 * 2: CARDEMU--Card Emulation
19 * 3: ACT--Active Mode
20 * 4: LPS--Low Power State
21 * 5: SUS--Suspend
52 {0x0006, PWR_CUT_ALL_MSK, PWR_CMD_POLLING, BIT(1), BIT(1)}, \
[all …]

12345678910>>...43