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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dgpio-pcf857x.txt1 * PCF857x-compatible I/O expanders
3 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
4 driven high by a pull-up current source or driven low to ground. This combines
14 - compatible: should be one of the following.
15 - "maxim,max7328": For the Maxim MAX7378
16 - "maxim,max7329": For the Maxim MAX7329
17 - "nxp,pca8574": For the NXP PCA8574
18 - "nxp,pca8575": For the NXP PCA8575
19 - "nxp,pca9670": For the NXP PCA9670
20 - "nxp,pca9671": For the NXP PCA9671
[all …]
/kernel/linux/linux-5.10/sound/soc/sof/imx/
DKconfig1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
4 bool "SOF support for NXP i.MX audio DSPs"
8 This adds support for Sound Open Firmware for NXP i.MX platforms.
19 This option is not user-selectable but automagically handled by
25 This option is not user-selectable but automagically handled by
29 bool "SOF support for i.MX8"
33 This adds support for Sound Open Firmware for NXP i.MX8 platforms
42 This option is not user-selectable but automagically handled by
46 bool "SOF support for i.MX8M"
49 This adds support for Sound Open Firmware for NXP i.MX8M platforms
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/
Dleds-pca9532.txt1 *NXP - pca9532 PWM LED Driver
3 The PCA9532 family is SMBus I/O expander optimized for dimming LEDs.
7 - compatible:
8 "nxp,pca9530"
9 "nxp,pca9531"
10 "nxp,pca9532"
11 "nxp,pca9533"
12 - reg - I2C slave address
14 Each led is represented as a sub-node of the nxp,pca9530.
16 Optional sub-node properties:
[all …]
Dleds-pca955x.txt1 * NXP - pca955x LED driver
4 to control LEDs can be used as general purpose I/Os. The GPIO pins can
5 be input or output, and output pins can also be pulse-width controlled.
8 - compatible : should be one of :
9 "nxp,pca9550"
10 "nxp,pca9551"
11 "nxp,pca9552"
13 "nxp,pca9553"
14 - #address-cells: must be 1
15 - #size-cells: must be 0
[all …]
/kernel/linux/linux-5.10/drivers/firmware/imx/
Dimx-dsp.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019 NXP
4 * Author: Daniel Baluta <daniel.baluta@nxp.com>
18 * imx_dsp_ring_doorbell - triggers an interrupt on the other side (DSP)
23 * Returns non-negative value for success, negative value for error
31 return -EINVAL; in imx_dsp_ring_doorbell()
33 dsp_chan = &ipc->chans[idx]; in imx_dsp_ring_doorbell()
34 ret = mbox_send_message(dsp_chan->ch, NULL); in imx_dsp_ring_doorbell()
43 * imx_dsp_handle_rx - rx callback used by imx mailbox
55 if (chan->idx == 0) { in imx_dsp_handle_rx()
[all …]
/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-pcf857x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
42 { .compatible = "nxp,pcf8574" },
43 { .compatible = "nxp,pcf8574a" },
44 { .compatible = "nxp,pca8574" },
45 { .compatible = "nxp,pca9670" },
46 { .compatible = "nxp,pca9672" },
47 { .compatible = "nxp,pca9674" },
48 { .compatible = "nxp,pcf8575" },
49 { .compatible = "nxp,pca8575" },
50 { .compatible = "nxp,pca9671" },
[all …]
Dgpio-pca953x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PCA953x 4/8/16/24/40 bit I/O ports
119 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
131 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in pca953x_acpi_get_irq()
145 * relative. Since first controller (gpio-sch.c) and
146 * second (gpio-dwapb.c) are at the fixed bases, we may
168 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
217 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); in pca953x_bank_shift()
239 * - Standard set, below 0x40, each port can be replicated up to 8 times
240 * - PCA953x standard
[all …]
/kernel/linux/linux-5.10/drivers/nvmem/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
25 tristate "i.MX IC Identification Module support"
29 i.MX SoCs, providing access to 4 Kbits of programmable
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
[all …]
Dlpc18xx_otp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * NXP LPC18xx/43xx OTP memory NVMEM driver
15 #include <linux/nvmem-provider.h>
22 * LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts
48 int i; in lpc18xx_otp_read() local
50 if (count > (LPC18XX_OTP_SIZE - index)) in lpc18xx_otp_read()
51 count = LPC18XX_OTP_SIZE - index; in lpc18xx_otp_read()
53 for (i = index; i < (index + count); i++) in lpc18xx_otp_read()
54 *buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE); in lpc18xx_otp_read()
60 .name = "lpc18xx-otp",
[all …]
/kernel/linux/linux-5.10/drivers/leds/
Dleds-pca963x.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Peter Meerwald <p.meerwald@bct-electronic.com>
9 * Based on leds-pca955x.c
11 * LED driver for the PCA9633 I2C LED driver (7-bit slave address 0x62)
12 * LED driver for the PCA9634/5 I2C LED driver (7-bit slave address set by hw.)
22 * or by adding the 'nxp,hw-blink' property to the DTS.
42 #define PCA963X_MODE2_OUTDRV 0x04 /* Open-drain or totem pole */
119 struct i2c_client *client = led->chip->client; in pca963x_brightness()
120 struct pca963x_chipdef *chipdef = led->chip->chipdef; in pca963x_brightness()
125 ledout_addr = chipdef->ledout_base + (led->led_num / 4); in pca963x_brightness()
[all …]
Dleds-pca9532.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pca9532.c - 16-bit Led dimmer
8 * Datasheet: http://www.nxp.com/documents/data_sheet/PCA9532.pdf
18 #include <linux/leds-pca9532.h>
24 #define PCA9532_REG_INPUT(i) ((i) >> 3) argument
26 #define PCA9532_REG_PSC(m, i) (PCA9532_REG_OFFSET(m) + 0x1 + (i) * 2) argument
27 #define PCA9532_REG_PWM(m, i) (PCA9532_REG_OFFSET(m) + 0x2 + (i) * 2) argument
91 { .compatible = "nxp,pca9530", .data = (void *)pca9530 },
92 { .compatible = "nxp,pca9531", .data = (void *)pca9531 },
93 { .compatible = "nxp,pca9532", .data = (void *)pca9532 },
[all …]
/kernel/linux/linux-5.10/drivers/input/keyboard/
Dlpc32xx-keys.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * NXP LPC32xx SoC Key Scan Interface
6 * Kevin Wells <kevin.wells@nxp.com>
9 * Copyright (C) 2010 NXP Semiconductors
74 struct input_dev *input = kscandat->input; in lpc32xx_mod_states()
78 key = readl(LPC32XX_KS_DATA(kscandat->kscan_base, col)); in lpc32xx_mod_states()
79 changed = key ^ kscandat->lastkeystates[col]; in lpc32xx_mod_states()
80 kscandat->lastkeystates[col] = key; in lpc32xx_mod_states()
86 kscandat->row_shift); in lpc32xx_mod_states()
87 keycode = kscandat->keymap[scancode]; in lpc32xx_mod_states()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-lpc32xx/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-lpc32xx/common.c
5 * Author: Kevin Wells <kevin.wells@nxp.com>
7 * Copyright (C) 2010 NXP Semiconductors
11 #include <linux/soc/nxp/lpc32xx-misc.h>
24 int i; in lpc32xx_get_uid() local
26 for (i = 0; i < 4; i++) in lpc32xx_get_uid()
27 devid[i] = __raw_readl(LPC32XX_CLKPWR_DEVID(i << 2)); in lpc32xx_get_uid()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dnxp,imx8mq-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
18 const: nxp,imx8mq-vpu
23 reg-names:
25 - const: g1
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
/kernel/linux/linux-5.10/drivers/regulator/
Dpca9450-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020 NXP.
4 * NXP PCA9450 pmic driver
56 .max_register = PCA9450_MAX_REGISTER - 1,
91 return regmap_update_bits(rdev->regmap, PCA9450_REG_BUCK1CTRL + id * 3, in pca9450_dvs_set_ramp_delay()
180 int ret, i; in buck_set_dvs() local
184 if (ret == -EINVAL) in buck_set_dvs()
189 for (i = 0; i < desc->n_voltages; i++) { in buck_set_dvs()
190 ret = regulator_desc_list_voltage_linear_range(desc, i); in buck_set_dvs()
194 i <<= ffs(desc->vsel_mask) - 1; in buck_set_dvs()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx8m-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Family Clock Control Module Binding
10 - Anson Huang <Anson.Huang@nxp.com>
13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
19 - fsl,imx8mm-ccm
20 - fsl,imx8mn-ccm
21 - fsl,imx8mp-ccm
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
45 tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
50 Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
80 will behave like standard non-accelerated ethernet interfaces.
83 tristate "NXP LPC18xx/43xx DWMAC support"
88 Support for NXP LPC18xx/43xx DWMAC Ethernet.
201 tristate "NXP IMX8 DWMAC support"
206 Support for ethernet controller on NXP i.MX8 SOCs.
208 This selects NXP SoC glue layer support for the stmmac
[all …]
/kernel/linux/linux-5.10/drivers/media/tuners/
Dtda18212.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * NXP TDA18212HN silicon tuner driver
21 struct tda18212_dev *dev = fe->tuner_priv; in tda18212_set_params()
22 struct dtv_frontend_properties *c = &fe->dtv_property_cache; in tda18212_set_params()
23 int ret, i; in tda18212_set_params() local
50 dev_dbg(&dev->client->dev, in tda18212_set_params()
52 c->delivery_system, c->frequency, in tda18212_set_params()
53 c->bandwidth_hz); in tda18212_set_params()
55 if (fe->ops.i2c_gate_ctrl) in tda18212_set_params()
56 fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */ in tda18212_set_params()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mn-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019 NXP
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
10 #include <dt-bindings/interrupt-controller/irq.h>
13 model = "NXP i.MX8MNano EVK board";
14 compatible = "fsl,imx8mn-evk", "fsl,imx8mn";
19 compatible = "nxp,pca9450b";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_pmic>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dimx8mm-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/thermal/imx8mm-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Mini Thermal Binding
10 - Anson Huang <Anson.Huang@nxp.com>
13 i.MX8MM has TMU IP to allow temperature measurement, there are
16 for i.MX8MM which has ONLY 1 sensor, v2 is for i.MX8MP which has
22 - enum:
23 - fsl,imx8mm-tmu
[all …]
/kernel/linux/linux-5.10/drivers/i2c/muxes/
Di2c-mux-pca954x.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
6 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
9 * chips made by NXP Semiconductors.
15 * single 8-bit register. The upstream "parent" bus fans out to two,
18 * mux can select only one sub-bus at a time; a switch can select any
30 * i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
39 #include <linux/i2c-mux.h>
47 #include <dt-bindings/mux/mux.h>
197 { .compatible = "nxp,pca9540", .data = &chips[pca_9540] },
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Dnxp-tja11xx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* NXP TJA1100 BroadRReach PHY driver
190 if (phydev->link) in tja11xx_config_aneg_cable_test()
193 if (!phydev->drv->cable_test_start || in tja11xx_config_aneg_cable_test()
194 !phydev->drv->cable_test_get_status) in tja11xx_config_aneg_cable_test()
201 ret = phydev->drv->cable_test_start(phydev); in tja11xx_config_aneg_cable_test()
208 ret = phydev->drv->cable_test_get_status(phydev, &finished); in tja11xx_config_aneg_cable_test()
223 switch (phydev->master_slave_set) { in tja11xx_config_aneg()
234 return -ENOTSUPP; in tja11xx_config_aneg()
257 phydev->autoneg = AUTONEG_DISABLE; in tja11xx_config_init()
[all …]
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-imx8qxp.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018 NXP
4 * Dong Aisheng <aisheng.dong@nxp.com>
7 #include <linux/clk-provider.h>
15 #include "clk-scu.h"
17 #include <dt-bindings/clock/imx8-clock.h>
18 #include <dt-bindings/firmware/imx/rsrc.h>
22 struct device_node *ccm_node = pdev->dev.of_node; in imx8qxp_clk_probe()
25 int ret, i; in imx8qxp_clk_probe() local
31 clk_data = devm_kzalloc(&pdev->dev, struct_size(clk_data, hws, in imx8qxp_clk_probe()
[all …]
/kernel/linux/linux-5.10/drivers/soc/fsl/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # NXP/Freescale QorIQ series SOC drivers
6 menu "NXP/Freescale QorIQ SoC drivers"
15 The global utilities block controls power management, I/O device
16 enabling, power-onreset(POR) configuration monitoring, alternate
48 The NXP QorIQ Processors based on ARM Core have RCPM module
49 (Run Control and Power Management), which performs all device-level

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