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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Damlogic,meson-gx-pwrc.txt7 ----------------
13 power-domain.yaml
16 ---------------------
19 - compatible: should be one of the following :
20 - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
21 - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
22 - #power-domain-cells: should be 0
23 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
24 - resets: phandles to the reset lines needed for this power demain sequence
26 - clocks: from common clock binding: handle to VPU and VAPB clocks
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Damlogic,meson-ee-pwrc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson Everything-Else Power Domains
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Everything-Else Power Domains node should be the child of a syscon
17 - compatible: Should be the following:
18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
26 - amlogic,meson8-pwrc
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Damlogic,gx-vdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/media/amlogic,gx-vdec.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
12 - Maxime Jourdan <mjourdan@baylibre.com>
20 - ESPARSER is a bitstream parser that outputs to a VIFIFO. Further VDEC blocks
22 - VDEC_1 can decode MPEG-1, MPEG-2, MPEG-4 part 2, MJPEG, H.263, H.264, VC-1.
23 - VDEC_HEVC can decode HEVC and VP9.
31 - items:
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Damlogic,gxbb-aoclkc.txt1 * Amlogic GXBB AO Clock and Reset Unit
3 The Amlogic GXBB AO clock controller generates and supplies clock to various
4 controllers within the Always-On part of the SoC.
8 - compatible: value should be different for each SoC family as :
9 - GXBB (S905) : "amlogic,meson-gxbb-aoclkc"
10 - GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"
11 - GXM (S912) : "amlogic,meson-gxm-aoclkc"
12 - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"
13 - G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc"
14 followed by the common "amlogic,meson-gx-aoclkc"
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
23 reserved-memory {
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Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dhisilicon,hi6220-reset.txt7 The reset controller registers are part of the system-ctl block on
11 - compatible: should be one of the following:
12 - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
13 - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
14 - "hisilicon,hi6220-aoctrl", "syscon" : For ao reset controller.
15 - reg: should be register base and length as documented in the
17 - #reset-cells: 1, see below
21 compatible = "hisilicon,hi6220-sysctrl", "syscon";
23 #clock-cells = <1>;
24 #reset-cells = <1>;
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/kernel/linux/linux-5.10/drivers/reset/hisilicon/
Dhi6220_reset.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2015-2016 Hisilicon Limited.
19 #include <linux/reset-controller.h>
36 AO, enumerator
48 struct regmap *regmap = data->regmap; in hi6220_peripheral_assert()
60 struct regmap *regmap = data->regmap; in hi6220_peripheral_deassert()
77 struct regmap *regmap = data->regmap; in hi6220_media_assert()
86 struct regmap *regmap = data->regmap; in hi6220_media_deassert()
110 struct regmap *regmap = data->regmap; in hi6220_ao_assert()
129 struct regmap *regmap = data->regmap; in hi6220_ao_deassert()
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a9";
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Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a5";
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Dmeson.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "simple-bus";
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/kernel/linux/linux-5.10/drivers/soc/amlogic/
Dmeson-ee-pwrc.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <linux/reset-controller.h>
17 #include <dt-bindings/power/meson8-power.h>
18 #include <dt-bindings/power/meson-axg-power.h>
19 #include <dt-bindings/power/meson-g12a-power.h>
20 #include <dt-bindings/power/meson-gxbb-power.h>
21 #include <dt-bindings/power/meson-sm1-power.h>
23 /* AO Offsets */
30 * AO-bus as syscon. 0x3a from GX translates to 0x02, 0x3b translates to 0x03
320 regmap_read(pwrc_domain->pwrc->regmap_ao, in pwrc_ee_get_power()
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Dmeson-gx-pwrc-vpu.c5 * SPDX-License-Identifier: GPL-2.0+
18 /* AO Offsets */
52 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_off()
58 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
63 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_gx_pwrc_vpu_power_off()
68 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
74 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_off()
79 clk_disable_unprepare(pd->vpu_clk); in meson_gx_pwrc_vpu_power_off()
80 clk_disable_unprepare(pd->vapb_clk); in meson_gx_pwrc_vpu_power_off()
90 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_g12a_pwrc_vpu_power_off()
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/kernel/linux/linux-5.10/drivers/clk/hisilicon/
Dclk-hi6220.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
19 #include <dt-bindings/clock/hi6220-clock.h>
24 /* clocks in AO (always on) controller */
90 CLK_OF_DECLARE_DRIVER(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", hi6220_clk_ao_init);
93 /* clocks in sysctrl */
197 CLK_OF_DECLARE_DRIVER(hi6220_clk_sys, "hisilicon,hi6220-sysctrl", hi6220_clk_sys_init);
254 CLK_OF_DECLARE_DRIVER(hi6220_clk_media, "hisilicon,hi6220-mediactrl", hi6220_clk_media_init);
285 CLK_OF_DECLARE(hi6220_clk_power, "hisilicon,hi6220-pmctrl", hi6220_clk_power_init);
307 CLK_OF_DECLARE(hi6220_clk_acpu, "hisilicon,hi6220-acpu-sctrl", hi6220_clk_acpu_init);
/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/
Dvdec.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <media/v4l2-ioctl.h>
17 #include <media/v4l2-event.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-mem2mem.h>
20 #include <media/v4l2-dev.h>
21 #include <media/videobuf2-dma-contig.h>
42 return get_output_size(sess->width, sess->height); in amvdec_get_output_size()
48 struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; in vdec_codec_needs_recycle()
50 return codec_ops->can_recycle && codec_ops->recycle; in vdec_codec_needs_recycle()
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/kernel/linux/patches/linux-5.10/unionpi_tiger_pacth/
Dlinux-5.10.patch1 diff -Naur a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
2 --- a/arch/arm/boot/Makefile 2022-05-27 17:20:13.781877650 +0800
3 +++ b/arch/arm/boot/Makefile 2022-05-31 11:56:47.693259679 +0800
4 @@ -16,6 +16,7 @@
12 @@ -24,10 +25,12 @@
13 ZRELADDR := $(zreladdr-y)
14 PARAMS_PHYS := $(params_phys-y)
15 INITRD_PHYS := $(initrd_phys-y)
16 +DTB_OBJS ?= $(dtb-y)
21 -targets := Image zImage xipImage bootpImage uImage
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