| /kernel/linux/linux-5.10/include/linux/ |
| D | wait_bit.h | 55 * wait_on_bit - wait for a bit to be cleared
66 * Returned value will be zero if the bit was cleared, or non-zero
82 * wait_on_bit_io - wait for a bit to be cleared
88 * to be cleared. This is similar to wait_on_bit(), but calls
91 * Returned value will be zero if the bit was cleared, or non-zero
107 * wait_on_bit_timeout - wait for a bit to be cleared or a timeout elapses
114 * to be cleared. This is similar to wait_on_bit(), except also takes a
117 * Returned value will be zero if the bit was cleared before the
134 * wait_on_bit_action - wait for a bit to be cleared
141 * to be cleared, and allow the waiting action to be specified.
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| D | sbitmap.h | 22 * @depth: Number of bits being used in @word/@cleared
32 * @cleared: word holding cleared bits
34 unsigned long cleared ____cacheline_aligned_in_smp;
37 * @swap_lock: Held while swapping word <-> cleared
254 word = sb->map[index].word & ~sb->map[index].cleared; in __sbitmap_for_each_set()
312 * sets the corresponding bit in the ->cleared mask instead. Paired with
318 unsigned long *addr = &sb->map[SB_NR_TO_INDEX(sb, bitnr)].cleared; in sbitmap_deferred_clear_bit()
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| /kernel/linux/linux-5.10/drivers/memstick/host/ |
| D | r592.h | 55 #define R592_IO_16 (1 << 16) /* Set by default, can be cleared */
56 #define R592_IO_18 (1 << 18) /* Set by default, can be cleared */
57 #define R592_IO_SERIAL1 (1 << 20) /* Set by default, can be cleared, (cleared on parallel) */
58 #define R592_IO_22 (1 << 22) /* Set by default, can be cleared */
60 #define R592_IO_26 (1 << 26) /* Set by default, can be cleared */
61 #define R592_IO_SERIAL2 (1 << 30) /* Set by default, can be cleared (cleared on parallel), serial…
67 #define R592_POWER_0 (1 << 0) /* set on start, cleared on stop - must be set*/
68 #define R592_POWER_1 (1 << 1) /* set on start, cleared on stop - must be set*/
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| /kernel/linux/linux-5.10/drivers/md/ |
| D | md-bitmap.h | 38 * It is cleared (and resync-active set) when a resync starts across all drives
44 * resync_needed will be cleared (as long as resync_active wasn't already set).
45 * It is cleared when a resync completes.
49 * bit can be cleared as well, thus setting the counter to 0.
57 * If the sweep find the counter at 1, the on-disk bit is cleared and the
128 __le64 events_cleared;/*32 event counter when last bit cleared (2) */
146 * array is not degraded. As bits are not cleared when the array is degraded,
147 * this represents the last time that any bits were cleared.
170 * cleared then that page is marked as 'pending'
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| /kernel/linux/linux-5.10/arch/x86/platform/pvh/ |
| D | head.S | 30 * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared.
31 * - `cr4`: all bits are cleared.
39 * - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared.
40 * Bit 8 (TF) must be cleared. Other bits are all unspecified.
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| /kernel/linux/linux-5.10/drivers/nvdimm/ |
| D | claim.c | 279 long cleared; in nsio_rw_bytes() local
282 cleared = nvdimm_clear_poison(&ndns->dev, in nsio_rw_bytes()
284 if (cleared < size) in nsio_rw_bytes()
286 if (cleared > 0 && cleared / 512) { in nsio_rw_bytes()
287 cleared /= 512; in nsio_rw_bytes()
288 badblocks_clear(&nsio->bb, sector, cleared); in nsio_rw_bytes()
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| D | pmem.c | 76 long cleared; in pmem_clear_poison() local
81 cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len); in pmem_clear_poison()
82 if (cleared < len) in pmem_clear_poison()
84 if (cleared > 0 && cleared / 512) { in pmem_clear_poison()
85 hwpoison_clear(pmem, pmem->phys_addr + offset, cleared); in pmem_clear_poison()
86 cleared /= 512; in pmem_clear_poison()
88 (unsigned long long) sector, cleared, in pmem_clear_poison()
89 cleared > 1 ? "s" : ""); in pmem_clear_poison()
90 badblocks_clear(&pmem->bb, sector, cleared); in pmem_clear_poison()
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| D | bus.c | 172 resource_size_t phys, cleared; member
191 || (ctx->phys + ctx->cleared) > ndr_end) in nvdimm_clear_badblocks_region()
195 badblocks_clear(&nd_region->bb, sector, ctx->cleared / 512); in nvdimm_clear_badblocks_region()
204 phys_addr_t phys, u64 cleared) in nvdimm_clear_badblocks_regions() argument
208 .cleared = cleared, in nvdimm_clear_badblocks_regions()
216 phys_addr_t phys, u64 cleared) in nvdimm_account_cleared_poison() argument
218 if (cleared > 0) in nvdimm_account_cleared_poison()
219 badrange_forget(&nvdimm_bus->badrange, phys, cleared); in nvdimm_account_cleared_poison()
221 if (cleared > 0 && cleared / 512) in nvdimm_account_cleared_poison()
222 nvdimm_clear_badblocks_regions(nvdimm_bus, phys, cleared); in nvdimm_account_cleared_poison()
[all …]
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| /kernel/linux/linux-5.10/tools/include/asm-generic/bitops/ |
| D | find.h | 38 * find_next_zero_bit - find the next cleared bit in a memory region
68 * find_first_zero_bit - find the first cleared bit in a memory region
72 * Returns the bit number of the first cleared bit.
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| /kernel/linux/linux-5.10/tools/testing/selftests/kvm/lib/ |
| D | sparsebit.c | 609 /* Nodes with all bits cleared may be removed. */ in node_reduce()
836 /* Skip bits that are already cleared */ in bit_clear()
937 * of the newly allocated sparsebit array has all bits cleared.
971 * if different from src will be cleared.
997 /* Find the next cleared bit */ in sparsebit_is_set_num()
1001 * If no cleared bits beyond idx, then there are at least num in sparsebit_is_set_num()
1003 * there are enough set bits between idx and the next cleared bit. in sparsebit_is_set_num()
1015 /* Returns whether num consecutive bits starting at idx are all cleared. */
1024 /* With num > 0, the first bit must be cleared. */ in sparsebit_is_clear_num()
1033 * cleared bits. idx + num doesn't wrap. Otherwise check if in sparsebit_is_clear_num()
[all …]
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| /kernel/linux/linux-5.10/fs/hfs/ |
| D | bitmap.c | 116 * Search for 'num_bits' consecutive cleared bits in the bitmap blocks of
123 * u16 *num_bits: Pointer to the number of cleared bits
130 * The number of the first bit of the range of cleared bits which has been
135 * the number of cleared bits to find.
190 * are cleared. The affected bitmap blocks are marked "dirty", the free
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| /kernel/linux/linux-5.10/arch/ia64/kernel/ |
| D | efi_stub.S | 20 * psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
23 * cleared). Fortunately, SAL promises not to touch the floating
65 andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
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| D | esi_stub.S | 23 * psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
26 * cleared). Fortunately, SAL promises not to touch the floating
83 andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
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| D | perfmon_itanium.h | 63 * we must clear the (instruction) debug registers if pmc13.ta bit is cleared in pfm_ita_pmc_check()
68 DPRINT(("pmc[%d]=0x%lx has active pmc13.ta cleared, clearing ibr\n", cnum, *val)); in pfm_ita_pmc_check()
75 * ensure that they are properly cleared. in pfm_ita_pmc_check()
82 * we must clear the (data) debug registers if pmc11.pt bit is cleared in pfm_ita_pmc_check()
87 DPRINT(("pmc[%d]=0x%lx has active pmc11.pt cleared, clearing dbr\n", cnum, *val)); in pfm_ita_pmc_check()
94 * ensure that they are properly cleared. in pfm_ita_pmc_check()
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-dv-timings.rst | 110 the bit is set (1) it is positive polarity and if is cleared (0),
261 will also be cleared. This is a read-only flag, applications must
266 set. This flag is cleared otherwise. It is also only valid for
268 formats the flag will be cleared by the driver.
273 generate such frequencies, then the flag will be cleared.
308 cleared by transmitters.
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| /kernel/linux/linux-5.10/include/asm-generic/bitops/ |
| D | find.h | 37 * find_next_zero_bit - find the next cleared bit in a memory region
63 * find_first_zero_bit - find the first cleared bit in a memory region
67 * Returns the bit number of the first cleared bit.
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| /kernel/linux/linux-5.10/Documentation/admin-guide/mm/ |
| D | idle_page_tracking.rst | 71 their idle flag cleared in the interim.
104 section), and cleared automatically whenever a page is referenced as defined
107 When a page is marked idle, the Accessed bit must be cleared in all PTEs it is
112 cleared as a result of setting or updating a page's Idle flag, the Young flag
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| D | soft-dirty.rst | 24 Internally, to do this tracking, the writable bit is cleared from PTEs
25 when the soft-dirty bit is cleared. So, after this, when the task tries to
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | chafsr.h | 206 * for which the M_SYND is reported, is cleared, the contents of the M_SYND
225 /* The AFSR must be explicitly cleared by software, it is not cleared automatically
227 * bits in the AFSR. Bits associated with disrupting traps must be cleared before
236 * cleared. For example, if AFSR.CE is detected, then AFSR.UE (which overwrites
237 * the AFAR), and AFSR.UE is cleared by not AFSR.CE, then the AFAR will be unlocked
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/nohash/32/ |
| D | pte-40x.h | 23 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
27 * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
33 * is cleared in the TLB miss handler before the TLB entry is loaded.
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| /kernel/linux/linux-5.10/lib/ |
| D | sbitmap.c | 23 if (!sb->map[index].cleared) in sbitmap_deferred_clear()
27 * First get a stable cleared mask, setting the old mask to 0. in sbitmap_deferred_clear()
29 mask = xchg(&sb->map[index].cleared, 0); in sbitmap_deferred_clear()
232 if (sb->map[i].word & ~sb->map[i].cleared) in sbitmap_any_bit_set()
249 weight += bitmap_weight(&word->cleared, word->depth); in __sbitmap_weight()
268 seq_printf(m, "cleared=%u\n", sbitmap_cleared(sb)); in sbitmap_show()
295 unsigned long cleared = READ_ONCE(sb->map[i].cleared); in sbitmap_bitmap_show() local
298 word &= ~cleared; in sbitmap_bitmap_show()
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| /kernel/linux/linux-5.10/include/linux/reset/ |
| D | reset-simple.h | 24 * @active_low: if true, bits are cleared to assert the reset. Otherwise, bits
27 * @status_active_low: if true, bits read back as cleared while the reset is
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | atomisp-regs.h | 57 * cache line. When cleared, each 32-byte read request is sent as a
64 * If cleared, the high speed clock going to the digital logic is gated when
73 * cache line. When cleared, each 32-byte write request is sent as a
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| /kernel/linux/linux-5.10/Documentation/parisc/ |
| D | debugging.rst | 39 happens when the Q bit is cleared is the CPU does not update the
44 instruction that cleared the Q bit, if you're not it points anywhere
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| /kernel/linux/linux-5.10/drivers/firmware/tegra/ |
| D | ivc.c | 24 * established state, indicating that has cleared the counters in our
41 * return to the established state once it has cleared its counters.
446 * Ensure that counters appear cleared before new state can be in tegra_ivc_notified()
452 * Move to ACK state. We have just cleared our counters, so it in tegra_ivc_notified()
485 * Ensure that counters appear cleared before new state can be in tegra_ivc_notified()
492 * already cleared its counters, so it is safe to start in tegra_ivc_notified()
515 * cleared our counters, and we know that the remote end has in tegra_ivc_notified()
516 * cleared its counters, so it is safe to start writing/reading in tegra_ivc_notified()
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