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/kernel/linux/linux-5.10/tools/perf/Documentation/
Dtopdown.txt2 -----------------------------------
5 methology to break down CPU pipeline execution into 4 bottlenecks:
10 Traditionally this was implemented by events in generic counters
13 perf stat --topdown implements this.
15 Full Top Down includes more levels that can break down the
24 fixed counters and do not require generic counters. This allows
27 % perf stat -a --topdown -I1000
64 metric event, and allow user programs to read the performance counters.
94 int slots_fd = perf_event_open(&slots, 0, -1, -1, 0);
109 int metrics_fd = perf_event_open(&metrics, 0, -1, slots_fd, 0);
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Dperf-stat.txt1 perf-stat(1)
5 ----
6 perf-stat - Run a command and gather performance counter statistics
9 --------
11 'perf stat' [-e <EVENT> | --event=EVENT] [-a] <command>
12 'perf stat' [-e <EVENT> | --event=EVENT] [-a] -- <command> [<options>]
13 'perf stat' [-e <EVENT> | --event=EVENT] [-a] record [-o file] -- <command> [<options>]
14 'perf stat' report [-i file]
17 -----------
23 -------
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/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-bus-pci-devices-aer_stats2 --------------------------
5 statistical counters indicate the errors "as seen/reported by the device".
7 counters may increment at its link partner (e.g. root port) because the
9 problematic endpoint itself (which may report all counters as 0 as it never
15 Contact: linux-pci@vger.kernel.org, rajatja@google.com
28 Advisory Non-Fatal 0
36 Contact: linux-pci@vger.kernel.org, rajatja@google.com
46 Surprise Down Error 0
66 Contact: linux-pci@vger.kernel.org, rajatja@google.com
76 Surprise Down Error 0
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/kernel/linux/linux-5.10/tools/testing/selftests/net/forwarding/
Dvxlan_bridge_1d.sh2 # SPDX-License-Identifier: GPL-2.0
4 # +--------------------+ +----------------------+
8 # +----|---------------+ +--|-------------------+
10 # +----|--------------------------------------------------|-------------------+
12 # | +--|--------------------------------------------------|-----------------+ |
19 # | +-----------------------------------------------------------------------+ |
26 # +----|----------------------------------------------------------------------+
28 # +----|--------------------------------------------------------+
37 # +----|---------------------------------------|----------------+
39 # +----|------------------------------+ +----|------------------------------+
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Dvxlan_bridge_1q.sh2 # SPDX-License-Identifier: GPL-2.0
4 # +-----------------------+ +------------------------+
13 # +----|------------------+ +----|-------------------+
15 # +----|--------------------------------------------------|-------------------+
17 # | +--|--------------------------------------------------|-----------------+ |
27 # | +-----------------------------------------------------------------------+ |
34 # +----|----------------------------------------------------------------------+
36 # +----|--------------------------------------------------------+
45 # +----|---------------------------------------|----------------+
47 # +----|------------------------------+ +----|------------------------------+
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/kernel/linux/linux-5.10/fs/xfs/
Dxfs_fsops.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2005 Silicon Graphics, Inc.
41 nb = in->newblocks; in xfs_growfs_data_private()
42 if (nb < mp->m_sb.sb_dblocks) in xfs_growfs_data_private()
43 return -EINVAL; in xfs_growfs_data_private()
44 if ((error = xfs_sb_validate_fsb_count(&mp->m_sb, nb))) in xfs_growfs_data_private()
46 error = xfs_buf_read_uncached(mp->m_ddev_targp, in xfs_growfs_data_private()
47 XFS_FSB_TO_BB(mp, nb) - XFS_FSS_TO_BB(mp, 1), in xfs_growfs_data_private()
54 nb_mod = do_div(new, mp->m_sb.sb_agblocks); in xfs_growfs_data_private()
57 nagcount--; in xfs_growfs_data_private()
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/kernel/linux/linux-5.10/tools/perf/
Ddesign.txt2 Performance Counters for Linux
3 ------------------------------
5 Performance counters are special hardware registers available on most modern
7 as instructions executed, cachemisses suffered, or branches mis-predicted -
8 without slowing down the kernel or applications. These registers can also
9 trigger interrupts when a threshold number of events have passed - and can
13 hardware capabilities. It provides per task and per CPU counters, counter
15 provides "virtual" 64-bit counters, regardless of the width of the
16 underlying hardware counters.
18 Performance counters are accessed via special file descriptors.
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/kernel/linux/linux-5.10/arch/mips/sibyte/common/
Dsb_tbprof.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org>
7 * written by Ralf Baechle <ralf@linux-mips.org>
85 * Routines for using 40-bit SCD cycle counter
89 * zclk_timer_init(0) at least every 2^40 - 1 ZCLKs.
145 u64 next = (1ULL << 40) - tb_period; in arm_tb()
156 * Unfortunately, in Pass 2 we must clear all counters to knock down in arm_tb()
158 * requires ALL of the SCD perf counters. in arm_tb()
162 /* keep counters 0,2,3,4,5,6,7 as is */ in arm_tb()
167 M_SPC_CFG_CLEAR | /* clear all counters */ in arm_tb()
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/kernel/linux/linux-5.10/drivers/infiniband/hw/mlx5/
Dcounters.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright (c) 2013-2020, Mellanox Technologies inc. All rights reserved.
8 #include "counters.h"
78 static int mlx5_ib_read_counters(struct ib_counters *counters, in mlx5_ib_read_counters() argument
82 struct mlx5_ib_mcounters *mcounters = to_mcounters(counters); in mlx5_ib_read_counters()
87 mutex_lock(&mcounters->mcntrs_mutex); in mlx5_ib_read_counters()
88 if (mcounters->cntrs_max_index > read_attr->ncounters) { in mlx5_ib_read_counters()
89 ret = -EINVAL; in mlx5_ib_read_counters()
93 mread_attr.out = kcalloc(mcounters->counters_num, sizeof(u64), in mlx5_ib_read_counters()
96 ret = -ENOMEM; in mlx5_ib_read_counters()
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/kernel/linux/linux-5.10/drivers/net/dsa/microchip/
Dksz_common.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2019 Microchip Technology Inc.
13 #include <linux/platform_data/microchip-ksz.h>
28 for (i = 0; i < dev->port_cnt; i++) { in ksz_update_port_member()
29 if (i == port || i == dev->cpu_port) in ksz_update_port_member()
31 p = &dev->ports[i]; in ksz_update_port_member()
32 if (!(dev->member & (1 << i))) in ksz_update_port_member()
36 if (p->stp_state == BR_STATE_FORWARDING && in ksz_update_port_member()
37 p->member != dev->member) in ksz_update_port_member()
38 dev->dev_ops->cfg_port_member(dev, i, dev->member); in ksz_update_port_member()
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/kernel/linux/linux-5.10/arch/arm64/kernel/
Dtopology.c30 if (cpuid_topo->package_id != -1) in store_cpu_topology()
53 cpuid_topo->thread_id = -1; in store_cpu_topology()
54 cpuid_topo->core_id = cpuid; in store_cpu_topology()
55 cpuid_topo->package_id = cpu_to_node(cpuid); in store_cpu_topology()
58 cpuid, cpuid_topo->package_id, cpuid_topo->core_id, in store_cpu_topology()
59 cpuid_topo->thread_id, mpidr); in store_cpu_topology()
103 cpu_topology[cpu].thread_id = -1; in parse_acpi_topology()
136 /* Initialize counter reference per-cpu variables for the current CPU */
150 pr_debug("CPU%d: counters are not supported.\n", cpu); in validate_cpu_freq_invariance_counters()
151 return -EINVAL; in validate_cpu_freq_invariance_counters()
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/kernel/linux/linux-5.10/drivers/infiniband/ulp/opa_vnic/
Dopa_vnic_encap.h26 * - Redistributions of source code must retain the above copyright
28 * - Redistributions in binary form must reproduce the above copyright
32 * - Neither the name of Intel Corporation nor the names of its
84 #define OPA_VNIC_EMA_DATA (OPA_MGMT_MAD_SIZE - IB_MGMT_VENDOR_HDR)
118 * struct opa_vesw_info - OPA vnic switch information
119 * @fabric_id: 10-bit fabric id
120 * @vesw_id: 12-bit virtual ethernet switch id
155 * struct opa_per_veswport_info - OPA vnic per port information
171 * @non_vlan_sc_uc: sc for non-vlan unicast ethernet packets
172 * @non_vlan_vl_uc: vl for non-vlan unicast ethernet packets
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/kernel/linux/linux-5.10/tools/testing/selftests/drivers/net/mlxsw/
Dqos_mc_aware.sh2 # SPDX-License-Identifier: GPL-2.0
6 # MC load. This issue can be overcome by putting the switch to MC-aware mode.
8 # under MC flood, and therefore that the MC-aware mode is enabled and correctly
17 # So instead we send traffic with mausezahn and use RX ethtool counters at $h3.
19 # each gets a different priority and we can use per-prio ethtool counters to
28 # +---------------------------+ +----------------------------------+
30 # | | | unicast --> + $h2.111 |
32 # | traffic | | | e-qos-map 0:1 |
33 # | $h1 + <----- | | | |
35 # +---------------|-----------+ +--------------|-------------------+
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Ddevlink_trap_l3_exceptions.sh2 # SPDX-License-Identifier: GPL-2.0
4 # Test devlink-trap L3 exceptions functionality over mlxsw.
8 # +---------------------------------+
16 # +----|----------------------------+
18 # +----|----------------------------------------------------------------------+
28 # +----|----------------------------------------------------------------------+
30 # +----|----------------------------+
38 # +---------------------------------+
65 ip -4 route add default vrf v$h1 nexthop via 192.0.2.2
66 ip -6 route add default vrf v$h1 nexthop via 2001:db8:1::2
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Dqos_defprio.sh2 # SPDX-License-Identifier: GPL-2.0
4 # Test for port-default priority. Non-IP packets ingress $swp1 and are
6 # rx_octets_prio_* counters are used to verify the prioritization.
8 # +-----------------------+
12 # +----|------------------+
14 # +----|------------------+
19 # +-----------------------+
32 declare -a APP
40 lldptool -T -i $dev -V APP $app >/dev/null
51 lldptool -T -i $dev -V APP -d $app >/dev/null
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/kernel/linux/linux-5.10/Documentation/ABI/stable/
Dsysfs-class-infiniband2 -------------------------------------------------
9 Contact: linux-rdma@vger.kernel.org
24 Contact: linux-rdma@vger.kernel.org
34 Contact: linux-rdma@vger.kernel.org
39 What: /sys/class/infiniband/<device>/ports/<port-num>/lid
40 What: /sys/class/infiniband/<device>/ports/<port-num>/rate
41 What: /sys/class/infiniband/<device>/ports/<port-num>/lid_mask_count
42 What: /sys/class/infiniband/<device>/ports/<port-num>/sm_sl
43 What: /sys/class/infiniband/<device>/ports/<port-num>/sm_lid
44 What: /sys/class/infiniband/<device>/ports/<port-num>/state
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/kernel/linux/linux-5.10/drivers/net/ethernet/intel/fm10k/
Dfm10k_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * fm10k_get_bus_info_generic - Generic set PCI bus info
22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
40 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
43 hw->bus_caps.speed = fm10k_bus_speed_5000; in fm10k_get_bus_info_generic()
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/kernel/linux/linux-5.10/drivers/media/test-drivers/vivid/
Dvivid-kthread-touch.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * vivid-kthread-touch.c - touch capture thread support functions.
8 #include "vivid-core.h"
9 #include "vivid-kthread-touch.h"
10 #include "vivid-touch-cap.h"
17 spin_lock(&dev->slock); in vivid_thread_tch_cap_tick()
18 if (!list_empty(&dev->touch_cap_active)) { in vivid_thread_tch_cap_tick()
19 tch_cap_buf = list_entry(dev->touch_cap_active.next, in vivid_thread_tch_cap_tick()
21 list_del(&tch_cap_buf->list); in vivid_thread_tch_cap_tick()
24 spin_unlock(&dev->slock); in vivid_thread_tch_cap_tick()
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/kernel/linux/linux-5.10/Documentation/timers/
Dtimekeeping.rst10 If you grep through the kernel source you will find a number of architecture-
12 architecture-specific overrides of the sched_clock() function and some
17 on this timeline, providing facilities such as high-resolution timers.
19 provide an accurate delay source using hardware counters.
23 -------------
31 n bits which count from 0 to (2^n)-1 and then wraps around to 0 and start over.
36 shall be as stable and correct as possible as compared to a real-world wall
46 When the wall-clock accuracy of the clock source isn't satisfactory, there
48 the user-visible time to RTC clocks in the system or against networked time
73 register counts up or down, and the timer clock rate, and then conjure all
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/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/
Dd3.h8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
33 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 - 2020 Intel Corporation
68 * enum iwl_d0i3_flags - d0i3 flags
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/kernel/linux/linux-5.10/Documentation/networking/
Dstatistics.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - standard interface statistics based on
16 - protocol-specific statistics; and
17 - driver-defined statistics available via ethtool.
20 -----------------------------
25 $ ip -s -s link show dev ens4u1u1
38 Note that `-s` has been specified twice to see all members of
40 If `-s` is specified once the detailed errors won't be shown.
42 `ip` supports JSON formatting via the `-j` option.
44 Protocol-specific statistics
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/kernel/linux/linux-5.10/drivers/net/dsa/
Dvitesse-vsc73xx-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
4 * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
5 * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
6 * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
8 * These switches have a built-in 8051 CPU and can download and execute a
10 * handling the switch in a memory-mapped manner by connecting to that external
31 #include "vitesse-vsc73xx.h"
33 #define VSC73XX_BLOCK_MAC 0x1 /* Subblocks 0-4, 6 (CPU port) */
266 #define IS_7385(a) ((a)->chipid == VSC73XX_CHIPID_ID_7385)
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/kernel/linux/linux-5.10/drivers/clocksource/
Dasm9260_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2014 Oleksij Rempel <linux@rempel-privat.de>
19 #define DRIVER_NAME "asm9260-timer"
23 * 0x0 - plain read write mode
24 * 0x4 - set mode, OR logic.
25 * 0x8 - clr mode, XOR logic.
26 * 0xc - togle mode.
41 * next positive edge of PCLK. The counters remain reset until TCR[1] is
48 * 1 - Timer Counter and Prescale Counter are enabled for counting
49 * 0 - counters are disabled */
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/kernel/linux/linux-5.10/arch/powerpc/perf/
Dcore-fsl-emb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Performance event support - Freescale Embedded Performance Monitor
5 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
166 if (event->hw.state & PERF_HES_STOPPED) in fsl_emb_pmu_read()
171 * are soft-disabled, as long as interrupts are hard-enabled. in fsl_emb_pmu_read()
175 prev = local64_read(&event->hw.prev_count); in fsl_emb_pmu_read()
177 val = read_pmc(event->hw.idx); in fsl_emb_pmu_read()
178 } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev); in fsl_emb_pmu_read()
180 /* The counters are only 32 bits wide */ in fsl_emb_pmu_read()
181 delta = (val - prev) & 0xfffffffful; in fsl_emb_pmu_read()
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/kernel/linux/linux-5.10/arch/x86/events/amd/
Duncore.c1 // SPDX-License-Identifier: GPL-2.0-only
64 return event->pmu->type == amd_nb_pmu.type; in is_nb_event()
69 return event->pmu->type == amd_llc_pmu.type; in is_llc_event()
75 return *per_cpu_ptr(amd_uncore_nb, event->cpu); in event_to_amd_uncore()
77 return *per_cpu_ptr(amd_uncore_llc, event->cpu); in event_to_amd_uncore()
84 struct hw_perf_event *hwc = &event->hw; in amd_uncore_read()
93 prev = local64_read(&hwc->prev_count); in amd_uncore_read()
94 rdpmcl(hwc->event_base_rdpmc, new); in amd_uncore_read()
95 local64_set(&hwc->prev_count, new); in amd_uncore_read()
96 delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT); in amd_uncore_read()
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