| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | mdio-mux-multiplexer.txt | 1 Properties for an MDIO bus multiplexer consumer device 3 This is a special case of MDIO mux when MDIO mux is defined as a consumer 4 of a mux producer device. The mux producer can be of any type like mmio mux 5 producer, gpio mux producer or generic register based mux producer. 7 Required properties in addition to the MDIO Bus multiplexer properties: 9 - compatible : should be "mmio-mux-multiplexer" 10 - mux-controls : mux controller node to use for operating the mux 11 - mdio-parent-bus : phandle to the parent MDIO bus. 13 each child node of mdio bus multiplexer consumer device represent a mdio 17 Documentation/devicetree/bindings/mux/mux-controller.txt [all …]
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| D | mdio-mux-mmioreg.txt | 1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device 3 This is a special case of a MDIO bus multiplexer. A memory-mapped device, 4 like an FPGA, is used to control which child bus is connected. The mdio-mux 5 node must be a child of the memory-mapped device. The driver currently only 6 supports devices with 8, 16 or 32-bit registers. 10 - compatible : string, must contain "mdio-mux-mmioreg" 12 - reg : integer, contains the offset of the register that controls the bus 16 - mux-mask : integer, contains an eight-bit mask that specifies which 18 'reg' property of each child mdio-mux node must be constrained by 23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes. [all …]
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| D | brcm,mdio-mux-iproc.txt | 1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs. 3 This MDIO bus multiplexer defines buses that could be internal as well as 4 external to SoCs and could accept MDIO transaction compatible to C-22 or 5 C-45 Clause. When child bus is selected, one needs to select these two 6 properties as well to generate desired MDIO transaction on appropriate bus. 10 MDIO multiplexer node: 11 - compatible: brcm,mdio-mux-iproc. 13 Every non-ethernet PHY requires a compatible so that it could be probed based 17 - clocks: phandle of the core clock which drives the mdio block. 20 at- Documentation/devicetree/bindings/net/mdio-mux.txt [all …]
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| D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-emac 19 - const: allwinner,sun8i-v3s-emac [all …]
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| D | mdio-mux-meson-g12a.txt | 1 Properties for the MDIO bus multiplexer/glue of Amlogic G12a SoC family. 3 This is a special case of a MDIO bus multiplexer. It allows to choose between 4 the internal mdio bus leading to the embedded 10/100 PHY or the external 5 MDIO bus. 8 - compatible : amlogic,g12a-mdio-mux 9 - reg: physical address and length of the multiplexer/glue registers 10 - clocks: list of clock phandle, one for each entry clock-names. 11 - clock-names: should contain the following: 18 mdio_mux: mdio-multiplexer@4c000 { 19 compatible = "amlogic,g12a-mdio-mux"; [all …]
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| D | mdio-mux-gpio.txt | 1 Properties for an MDIO bus multiplexer/switch controlled by GPIO pins. 3 This is a special case of a MDIO bus multiplexer. One or more GPIO 8 - compatible : mdio-mux-gpio. 9 - gpios : GPIO specifiers for each GPIO line. One or more must be specified. 14 /* The parent MDIO bus. */ 15 smi1: mdio@1180000001900 { 16 compatible = "cavium,octeon-3860-mdio"; 17 #address-cells = <1>; 18 #size-cells = <0>; 23 An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mux/ |
| D | reg-mux.txt | 1 Generic register bitfield-based multiplexer controller bindings 7 - compatible : should be one of 8 "reg-mux" : if parent device of mux controller is not syscon device 9 "mmio-mux" : if parent device of mux controller is syscon device 10 - #mux-control-cells : <1> 11 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask 12 pairs, each describing a single mux control. 13 * Standard mux-controller bindings as decribed in mux-controller.txt 16 - idle-states : if present, the state the muxes will have when idle. The 21 pair in the mux-reg-masks array. [all …]
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| /kernel/linux/linux-5.10/drivers/net/mdio/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 # Makefile for Linux MDIO bus drivers 4 obj-$(CONFIG_OF_MDIO) += of_mdio.o 6 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o 7 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o 8 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o 9 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o 10 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o 11 obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o 12 obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o [all …]
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| D | mdio-mux-mmioreg.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Simple memory-mapped device MDIO MUX driver 16 #include <linux/mdio-mux.h> 26 * MDIO multiplexing switch function 28 * This function is called by the mdio-mux layer when it thinks the mdio bus 31 * 'current_child' is the current value of the mux register (masked via 32 * s->mask). 34 * 'desired_child' is the value of the 'reg' property of the target child MDIO 37 * The first time this function is called, current_child == -1. 39 * If current_child == desired_child, then the mux is already set to the [all …]
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| D | mdio-mux-multiplexer.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* MDIO bus multiplexer using kernel multiplexer subsystem 8 #include <linux/mdio-mux.h> 10 #include <linux/mux/consumer.h> 19 * mdio_mux_multiplexer_switch_fn - This function is called by the mdio-mux 20 * layer when it thinks the mdio bus 22 * @current_child: current value of the mux register. 23 * @desired_child: value of the 'reg' property of the target child MDIO node. 27 * The first time this function is called, current_child == -1. 28 * If current_child == desired_child, then the mux is already set to the [all …]
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| D | mdio-mux-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/mdio-mux.h> 15 #define DRV_DESCRIPTION "GPIO controlled MDIO bus multiplexer driver" 33 gpiod_set_array_value_cansleep(s->gpios->ndescs, s->gpios->desc, in mdio_mux_gpio_switch_fn() 34 s->gpios->info, values); in mdio_mux_gpio_switch_fn() 45 gpios = devm_gpiod_get_array(&pdev->dev, NULL, GPIOD_OUT_LOW); in mdio_mux_gpio_probe() 49 s = devm_kzalloc(&pdev->dev, sizeof(*s), GFP_KERNEL); in mdio_mux_gpio_probe() 51 return -ENOMEM; in mdio_mux_gpio_probe() 53 s->gpios = gpios; in mdio_mux_gpio_probe() 55 r = mdio_mux_init(&pdev->dev, pdev->dev.of_node, in mdio_mux_gpio_probe() [all …]
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| D | mdio-mux-meson-g12a.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/clk-provider.h> 12 #include <linux/mdio-mux.h> 76 val = readl(pll->base + ETH_PLL_CTL0); in g12a_ephy_pll_recalc_rate() 86 u32 val = readl(pll->base + ETH_PLL_CTL0); in g12a_ephy_pll_enable() 90 writel(val, pll->base + ETH_PLL_CTL0); in g12a_ephy_pll_enable() 94 writel(val, pll->base + ETH_PLL_CTL0); in g12a_ephy_pll_enable() 101 return readl_poll_timeout(pll->base + ETH_PLL_CTL0, val, in g12a_ephy_pll_enable() 110 val = readl(pll->base + ETH_PLL_CTL0); in g12a_ephy_pll_disable() 113 writel(val, pll->base + ETH_PLL_CTL0); in g12a_ephy_pll_disable() [all …]
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| D | mdio-mux-bcm-iproc.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/mdio-mux.h> 62 /* Disable external mdio master access */ in mdio_mux_iproc_config() 63 val = readl(md->base + MDIO_SCAN_CTRL_OFFSET); in mdio_mux_iproc_config() 65 writel(val, md->base + MDIO_SCAN_CTRL_OFFSET); in mdio_mux_iproc_config() 67 if (md->core_clk) { in mdio_mux_iproc_config() 68 /* use rate adjust regs to derrive the mdio's operating in mdio_mux_iproc_config() 71 divisor = clk_get_rate(md->core_clk) / MDIO_OPERATING_FREQUENCY; in mdio_mux_iproc_config() 75 writel(val, md->base + MDIO_RATE_ADJ_EXT_OFFSET); in mdio_mux_iproc_config() 76 writel(val, md->base + MDIO_RATE_ADJ_INT_OFFSET); in mdio_mux_iproc_config() [all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | mdio-mux.h | 2 * MDIO bus multiplexer framwork. 15 /* mdio_mux_init() - Initialize a MDIO mux 16 * @dev The device owning the MDIO mux 17 * @mux_node The device node of the MDIO mux 18 * @switch_fn The function called for switching target MDIO child 19 * mux_handle A pointer to a (void *) used internaly by mdio-mux
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 4 - compatible: "lantiq,pinctrl-xway", (DEPRECATED: Use "lantiq,pinctrl-danube") 5 "lantiq,pinctrl-xr9", (DEPRECATED: Use "lantiq,xrx100-pinctrl" or 6 "lantiq,xrx200-pinctrl") 7 "lantiq,pinctrl-ase", (DEPRECATED: Use "lantiq,ase-pinctrl") 8 "lantiq,<chip>-pinctrl", where <chip> is: 14 - reg: Should contain the physical address and length of the gpio/pinmux 17 Please refer to pinctrl-bindings.txt in this directory for details of the 24 mux function to select on those group(s), and two pin configuration parameters: 25 pull-up and open-drain 31 other words, a subnode that lists a mux function but no pin configuration [all …]
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| D | lantiq,pinctrl-falcon.txt | 4 - compatible: "lantiq,pinctrl-falcon" 5 - reg: Should contain the physical address and length of the gpio/pinmux 8 Please refer to pinctrl-bindings.txt in this directory for details of the 15 mux function to select on those group(s), and two pin configuration parameters: 16 pull-up and open-drain 22 other words, a subnode that lists a mux function but no pin configuration 25 information about e.g. the mux function. 29 Definition of mux function groups: 31 Required subnode-properties: 32 - lantiq,groups : An array of strings. Each string contains the name of a group. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 TI Programmable Real-Time Unit and Industrial Communication Subsystem 11 - Suman Anna <s-anna@ti.com> 15 The Programmable Real-Time Unit and Industrial Communication Subsystem 16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC 18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and 23 peripheral interfaces, fast real-time responses, or specialized data handling. [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | qcom-ipq8064-rb3011.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "qcom-ipq8064.dtsi" 3 #include <dt-bindings/input/input.h> 6 model = "MikroTik RB3011UiAS-RM"; 13 mdio-gpio0 = &mdio0; 14 mdio-gpio1 = &mdio1; 19 stdout-path = "serial0:115200n8"; 27 mdio0: mdio-0 { 29 compatible = "virtual,mdio-gpio"; 32 #address-cells = <1>; [all …]
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| D | bcm47094-linksys-panamera.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 /dts-v1/; 9 #include "bcm5301x-nand-cs0-bch8.dtsi" 25 gpio-keys { 26 compatible = "gpio-keys"; 48 compatible = "gpio-leds"; 58 trigger-sources = <&ohci_port2>, <&ehci_port2>; 59 linux,default-trigger = "usbport"; 65 trigger-sources = <&ohci_port1>, <&ehci_port1>, 67 linux,default-trigger = "usbport"; [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p5040ds.dts | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 35 /include/ "p5040si-pre.dtsi" 40 #address-cells = <2>; 41 #size-cells = <2>; 42 interrupt-parent = <&mpic>; 74 reserved-memory { 75 #address-cells = <2>; 76 #size-cells = <2>; 79 bman_fbpr: bman-fbpr { 83 qman_fqd: qman-fqd { [all …]
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| D | t2080qds.dts | 4 * Copyright 2013 - 2015 Freescale Semiconductor Inc. 35 /include/ "t208xsi-pre.dtsi" 41 #address-cells = <2>; 42 #size-cells = <2>; 43 interrupt-parent = <&mpic>; 66 phy-handle = <&phy_sgmii_s3_1e>; 67 phy-connection-type = "xgmii"; 71 phy-handle = <&phy_sgmii_s3_1f>; 72 phy-connection-type = "xgmii"; 76 phy-handle = <&rgmii_phy1>; [all …]
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| D | t2081qds.dts | 4 * Copyright 2013 - 2015 Freescale Semiconductor Inc. 35 /include/ "t208xsi-pre.dtsi" 41 #address-cells = <2>; 42 #size-cells = <2>; 43 interrupt-parent = <&mpic>; 58 phy-handle = <&phy_sgmii_s7_1c>; 59 phy-connection-type = "sgmii"; 63 phy-handle = <&phy_sgmii_s7_1d>; 64 phy-connection-type = "sgmii"; 68 phy-handle = <&rgmii_phy1>; [all …]
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| D | p4080ds.dts | 4 * Copyright 2009 - 2015 Freescale Semiconductor Inc. 35 /include/ "p4080si-pre.dtsi" 40 #address-cells = <2>; 41 #size-cells = <2>; 42 interrupt-parent = <&mpic>; 62 reserved-memory { 63 #address-cells = <2>; 64 #size-cells = <2>; 67 bman_fbpr: bman-fbpr { 71 qman_fqd: qman-fqd { [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 18 compatible = "amlogic,meson-gxl-usb-ctrl"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls1028a.dtsi" 17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; 29 stdout-path = "serial0:115200n8"; 37 sys_mclk: clock-mclk { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <25000000>; 43 reg_1p8v: regulator-1p8v { [all …]
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