Searched +full:single +full:- +full:core (Results 1 – 25 of 1024) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | topology.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
28 the past a socket always contained a single package (see below), but with the
35 - packages
36 - cores
37 - threads
48 Package-related topology information in the kernel:
50 - cpuinfo_x86.x86_max_cores:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/omap/ |
| D | ctrl.txt | 11 [1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
15 - compatible: Must be one of:
16 "ti,am3-scm"
17 "ti,am4-scm"
18 "ti,dm814-scrm"
19 "ti,dm816-scrm"
20 "ti,omap2-scm"
21 "ti,omap3-scm"
22 "ti,omap4-scm-core"
23 "ti,omap4-scm-padconf-core"
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 2 -------------------
4 * C64X+ Core Interrupt Controller
6 The core interrupt controller provides 16 prioritized interrupts to the
7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
9 sources coming from outside the core.
12 --------------------
13 - compatible: Should be "ti,c64x+core-pic";
14 - #interrupt-cells: <1>
17 ------------------------------
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
32 A physical connector on the motherboard that accepts a single memory
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
45 same branch can be used in single mode or in lockstep mode. When
50 of correcting more errors than on single mode.
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
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| D | xillybus.rst | 10 - Introduction
11 -- Background
12 -- Xillybus Overview
14 - Usage
15 -- User interface
16 -- Synchronization
17 -- Seekable pipes
19 - Internals
20 -- Source code organization
21 -- Pipe attributes
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| D | generic-counter.rst | 1 .. SPDX-License-Identifier: GPL-2.0
23 counter devices consist of a core set of components. This core set of
27 There are three core components to a counter:
39 ------
57 -------
68 Signal does not trigger the count function. In Pulse-Direction count
91 -----
106 * Pulse-Direction:
114 - x1 A:
120 - x1 B:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@st.com>
27 - st,stm32f4-adc-core
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ |
| D | example-schema.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 # All the top-level keys are standard json-schema keywords except for
10 $id: http://devicetree.org/schemas/example-schema.yaml#
11 # $schema is the meta-schema this schema should be validated with.
12 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Rob Herring <robh@kernel.org>
20 A more detailed multi-line description of the binding.
44 - items:
51 - enum:
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| D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
32 - ad,adm9240
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | pistachio-clock.txt | 4 Pistachio has four clock controllers (core clock, peripheral clock, peripheral
6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
17 Core clock controller:
18 ----------------------
20 The core clock controller generates clocks for the CPU, RPU (WiFi + BT
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
17 The bottom hierarchy level sits at core or thread level depending on whether
18 symmetric multi-threading (SMT) is supported or not.
23 in the system and map to the hierarchy level "core" above.
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
39 2 - cpu-map node
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | i2c.txt | 8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
18 are described by a single value.
21 -----------------------------
26 - clock-frequency
29 - i2c-bus
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spmi/ |
| D | qcom,spmi-pmic-arb.txt | 4 controller with wrapping arbitration logic to allow for multiple on-chip
5 devices to control a single SPMI master.
13 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
17 - compatible : should be "qcom,spmi-pmic-arb".
18 - reg-names : must contain:
19 "core" - core registers
20 "intr" - interrupt controller registers
21 "cnfg" - configuration registers
23 "chnls" - tx-channel per virtual slave registers.
24 "obsrvr" - rx-channel (called observer) per virtual slave registers.
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| /kernel/linux/linux-5.10/include/media/ |
| D | tuner.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * tuner.h - definition for different tuners
5 * Copyright (C) 1997 Markus Schroeder (schroedm@uni-duesseldorf.de)
6 * minor modifications by Ralph Metzler (rjkm@thp.uni-koeln.de)
14 #include <media/v4l2-mc.h>
73 #define TUNER_PHILIPS_4IN1 44 /* ATI TV Wonder Pro - Conexant */
83 #define TUNER_MICROTUNE_4042FI5 49 /* DViCO FusionHDTV 3 Gold-Q - 4042 FI5 (3X 8147) */
90 #define TUNER_TCL_2002MB 55 /* Hauppauge PVR-150 PAL */
92 #define TUNER_PHILIPS_FQ1216AME_MK4 56 /* Hauppauge PVR-150 PAL */
93 #define TUNER_PHILIPS_FQ1236A_MK4 57 /* Hauppauge PVR-500MCE NTSC */
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| /kernel/linux/linux-5.10/arch/c6x/include/asm/ |
| D | irq.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <linux/radix-tree.h>
22 * The C64X+ core has 16 IRQ vectors. One each is used by Reset and NMI. Two
28 * single core IRQ vector. There are four combined sources, each of which
30 * can each route a single SoC interrupt directly.
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| /kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/chelsio/ |
| D | cxgb.rst | 1 .. SPDX-License-Identifier: GPL-2.0
35 Adaptive Interrupts (adaptive-rx)
36 ---------------------------------
46 By default, adaptive-rx is disabled.
47 To enable adaptive-rx::
49 ethtool -C <interface> adaptive-rx on
51 To disable adaptive-rx, use ethtool::
53 ethtool -C <interface> adaptive-rx off
55 After disabling adaptive-rx, the timer latency value will be set to 50us.
56 You may set the timer latency after disabling adaptive-rx::
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| /kernel/linux/linux-5.10/Documentation/sound/designs/ |
| D | tracepoints.rst | 8 Tracepoints in ALSA PCM core
11 ALSA PCM core registers ``snd_pcm`` subsystem to kernel tracepoint system.
19 ------------------------------------
25 -----------------------------------------------------
30 In a design of ALSA PCM core, data transmission is abstracted as PCM substream.
34 interaction between applications and ALSA PCM core. Once decided, runtime of
46 Configurable. ALSA PCM core and some drivers handle this flag to select
53 - SNDRV_PCM_HW_PARAM_ACCESS
54 - SNDRV_PCM_HW_PARAM_FORMAT
55 - SNDRV_PCM_HW_PARAM_SUBFORMAT
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| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | marvel.rst | 13 ------------
16 - 88F5082
17 - 88F5181
18 - 88F5181L
19 - 88F5182
21 … - Datasheet: http://www.embeddedarm.com/documentation/third-party/MV88F5182-datasheet.pdf
22 …- Programmer's User Guide: http://www.embeddedarm.com/documentation/third-party/MV88F5182-opensour…
23 … - User Manual: http://www.embeddedarm.com/documentation/third-party/MV88F5182-usermanual.pdf
24 - 88F5281
26 …- Datasheet: http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sh…
[all …]
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| /kernel/linux/linux-5.10/drivers/hwspinlock/ |
| D | hwspinlock_internal.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com
7 * Contact: Ohad Ben-Cohen <ohad@wizery.com>
19 * struct hwspinlock_ops - platform-specific hwspinlock handlers
21 * @trylock: make a single attempt to take the lock. returns 0 on
24 * @relax: optional, platform-specific relax handler, called by hwspinlock
25 * core while spinning on a lock, between two successive
35 * struct hwspinlock - this struct represents a single hwspinlock instance
37 * @lock: initialized and used by hwspinlock core
38 * @priv: private data, owned by the underlying platform-specific hwspinlock drv
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/ |
| D | README | 9 tree tools/perf/pmu-events/arch/foo.
11 - Regular files with '.json' extension in the name are assumed to be
14 - The CSV file that maps a specific CPU to its set of PMU events is to
17 - Directories are traversed, but all other files are ignored.
19 - To reduce JSON event duplication per architecture, platform JSONs may
26 such as Pipelining, Cache, Memory, Floating-point etc. All events for a topic
27 should be placed in a separate JSON file - where the file name identifies
28 the topic. Eg: "Floating-point.json".
33 $ ls tools/perf/pmu-events/arch/x86/silvermont
34 cache.json memory.json virtual-memory.json
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| /kernel/linux/linux-5.10/fs/squashfs/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SquashFS 4.0 - Squashed file system support"
7 Read-Only File System). Squashfs is a highly compressed read-only
16 Squashfs is intended for general read-only filesystem use, for
53 on the single buffer.
62 decompression. Each one exhibits various trade-offs between
65 If in doubt, select "Single threaded compression"
68 bool "Single threaded compression"
70 Traditionally Squashfs has used single-threaded decompression.
77 By default Squashfs uses a single decompressor but it gives
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-of-dwcmshc.txt | 4 - compatible: should be one of the following:
5 "snps,dwcmshc-sdhci"
6 - reg: offset and length of the register set for the device.
7 - interrupts: a single interrupt specifier.
8 - clocks: Array of clocks required for SDHCI; requires at least one for
9 core clock.
10 - clock-names: Array of names corresponding to clocks property; shall be
11 "core" for core clock and "bus" for optional bus clock.
15 compatible = "snps,dwcmshc-sdhci";
19 bus-width = <8>;
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/powerpc/ |
| D | mapfile.csv | 9 # to tools/perf/pmu-events/arch/powerpc/.
10 # Type is core, uncore etc
12 # Multiple PVRs could map to a single JSON file.
16 004[bcd][[:xdigit:]]{4},1,power8,core
17 004e[[:xdigit:]]{4},1,power9,core
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | st-pincfg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
29 /* User-frendly defines for Pin Direction */
49 * single-edge data non inverted clock, retime data with clk
54 * single-edge data inverted clock, retime data with clk
59 * double-edge data, retime data with clk
64 * Retiming the clk pins will park clock & reduce the noise within the core.
68 * CLK0, CLK1 modes with non-inverted clock
69 * Retiming the clk pins will park clock & reduce the noise within the core.
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| /kernel/linux/linux-5.10/Documentation/networking/ |
| D | af_xdp.rst | 1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
64 single-consumer / single-producer (for performance reasons), the new
68 UMEM. It is the responsibility of a single process to handle the UMEM.
72 user-space application can place an XSK at an arbitrary place in this
99 http://vger.kernel.org/lpc_net2018_talks/lpc18_paper_af_xdp_perf-v2.pdf. Do
106 ----
109 equal-sized frames. An UMEM is associated to a netdev and a specific
115 An AF_XDP is socket linked to a single UMEM, but one UMEM can have
121 The UMEM has two single-producer/single-consumer rings that are used
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