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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Drenesas,etheravb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
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Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Ardelean <alexandru.ardelean@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
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Dti,dp83822.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Dan Murphy <dmurphy@ti.com>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24 - $ref: "ethernet-phy.yaml#"
30 ti,link-loss-low:
39 ti,fiber-mode:
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Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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Dallwinner,sun8i-a83t-emac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-emac
19 - const: allwinner,sun8i-v3s-emac
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Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
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Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dhihope-rzg2-ex.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 pinctrl-0 = <&avb_pins>;
20 pinctrl-names = "default";
21 phy-handle = <&phy0>;
22 tx-internal-delay-ps = <2000>;
23 rx-internal-delay-ps = <1800>;
26 phy0: ethernet-phy@0 {
28 interrupt-parent = <&gpio2>;
30 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
35 pinctrl-0 = <&can0_pins>;
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Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <32768>;
24 clock-output-names = "osc_32k";
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
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Dr8a77995-draak.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Renesas Electronics Corp.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
23 compatible = "pwm-backlight";
26 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
27 default-brightness-level = <10>;
29 power-supply = <&reg_12p0v>;
30 enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
35 stdout-path = "serial0:115200n8";
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Dr8a774a1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <0>;
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Dr8a774b1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774b1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
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Dr8a774c0.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a774c0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <0>;
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Dr8a774e1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774e1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
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Dr8a77990-ebisu.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
29 audio_clkout: audio-clkout {
32 * but needed to avoid cs2000/rcar_sound probe dead-lock
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <11289600>;
40 compatible = "pwm-backlight";
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/kernel/linux/linux-5.10/drivers/net/phy/
Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
29 #include <linux/delay.h>
160 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
164 if (type && type->interrupt_level_mask) in kszphy_config_intr()
165 mask = type->interrupt_level_mask; in kszphy_config_intr()
177 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in kszphy_config_intr()
213 return -EINVAL; in kszphy_setup_led()
233 * unique (non-broadcast) address on a shared bus.
274 struct kszphy_priv *priv = phydev->priv; in kszphy_config_reset()
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Dadin.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/delay.h>
64 * The bit-fields are the same as specified by IEEE for EEE.
86 /* RGMII internal delay settings for rx and tx for ADIN1300 */
108 * struct adin_cfg_reg_map - map a config value to aregister value
137 * struct adin_clause45_mmd_map - map to convert Clause 45 regs to Clause 22
176 * struct adin_priv - ADIN PHY driver private data
192 return -EINVAL; in adin_lookup_reg_value()
200 struct device *dev = &phydev->mdio.dev; in adin_get_reg_value()
234 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in adin_config_rgmii_mode()
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Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <linux/delay.h>
203 put_device(&phydev->mdio.dev); in phy_device_free()
235 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
237 struct net_device *netdev = phydev->attached_dev; in mdio_bus_phy_may_suspend()
239 if (!drv || !phydrv->suspend) in mdio_bus_phy_may_suspend()
243 * suspended as part of a prior call to phy_disconnect() -> in mdio_bus_phy_may_suspend()
244 * phy_detach() -> phy_suspend() because the parent netdev might be the in mdio_bus_phy_may_suspend()
250 if (netdev->wol_enabled) in mdio_bus_phy_may_suspend()
258 if (netdev->dev.parent && device_may_wakeup(netdev->dev.parent)) in mdio_bus_phy_may_suspend()
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/kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-sun8i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer
11 #include <linux/mdio-mux.h>
26 /* General notes on dwmac-sun8i:
31 /* struct emac_variant - Describe dwmac-sun8i hardware variant
37 * @soc_has_internal_phy: Does the MAC embed an internal PHY
42 * @rx_delay_max: Maximum raw value for RX delay chain
43 * @tx_delay_max: Maximum raw value for TX delay chain
45 * the RX and TX delay chain registers. A
59 /* struct sunxi_priv_data - hold all sunxi private data
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/kernel/linux/linux-5.10/include/net/
Dmac80211.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * mac80211 <-> driver interface
5 * Copyright 2002-2005, Devicescape Software, Inc.
6 * Copyright 2006-2007 Jiri Benc <jbenc@suse.cz>
7 * Copyright 2007-2010 Johannes Berg <johannes@sipsolutions.net>
8 * Copyright 2013-2014 Intel Mobile Communications GmbH
9 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
10 * Copyright (C) 2018 - 2020 Intel Corporation
30 * only partial functionality in hard- or firmware. This document
31 * defines the interface between mac80211 and low-level hardware
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsun8i-a83t-bananapi-m3.dts2 * Copyright 2017 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
51 model = "Banana Pi BPI-M3";
52 compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
64 compatible = "hdmi-connector";
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/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/
Dmvneta.c7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
151 #define MVNETA_TX_INTR_MASK(nr_txqs) (((1 << nr_txqs) - 1) << 0)
153 #define MVNETA_RX_INTR_MASK(nr_rxqs) (((1 << nr_rxqs) - 1) << 8)
264 (((index) < (q)->last_desc) ? ((index) + 1) : 0)
307 /* Max number of Tx descriptors */
333 #define MVNETA_MAX_RX_BUF_SIZE (PAGE_SIZE - MVNETA_SKB_PAD)
336 ((addr >= txq->tso_hdrs_phys) && \
337 (addr < txq->tso_hdrs_phys + txq->size * TSO_HEADER_SIZE))
340 (((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT)
432 struct mvneta_stats ps; member
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/kernel/linux/linux-5.10/drivers/net/ethernet/renesas/
Dravb_main.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2019 Renesas Electronics Corporation
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
13 #include <linux/delay.h>
14 #include <linux/dma-mapping.h>
68 return -ETIMEDOUT; in ravb_wait()
89 switch (priv->speed) { in ravb_set_rate()
101 u32 reserve = (unsigned long)skb->data & (RAVB_ALIGN - 1); in ravb_set_buffer_align()
104 skb_reserve(skb, RAVB_ALIGN - reserve); in ravb_set_buffer_align()
115 ether_addr_copy(ndev->dev_addr, mac); in ravb_read_mac_address()
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/kernel/linux/linux-5.10/include/uapi/linux/
Dnl80211.h6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
13 * Copyright 2015-2017 Intel Deutschland GmbH
14 * Copyright (C) 2018-2020 Intel Corporation
32 * be careful not to break things - i.e. don't move anything around or so
74 * - a setup station entry is added, not yet authorized, without any rate
76 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid
79 * - %NL80211_TDLS_ENABLE_LINK is then used
80 * - after this, the only valid operation is to remove it by tearing down
95 * Frame registration is done on a per-interface basis and registrations
137 * software, like the AP-VLAN type in mac80211 for example, there's
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/kernel/linux/linux-5.10/drivers/net/wireless/
Dmac80211_hwsim.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mac80211_hwsim - software simulator of 802.11 radio(s) for mac80211
6 * Copyright (c) 2016 - 2017 Intel Deutschland GmbH
7 * Copyright (C) 2018 - 2020 Intel Corporation
12 * - Add TSF sync and fix IBSS beacon transmission by adding
14 * - RX filtering based on filter configuration (data->rx_filter)
66 MODULE_PARM_DESC(support_p2p_device, "Support P2P-Device interface type");
69 * enum hwsim_regtest - the type of regulatory tests we offer
93 * this by using a custom beacon-capable regulatory domain for the first
111 * non-strict settings using the second driver regulatory request. All
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