| /kernel/linux/linux-5.10/Documentation/driver-api/usb/ |
| D | writing_musb_glue_layer.rst | 2 Writing a MUSB Glue Layer 10 The Linux MUSB subsystem is part of the larger Linux USB subsystem. It 11 provides support for embedded USB Device Controllers (UDC) that do not 15 Instead, these embedded UDC rely on the USB On-the-Go (OTG) 17 reference design used in most cases is the Multipoint USB Highspeed 18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™ 21 As a self-taught exercise I have written an MUSB glue layer for the 22 Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the 24 ``drivers/usb/musb/jz4740.c``. In this documentation I will walk through the 25 basics of the ``jz4740.c`` glue layer, explaining the different pieces and [all …]
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| /kernel/linux/linux-5.10/drivers/usb/musb/ |
| D | sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Allwinner sun4i MUSB Glue Layer 18 #include <linux/phy/phy-sun4i-usb.h> 22 #include <linux/usb/musb.h> 23 #include <linux/usb/of.h> 24 #include <linux/usb/usb_phy_generic.h> 92 struct sunxi_glue *glue = container_of(work, struct sunxi_glue, work); in sunxi_musb_work() local 95 if (!test_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_work() 98 if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) { in sunxi_musb_work() 99 struct musb *musb = glue->musb; in sunxi_musb_work() [all …]
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| D | jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Ingenic JZ4740 "glue layer" 9 #include <linux/dma-mapping.h> 15 #include <linux/usb/role.h> 16 #include <linux/usb/usb_phy_generic.h> 33 if (IS_ENABLED(CONFIG_USB_INVENTRA_DMA) && musb->dma_controller) in jz4740_musb_interrupt() 34 retval_dma = dma_controller_irq(irq, musb->dma_controller); in jz4740_musb_interrupt() 36 spin_lock_irqsave(&musb->lock, flags); in jz4740_musb_interrupt() 38 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); in jz4740_musb_interrupt() 39 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); in jz4740_musb_interrupt() [all …]
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| D | omap2430.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2005-2007 by Texas Instruments 19 #include <linux/dma-mapping.h> 23 #include <linux/usb/musb.h> 37 #define glue_to_musb(g) platform_get_drvdata(g->musb) 46 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_exit() 48 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_exit() 55 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_init() 57 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_init() 62 struct omap2430_glue *glue = _glue; in omap2430_musb_mailbox() local [all …]
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| D | mediatek.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <linux/dma-mapping.h> 15 #include <linux/usb/role.h> 16 #include <linux/usb/usb_phy_generic.h> 54 static int mtk_musb_clks_get(struct mtk_glue *glue) in mtk_musb_clks_get() argument 56 struct device *dev = glue->dev; in mtk_musb_clks_get() 58 glue->main = devm_clk_get(dev, "main"); in mtk_musb_clks_get() 59 if (IS_ERR(glue->main)) { in mtk_musb_clks_get() 61 return PTR_ERR(glue->main); in mtk_musb_clks_get() 64 glue->mcu = devm_clk_get(dev, "mcu"); in mtk_musb_clks_get() [all …]
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| D | am35x.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Texas Instruments AM35x "glue layer" 8 * Based on the DA8xx "glue layer" code. 9 * Copyright (c) 2008-2009, MontaVista Software, Inc. <source@mvista.com> 19 #include <linux/dma-mapping.h> 20 #include <linux/usb/usb_phy_generic.h> 21 #include <linux/platform_data/usb-omap.h> 28 /* USB 2.0 OTG module registers */ 57 /* USB interrupt register bits */ 79 * am35x_musb_enable - enable interrupts [all …]
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| D | da8xx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments DA8xx/OMAP-L1x "glue layer" 5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com> 7 * Based on the DaVinci "glue layer" code. 8 * Copyright (C) 2005-2006 by Texas Instruments 23 #include <linux/dma-mapping.h> 24 #include <linux/usb/usb_phy_generic.h> 32 /* USB 2.0 OTG module registers */ 46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2)) 54 /* USB interrupt register bits */ [all …]
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| D | musb_dsps.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments DSPS platforms "glue layer" 7 * Based on the am35x "glue layer" code. 20 #include <linux/dma-mapping.h> 23 #include <linux/usb/usb_phy_generic.h> 24 #include <linux/platform_data/usb-omap.h> 31 #include <linux/usb/of.h> 100 * DSPS glue structure. 134 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms) in dsps_mod_timer() argument 136 struct musb *musb = platform_get_drvdata(glue->musb); in dsps_mod_timer() [all …]
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| D | ux500.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2010 ST-Ericsson AB 16 #include <linux/usb/musb-ux500.h> 32 #define glue_to_musb(g) platform_get_drvdata(g->musb) 43 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in ux500_musb_set_vbus() 46 if (musb->xceiv->otg->state == OTG_STATE_A_IDLE) { in ux500_musb_set_vbus() 49 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); in ux500_musb_set_vbus() 54 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) { in ux500_musb_set_vbus() 57 dev_err(musb->controller, in ux500_musb_set_vbus() 64 musb->is_active = 1; in ux500_musb_set_vbus() [all …]
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| D | davinci.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2005-2006 by Texas Instruments 18 #include <linux/dma-mapping.h> 19 #include <linux/usb/usb_phy_generic.h> 24 #include <asm/mach-types.h> 54 /* power everything up; start the on-chip PHY and its PLL */ in phy_on() 68 /* powerdown the on-chip PHY, its PLL, and the OTG block */ in phy_off() 81 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) in davinci_musb_enable() 83 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable() 85 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) in davinci_musb_enable() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | dwc3-st.txt | 1 ST DWC3 glue logic 3 This file documents the parameters for the dwc3-st driver. 4 This driver controls the glue logic used to configure the dwc3 core on 8 - compatible : must be "st,stih407-dwc3" 9 - reg : glue logic base address and USB syscfg ctrl register offset 10 - reg-names : should be "reg-glue" and "syscfg-reg" 11 - st,syscon : should be phandle to system configuration node which 12 encompasses the glue registers 13 - resets : list of phandle and reset specifier pairs. There should be two entries, one 15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset" [all …]
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| D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Amlogic Meson G12A DWC3 USB SoC Controller Glue 11 - Neil Armstrong <narmstrong@baylibre.com> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. [all …]
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| D | am33xx-usb.txt | 3 - compatible: ti,am33xx-usb 4 - reg: offset and length of the usbss register sets 5 - ti,hwmods : must be "usb_otg_hs" 7 The glue layer contains multiple child nodes. It is required to have 8 at least a control module node, USB node and a PHY node. The second USB 13 - compatible: ti,am335x-usb-ctrl-module 14 - reg: offset and length of the "USB control registers" in the "Control 15 Module" block. A second offset and length for the USB wake up control 17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for 18 the USB wake up control register. [all …]
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| D | mediatek,mtu3.txt | 4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3", 5 soc-model is the name of SoC, such as mt8173, mt2712 etc, 8 - "mediatek,mt8173-mtu3" 9 - reg : specifies physical base address and size of the registers 10 - reg-names: should be "mac" for device IP and "ippc" for IP port control 11 - interrupts : interrupt used by the device IP 12 - power-domains : a phandle to USB power domain node to control USB's 14 - vusb33-supply : regulator of USB avdd3.3v 15 - clocks : a list of phandle + clock-specifier pairs, one for each 16 entry in clock-names [all …]
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| D | omap-usb.txt | 1 OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS 3 OMAP MUSB GLUE 4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb" 5 - ti,hwmods : must be "usb_otg_hs" 6 - multipoint : Should be "1" indicating the musb controller supports 7 multipoint. This is a MUSB configuration-specific setting. 8 - num-eps : Specifies the number of endpoints. This is also a 9 MUSB configuration-specific setting. Should be set to "16" 10 - ram-bits : Specifies the ram address size. Should be set to "12" 11 - interface-type : This is a board specific setting to describe the type of [all …]
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| D | mediatek,mtk-xhci.txt | 6 the second one supports dual-role mode, and the host is based on xHCI 11 ------------------------------------------------------------------------ 14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci", 15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using 16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in 18 - "mediatek,mt8173-xhci" 19 - reg : specifies physical base address and size of the registers 20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control 21 - interrupts : interrupt used by the controller 22 - power-domains : a phandle to USB power domain node to control USB's [all …]
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| /kernel/linux/linux-5.10/drivers/usb/dwc2/ |
| D | pci.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * pci.c - DesignWare HS OTG Controller PCI driver 5 * Copyright (C) 2004-2013 Synopsys, Inc. 16 * 3. The names of the above-listed copyright holders may not be used 50 #include <linux/usb.h> 52 #include <linux/usb/hcd.h> 53 #include <linux/usb/ch11.h> 55 #include <linux/usb/usb_phy_generic.h> 59 static const char dwc2_driver_name[] = "dwc2-pci"; 68 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS && in dwc2_pci_quirks() [all …]
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| /kernel/linux/linux-5.10/drivers/usb/chipidea/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 12 Say Y here if your system has a dual role high speed USB 14 Dual-role switch (ID, OTG FSM, sysfs), Host-only, and 15 Peripheral-only. 37 tristate "Enable PCI glue driver" if EMBEDDED 43 tristate "Enable MSM hsusb glue driver" if EMBEDDED 47 tristate "Enable i.MX USB glue driver" if EMBEDDED 52 tristate "Enable generic USB2 glue driver" if EMBEDDED 56 tristate "Enable Tegra UDC glue driver" if EMBEDDED
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| /kernel/linux/linux-5.10/Documentation/admin-guide/wimax/ |
| D | i2400m.rst | 7 :Copyright: |copy| 2008 Intel Corporation < linux-wimax@intel.com > 25 linux-VERSION, the development package is called 26 linux-dev-VERSION or linux-headers-VERSION). 33 ------------------------------------------------------ 39 If USB or SDIO are not enabled in the kernel configuration, the options 40 to build the i2400m USB or SDIO drivers will not show. Enable said 46 ------------------------------------------------------------------- 60 $ depmod -a 68 For more information, please contact linux-wimax@intel.com. 71 -------------------------- [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/ |
| D | uniphier-efuse.txt | 3 This UniPhier eFuse must be under soc-glue. 6 - compatible: should be "socionext,uniphier-efuse" 7 - reg: should contain the register location and length 15 soc-glue@5f900000 { 16 compatible = "socionext,uniphier-ld20-soc-glue-debug", 17 "simple-mfd"; 18 #address-cells = <1>; 19 #size-cells = <1>; 23 compatible = "socionext,uniphier-efuse"; 28 compatible = "socionext,uniphier-efuse"; [all …]
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| /kernel/linux/linux-5.10/drivers/usb/dwc3/ |
| D | dwc3-st.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms 5 * This is a small driver for the dwc3 to provide the glue logic 14 * Inspired by dwc3-omap.c and dwc3-exynos.c. 31 #include <linux/usb/of.h> 36 /* glue registers */ 78 * struct st_dwc3 - dwc3-st driver private structure 80 * @glue_base: ioaddr for the glue registers 82 * @syscfg_reg_off: usb syscfg control offset 120 err = regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); in st_dwc3_drd_init() [all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 5 depends on (USB || USB_GADGET) && HAS_DMA 10 USB controller based on the DesignWare USB3 IP Core. 26 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET) 27 default USB_DWC3_HOST if (USB && !USB_GADGET) 28 default USB_DWC3_GADGET if (!USB && USB_GADGET) 32 depends on USB=y || USB=USB_DWC3 46 depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3)) 54 comment "Platform Glue Driver Support" 77 tristate "PCIe-based Platforms" [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/media/drivers/ |
| D | pvrusb2.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 ---------- 11 This driver is intended for the "Hauppauge WinTV PVR USB 2.0", which 12 is a USB 2.0 hosted TV Tuner. This driver is a work in progress. 13 Its history started with the reverse-engineering effort by Björn 29 1. Low level wire-protocol implementation with the device. 38 tear-down, arbitration, and interaction with high level 42 5. High level interfaces which glue the driver to various published 61 -------- 70 -------------------------------------- [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | uniphier-reset.txt | 1 UniPhier glue reset controller 4 Peripheral core reset in glue layer 5 ----------------------------------- 7 Some peripheral core reset belongs to its own glue layer. Before using 12 - compatible: Should be 13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3 14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3 15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3 17 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3 [all …]
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| /kernel/linux/linux-5.10/drivers/usb/gadget/udc/bdc/ |
| D | bdc_pci.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * bdc_pci.c - BRCM BDC USB3.0 device controller PCI interface file. 9 * Based on drivers under drivers/usb/ 45 struct bdc_pci *glue; in bdc_pci_probe() local 46 int ret = -ENOMEM; in bdc_pci_probe() 48 glue = devm_kzalloc(&pci->dev, sizeof(*glue), GFP_KERNEL); in bdc_pci_probe() 49 if (!glue) in bdc_pci_probe() 50 return -ENOMEM; in bdc_pci_probe() 52 glue->dev = &pci->dev; in bdc_pci_probe() 55 dev_err(&pci->dev, "failed to enable pci device\n"); in bdc_pci_probe() [all …]
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