• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /**
2  * Copyright (c) 2021-2022 Huawei Device Co., Ltd.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 /*
17 Register file implementation.
18 Reserve registers.
19 */
20 
21 #include "registers_description.h"
22 #include "target/amd64/target.h"
23 #include "regfile.h"
24 
25 namespace panda::compiler::amd64 {
Amd64RegisterDescription(ArenaAllocator * allocator)26 Amd64RegisterDescription::Amd64RegisterDescription(ArenaAllocator *allocator)
27     : RegistersDescription(allocator, Arch::X86_64), used_regs_(allocator->Adapter())
28 {
29 }
30 
IsRegUsed(ArenaVector<Reg> vec_reg,Reg reg)31 bool Amd64RegisterDescription::IsRegUsed(ArenaVector<Reg> vec_reg, Reg reg)
32 {
33     auto equality = [reg](Reg in) { return (reg.GetId() == in.GetId()) && (reg.GetType() == in.GetType()); };
34     return (std::find_if(vec_reg.begin(), vec_reg.end(), equality) != vec_reg.end());
35 }
36 
GetCalleeSaved()37 ArenaVector<Reg> Amd64RegisterDescription::GetCalleeSaved()
38 {
39     ArenaVector<Reg> out(GetAllocator()->Adapter());
40     for (uint32_t i = 0; i < MAX_NUM_REGS; ++i) {
41         if (callee_saved_.Has(i)) {
42             out.emplace_back(Reg(i, INT64_TYPE));
43         }
44         if (callee_savedv_.Has(i)) {
45             out.emplace_back(Reg(i, FLOAT64_TYPE));
46         }
47     }
48     return out;
49 }
50 
SetCalleeSaved(const ArenaVector<Reg> & regs)51 void Amd64RegisterDescription::SetCalleeSaved(const ArenaVector<Reg> &regs)
52 {
53     callee_saved_ = RegList(GetCalleeRegsMask(Arch::X86_64, false).GetValue());
54     callee_savedv_ = RegList(GetCalleeRegsMask(Arch::X86_64, true).GetValue());  // empty
55 
56     for (uint32_t i = 0; i < MAX_NUM_REGS; ++i) {
57         bool scalar_used = IsRegUsed(regs, Reg(i, INT64_TYPE));
58         if (scalar_used) {
59             callee_saved_.Add(i);
60         } else {
61             callee_saved_.Remove(i);
62         }
63         bool vector_used = IsRegUsed(regs, Reg(i, FLOAT64_TYPE));
64         if (vector_used) {
65             callee_savedv_.Add(i);
66         } else {
67             callee_savedv_.Remove(i);
68         }
69     }
70     // Remove return-value from callee
71     callee_saved_.Remove(ConvertRegNumber(asmjit::x86::rax.id()));
72 }
73 
SetUsedRegs(const ArenaVector<Reg> & regs)74 void Amd64RegisterDescription::SetUsedRegs(const ArenaVector<Reg> &regs)
75 {
76     used_regs_ = regs;
77 
78     // Update current lists - to do not use old data
79     callee_saved_ = RegList(GetCalleeRegsMask(Arch::X86_64, false).GetValue());
80     caller_saved_ = RegList(GetCallerRegsMask(Arch::X86_64, false).GetValue());
81 
82     callee_savedv_ = RegList(GetCalleeRegsMask(Arch::X86_64, true).GetValue());  // empty
83     caller_savedv_ = RegList(GetCallerRegsMask(Arch::X86_64, true).GetValue());
84 
85     for (uint32_t i = 0; i < MAX_NUM_REGS; ++i) {
86         // IsRegUsed use used_regs_ variable
87         bool scalar_used = IsRegUsed(used_regs_, Reg(i, INT64_TYPE));
88         if (!scalar_used && callee_saved_.Has(i)) {
89             callee_saved_.Remove(i);
90         }
91         if (!scalar_used && caller_saved_.Has(i)) {
92             caller_saved_.Remove(i);
93         }
94 
95         bool vector_used = IsRegUsed(used_regs_, Reg(i, FLOAT64_TYPE));
96         if (!vector_used && callee_savedv_.Has(i)) {
97             callee_savedv_.Remove(i);
98         }
99         if (!vector_used && caller_savedv_.Has(i)) {
100             caller_savedv_.Remove(i);
101         }
102     }
103 }
104 
105 }  // namespace panda::compiler::amd64
106