Lines Matching refs:of
6 - reg: Physical base address of the IP registers and length of memory mapped region.
14 - reg: Physical base address of the IP registers and length of memory mapped region.
16 number of clocks may depend of the SoC type.
18 - clock-names: names of the clocks listed in clocks property in the same
22 This device must be the parent of all the sub-components and is responsible
23 of bind them.
26 - ranges: to allow probing of subdevices
29 must be a child of sti-display-subsystem
32 - reg: Physical base address of the IP registers and length of memory mapped region.
34 number of clocks may depend of the SoC type.
36 - clock-names: names of the clocks listed in clocks property in the same
40 - reset-names: names of the resets listed in resets property in the same
45 must be a child of sti-display-subsystem
48 - reg: Physical base address of the IP registers and length of memory mapped region.
49 - reg-names: names of the mapped memory regions listed in regs property in
53 - reset-names: names of the resets listed in resets property in the same
57 must be a child of sti-display-subsystem
60 - reg: Physical base address of the IP registers and length of memory mapped region.
61 - reg-names: names of the mapped memory regions listed in regs property in
64 - interrupt-names: names of the interrupts listed in interrupts property in
67 number of clocks may depend of the SoC type.
68 - clock-names: names of the clocks listed in clocks property in the same
70 - ddc: phandle of an I2C controller used for DDC EDID probing
74 must be a child of sti-display-subsystem
76 - reg: Physical base address of the IP registers and length of memory mapped region.
77 - reg-names: names of the mapped memory regions listed in regs property in
80 number of clocks may depend of the SoC type.
82 - clock-names: names of the clocks listed in clocks property in the same
87 must be a child of sti-display-subsystem
89 - reg: Physical base address of the IP registers and length of memory mapped region.
90 - reg-names: names of the mapped memory regions listed in regs property in
93 number of clocks may depend of the SoC type.
95 - clock-names: names of the clocks listed in clocks property in the same
98 - pinctrl-names: names of the pin control states to use
99 - sti,panel: phandle of the panel connected to the DVO output
102 must be a child of sti-display-subsystem
105 - reg: Physical base address of the IP registers and length of memory mapped region.
107 number of clocks may depend of the SoC type.
109 - clock-names: names of the clocks listed in clocks property in the same
113 - reset-names: names of the resets listed in resets property in the same