57 #define RD_BITS(i)	((i >> 12) & 15)	/* Rd			*/
73 /* Thumb-2 32 bit format per ARMv7 DDI0406A A6.3, either f800h,e800h,f800h */
183 #define TYPE_DONE	3
205 	"3:	mov	%0, #1\n"			\
208 	"	ex_entry	1b, 3b\n"		\
259 		"3:\n"						\
263 		"	b	3b\n"				\
291 	 ARM(	"3:	"ins"	%1, [%2], #1\n"	)		\
292 	 THUMB(	"3:	"ins"	%1, [%2]\n"	)		\
304 		"	ex_entry	3b, 6b\n"		\
334 	unsigned int rd = RD_BITS(instr);  in do_alignment_ldrhstrh()  local
349 		regs->uregs[rd] = val;  in do_alignment_ldrhstrh()
351 		put16_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrhstrh()
367 		regs->uregs[rd] = val;  in do_alignment_ldrhstrh()
370 		put16t_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrhstrh()
383 	unsigned int rd = RD_BITS(instr);  in do_alignment_ldrdstrd()  local
391 	} else if (((rd & 1) == 1) || (rd == 14))  in do_alignment_ldrdstrd()
395 		rd2 = rd + 1;  in do_alignment_ldrdstrd()
406 		regs->uregs[rd] = val;  in do_alignment_ldrdstrd()
410 		put32_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrdstrd()
426 		regs->uregs[rd] = val;  in do_alignment_ldrdstrd()
430 		put32t_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrdstrd()
445 	unsigned int rd = RD_BITS(instr);  in do_alignment_ldrstr()  local
455 		regs->uregs[rd] = val;  in do_alignment_ldrstr()
457 		put32_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrstr()
466 		regs->uregs[rd] = val;  in do_alignment_ldrstr()
469 		put32t_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrstr()
494 	unsigned int rd, rn, correction, nr_regs, regbits;  in do_alignment_ldmstm()  local
542 		for (regbits = REGMASK_BITS(instr), rd = 0; regbits;  in do_alignment_ldmstm()
543 		     regbits >>= 1, rd += 1)  in do_alignment_ldmstm()
548 					regs->uregs[rd] = val;  in do_alignment_ldmstm()
550 					put32t_unaligned_check(regs->uregs[rd], eaddr);  in do_alignment_ldmstm()
555 		for (regbits = REGMASK_BITS(instr), rd = 0; regbits;  in do_alignment_ldmstm()
556 		     regbits >>= 1, rd += 1)  in do_alignment_ldmstm()
561 					regs->uregs[rd] = val;  in do_alignment_ldmstm()
563 					put32_unaligned_check(regs->uregs[rd], eaddr);  in do_alignment_ldmstm()
613 			((tinstr & (7<<0)) << (12-0)) |		/* Rd */  in thumb2arm()
614 			((tinstr & (7<<3)) << (16-3)) |		/* Rn */  in thumb2arm()
621 			((tinstr & (7<<0)) << (12-0)) |		/* Rd */  in thumb2arm()
622 			((tinstr & (7<<3)) << (16-3)) |		/* Rn */  in thumb2arm()
624 			((tinstr & (3<<9)) >> (9-8));	 /* immed_5[4:3] */  in thumb2arm()
641 			    ((tinstr & (7<<0)) << (12-0)) |	/* Rd */  in thumb2arm()
642 			    ((tinstr & (7<<3)) << (16-3)) |	/* Rn */  in thumb2arm()
646 	/* 6.5.1 Format 3: */  in thumb2arm()
647 	case 0x4800 >> 11:				/* 7.1.28 LDR(3) */  in thumb2arm()
654 		    ((tinstr & (7<<8)) << (12-8)) |		/* Rd */  in thumb2arm()
658 	case 0x9000 >> 11:				/* 7.1.54 STR(3) */  in thumb2arm()
662 			((tinstr & (7<<8)) << (12-8)) |		/* Rd */  in thumb2arm()
679 		if ((tinstr & (3 << 9)) == 0x0400) {  in thumb2arm()
707  * 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt)
1027 	 * ARMv6K and ARMv7 use fault status 3 (0b00011) as Access Flag section  in alignment_init()
1034 		hook_fault_code(3, do_alignment, SIGBUS, BUS_ADRALN,  in alignment_init()