Lines Matching +full:emc +full:- +full:mode +full:- +full:reset

1 // SPDX-License-Identifier: GPL-2.0-or-later
5  *	m53xx.c -- platform support for ColdFire 53xx based boards
7  *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
37 DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);
58 DEFINE_CLK(0, "mcfusb-otg.0", 44, MCF_CLK);
59 DEFINE_CLK(0, "mcfusb-host.0", 45, MCF_CLK);
76 	&__clk_0_22,	/* imx1-i2c.0 */
97 	&__clk_0_44,	/* mcfusb-otg.0 */
98 	&__clk_0_45,	/* mcfusb-host.0 */
132 	&__clk_0_22,	/* imx1-i2c.0 */
142 	&__clk_0_44,	/* mcfusb-otg.0 */
143 	&__clk_0_45,	/* mcfusb-host.0 */
200 	/* Set multi-function pins to ethernet mode for fec0 */  in m53xx_fec_init()
220 		commandp[size-1] = 0;  in config_BSP()
235 	 * the BDM device.  This is good for EMC reasons. This option is not  in config_BSP()
393 		MCF_SDRAMC_SDCFG2_BRD2WT((int)((SDRAM_CASL + SDRAM_BL / 2 - 1.0) + 0.5)) |  in sdramc_init()
394 		MCF_SDRAMC_SDCFG2_BL(SDRAM_BL - 1),  in sdramc_init()
405 		MCF_SDRAMC_SDCR_RCNT((int)(((SDRAM_TREFI / (SYSTEM_PERIOD * 64)) - 1) + 0.5)) |  in sdramc_init()
411 	 * Write extended mode register  in sdramc_init()
419 	 * Write mode register and reset DLL  in sdramc_init()
438 	 * Write mode register and clear reset DLL  in sdramc_init()
503 	 * mode before reprogramming the PLL.  in clock_pll()
506 		/* Put SDRAM into self refresh mode */  in clock_pll()
512 	 * The device must be put into LIMP mode to reprogram the PLL.  in clock_pll()
515 	/* Enter LIMP mode */  in clock_pll()
524 	/* Exit LIMP mode */  in clock_pll()
531 		/* Exit self refresh mode */  in clock_pll()
535 	/* Errata - workaround for SDRAM opeartion after exiting LIMP mode */  in clock_pll()
571 	/* Exit LIMP mode */  in clock_exit_limp()
587 	/* Test to see if device is in LIMP mode */  in get_sys_clock()