66 MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
69 	BIOS = 0,
112 static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
127 static int iordy_mask = 0xFFFFFFFF;	/* Use iordy if available */
162 	struct legacy_probe *lp = &probe_list[0];  in legacy_probe_add()
166 	for (i = 0; i < NR_HOST; i++) {  in legacy_probe_add()
167 		if (lp->port == 0 && free == NULL)  in legacy_probe_add()
185 	return 0;  in legacy_probe_add()
213 	return 0;  in legacy_set_mode()
229  *	do this. The mode range can be set if it is not 0x1F by setting
266 		inb(0x1F5);  in pdc20230_set_piomode()
267 		outb(inb(0x1F2) | 0x80, 0x1F2);  in pdc20230_set_piomode()
268 		inb(0x1F2);  in pdc20230_set_piomode()
269 		inb(0x3F6);  in pdc20230_set_piomode()
270 		inb(0x3F6);  in pdc20230_set_piomode()
271 		inb(0x1F2);  in pdc20230_set_piomode()
272 		inb(0x1F2);  in pdc20230_set_piomode()
274 	while ((inb(0x1F2) & 0x80) && --tries);  in pdc20230_set_piomode()
278 	outb(inb(0x1F4) & 0x07, 0x1F4);  in pdc20230_set_piomode()
280 	rt = inb(0x1F3);  in pdc20230_set_piomode()
281 	rt &= 0x07 << (3 * adev->devno);  in pdc20230_set_piomode()
286 	outb(inb(0x1F2) | 0x01, 0x1F2);  in pdc20230_set_piomode()
288 	inb(0x1F5);  in pdc20230_set_piomode()
300 	if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)  in pdc_data_xfer_vlb()
318 			__le32 pad = 0;  in pdc_data_xfer_vlb()
360 	inb(0x3E6);  in ht6560a_set_piomode()
361 	inb(0x3E6);  in ht6560a_set_piomode()
362 	inb(0x3E6);  in ht6560a_set_piomode()
363 	inb(0x3E6);  in ht6560a_set_piomode()
392 	recover = clamp_val(t.recover, 2, 16) & 0x0F;  in ht6560b_set_piomode()
394 	inb(0x3E6);  in ht6560b_set_piomode()
395 	inb(0x3E6);  in ht6560b_set_piomode()
396 	inb(0x3E6);  in ht6560b_set_piomode()
397 	inb(0x3E6);  in ht6560b_set_piomode()
402 		u8 rconf = inb(0x3E6);  in ht6560b_set_piomode()
403 		if (rconf & 0x24) {  in ht6560b_set_piomode()
404 			rconf &= ~0x24;  in ht6560b_set_piomode()
405 			outb(rconf, 0x3E6);  in ht6560b_set_piomode()
434 	outb(reg, 0x22);  in opti_syscfg()
435 	r = inb(0x24);  in opti_syscfg()
462 	clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];  in opti82c611a_set_piomode()
481 	rc &= 0x7F;  in opti82c611a_set_piomode()
491 	rc &= 0xC0;  in opti82c611a_set_piomode()
493 	rc |= (setup << 4) | 0x04;  in opti82c611a_set_piomode()
501 	rc &= 0x73;  in opti82c611a_set_piomode()
502 	rc |= 0x84;  in opti82c611a_set_piomode()
506 	iowrite8(0x83,  ap->ioaddr.nsect_addr);  in opti82c611a_set_piomode()
533 	sysclk = (opti_syscfg(0xAC) & 0xC0) >> 6;	/* BIOS set */  in opti82c46x_set_piomode()
560 	rc &= 0x7F;  in opti82c46x_set_piomode()
570 	rc &= 0xC0;  in opti82c46x_set_piomode()
572 	rc |= (setup << 4) | 0x04;  in opti82c46x_set_piomode()
580 	rc &= 0x73;  in opti82c46x_set_piomode()
581 	rc |= 0x84;  in opti82c46x_set_piomode()
585 	iowrite8(0x83,  ap->ioaddr.nsect_addr);  in opti82c46x_set_piomode()
654 		recovery = 15 - clamp_val(t.recover, 0, 15);  in qdi65x0_set_piomode()
656 	timing = (recovery << 4) | active | 0x08;  in qdi65x0_set_piomode()
666 		outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3);  in qdi65x0_set_piomode()
701 	if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)  in vlb32_data_xfer()
709 			__le32 pad = 0;  in vlb32_data_xfer()
730 	return 0;  in qdi_port()
759 	outb(reg, port + 0x01);  in winbond_writecfg()
760 	outb(val, port + 0x02);  in winbond_writecfg()
770 	outb(reg, port + 0x01);  in winbond_readcfg()
771 	val = inb(port + 0x02);  in winbond_readcfg()
783 	int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);  in winbond_set_piomode()
785 	reg = winbond_readcfg(ld_winbond->timing, 0x81);  in winbond_set_piomode()
788 	if (reg & 0x40)		/* Fast VLB bus, assume 50MHz */  in winbond_set_piomode()
793 	active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;  in winbond_set_piomode()
794 	recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;  in winbond_set_piomode()
800 	reg = 0x35;  in winbond_set_piomode()
802 		reg |= 0x08;	/* FIFO off */  in winbond_set_piomode()
804 		reg |= 0x02;	/* IORDY off */  in winbond_set_piomode()
805 	reg |= (clamp_val(t.setup, 0, 3) << 6);  in winbond_set_piomode()
815 	return 0;  in winbond_port()
826 			ATA_FLAG_NO_IORDY,	0,			NULL },
828 			0,			0,			NULL },
833 			ATA_FLAG_NO_IORDY,	0,			NULL },
835 			ATA_FLAG_NO_IORDY,	0,			NULL },
837 			0,			0,			NULL },
839 			0,			0,			NULL },
844 			0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
846 			0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
848 			0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE,
864 	if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {  in probe_chip_type()
865 		u8 reg = winbond_readcfg(winbond, 0x81);  in probe_chip_type()
866 		reg |= 0x80;	/* jumpered mode off */  in probe_chip_type()
867 		winbond_writecfg(winbond, 0x81, reg);  in probe_chip_type()
868 		reg = winbond_readcfg(winbond, 0x83);  in probe_chip_type()
869 		reg |= 0xF0;	/* local control */  in probe_chip_type()
870 		winbond_writecfg(winbond, 0x83, reg);  in probe_chip_type()
871 		reg = winbond_readcfg(winbond, 0x85);  in probe_chip_type()
872 		reg |= 0xF0;	/* programmable timing */  in probe_chip_type()
873 		winbond_writecfg(winbond, 0x85, reg);  in probe_chip_type()
875 		reg = winbond_readcfg(winbond, 0x81);  in probe_chip_type()
880 	if (probe->port == 0x1F0) {  in probe_chip_type()
884 		outb(inb(0x1F2) | 0x80, 0x1F2);  in probe_chip_type()
885 		inb(0x1F5);  in probe_chip_type()
886 		inb(0x1F2);  in probe_chip_type()
887 		inb(0x3F6);  in probe_chip_type()
888 		inb(0x3F6);  in probe_chip_type()
889 		inb(0x1F2);  in probe_chip_type()
890 		inb(0x1F2);  in probe_chip_type()
892 		if ((inb(0x1F2) & 0x80) == 0) {  in probe_chip_type()
897 			inb(0x1F5);  in probe_chip_type()
901 			outb(0x55, 0x1F2);  in probe_chip_type()
902 			inb(0x1F2);  in probe_chip_type()
903 			inb(0x1F2);  in probe_chip_type()
904 			if (inb(0x1F2) == 0x00)  in probe_chip_type()
947 	u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;  in legacy_init_one()
952 	pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);  in legacy_init_one()
958 	    devm_request_region(&pdev->dev, io + 0x0206, 1,  in legacy_init_one()
964 	ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);  in legacy_init_one()
969 		if (controller->setup(pdev, probe, ld) < 0)  in legacy_init_one()
974 	ap = host->ports[0];  in legacy_init_one()
986 	ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);  in legacy_init_one()
988 	ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,  in legacy_init_one()
1002 			return 0;  in legacy_init_one()
1028 	if (p->vendor == 0x1078 && p->device == 0x0000) {  in legacy_check_special_cases()
1033 	if (p->vendor == 0x1078 && p->device == 0x0002) {  in legacy_check_special_cases()
1038 	if (p->vendor == 0x8086 && p->device == 0x1234) {  in legacy_check_special_cases()
1040 		pci_read_config_word(p, 0x6C, &r);  in legacy_check_special_cases()
1041 		if (r & 0x8000) {  in legacy_check_special_cases()
1043 			if (r & 0x4000)  in legacy_check_special_cases()
1060 	u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;  in probe_opti_vlb()
1066 		chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;  in probe_opti_vlb()
1067 	ctrl = opti_syscfg(0xAC);  in probe_opti_vlb()
1072 			legacy_probe_add(0x1F0, 14, OPTI46X, 0);  in probe_opti_vlb()
1073 			legacy_probe_add(0x170, 15, OPTI46X, 0);  in probe_opti_vlb()
1076 			legacy_probe_add(0x170, 15, OPTI46X, 0);  in probe_opti_vlb()
1078 			legacy_probe_add(0x1F0, 14, OPTI46X, 0);  in probe_opti_vlb()
1080 		legacy_probe_add(0x1F0, 14, OPTI46X, 0);  in probe_opti_vlb()
1085 	static const unsigned long ide_port[2] = { 0x170, 0x1F0 };  in qdi65_identify_port()
1087 	if ((r & 0xF0) == 0xC0) {  in qdi65_identify_port()
1092 		legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),  in qdi65_identify_port()
1095 	if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {  in qdi65_identify_port()
1104 			legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),  in qdi65_identify_port()
1107 			legacy_probe_add(0x1F0, 14, QDI6580DP, port);  in qdi65_identify_port()
1108 			/* port + 0x02, r & 0x04 */  in qdi65_identify_port()
1109 			legacy_probe_add(0x170, 15, QDI6580DP, port + 2);  in qdi65_identify_port()
1118 	static const unsigned long qd_port[2] = { 0x30, 0xB0 };  in probe_qdi_vlb()
1125 	for (i = 0; i < 2; i++) {  in probe_qdi_vlb()
1137 			outb(0x19, port);  in probe_qdi_vlb()
1146 			if (res == 0x19) {  in probe_qdi_vlb()
1174 	int ct = 0;  in legacy_init()
1175 	int primary = 0;  in legacy_init()
1176 	int secondary = 0;  in legacy_init()
1177 	int pci_present = 0;  in legacy_init()
1178 	struct legacy_probe *pl = &probe_list[0];  in legacy_init()
1179 	int slot = 0;  in legacy_init()
1188 		for (r = 0; r < 6; r++) {  in legacy_init()
1189 			if (pci_resource_start(p, r) == 0x1f0)  in legacy_init()
1191 			if (pci_resource_start(p, r) == 0x170)  in legacy_init()
1203 		winbond = 0x130;	/* Default port, alt is 1B0 */  in legacy_init()
1205 	if (primary == 0 || all)  in legacy_init()
1206 		legacy_probe_add(0x1F0, 14, UNKNOWN, 0);  in legacy_init()
1207 	if (secondary == 0 || all)  in legacy_init()
1208 		legacy_probe_add(0x170, 15, UNKNOWN, 0);  in legacy_init()
1212 		legacy_probe_add(0x1E8, 11, UNKNOWN, 0);  in legacy_init()
1213 		legacy_probe_add(0x168, 10, UNKNOWN, 0);  in legacy_init()
1214 		legacy_probe_add(0x1E0, 8, UNKNOWN, 0);  in legacy_init()
1215 		legacy_probe_add(0x160, 12, UNKNOWN, 0);  in legacy_init()
1223 	for (i = 0; i < NR_HOST; i++, pl++) {  in legacy_init()
1224 		if (pl->port == 0)  in legacy_init()
1229 		if (legacy_init_one(pl) == 0)  in legacy_init()
1232 	if (ct != 0)  in legacy_init()
1233 		return 0;  in legacy_init()
1241 	for (i = 0; i < nr_legacy_host; i++) {  in legacy_exit()
1255 module_param(probe_all, int, 0);
1256 module_param(autospeed, int, 0);
1257 module_param(ht6560a, int, 0);
1258 module_param(ht6560b, int, 0);
1259 module_param(opti82c611a, int, 0);
1260 module_param(opti82c46x, int, 0);
1261 module_param(qdi, int, 0);
1262 module_param(winbond, int, 0);
1263 module_param(pio_mask, int, 0);
1264 module_param(iordy_mask, int, 0);