Lines Matching defs:name
67 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ argument
70 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ argument
75 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ argument
78 #define imx_clk_pfd(name, parent_name, reg, idx) \ argument
81 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ argument
84 #define imx_clk_fixed(name, rate) \ argument
87 #define imx_clk_fixed_factor(name, parent, mult, div) \ argument
90 #define imx_clk_divider(name, parent, reg, shift, width) \ argument
93 #define imx_clk_divider2(name, parent, reg, shift, width) \ argument
96 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \ argument
99 #define imx_clk_gate(name, parent, reg, shift) \ argument
102 #define imx_clk_gate_dis(name, parent, reg, shift) \ argument
105 #define imx_clk_gate2(name, parent, reg, shift) \ argument
108 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \ argument
111 #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \ argument
114 #define imx_clk_gate3(name, parent, reg, shift) \ argument
117 #define imx_clk_gate4(name, parent, reg, shift) \ argument
120 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
123 #define imx_clk_pllv1(type, name, parent, base) \ argument
126 #define imx_clk_pllv2(name, parent, base) \ argument
129 #define imx_clk_frac_pll(name, parent_name, base) \ argument
132 #define imx_clk_sscg_pll(name, parent_names, num_parents, parent,\ argument
140 #define imx_clk_pll14xx(name, parent_name, base, pll_clk) \ argument
252 static inline struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name, in imx_clk_hw_pll14xx()
259 static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate) in imx_clk_hw_fixed()
264 static inline struct clk_hw *imx_clk_hw_mux_ldb(const char *name, void __iomem *reg, in imx_clk_hw_mux_ldb()
273 static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name, in imx_clk_hw_fixed_factor()
280 static inline struct clk_hw *imx_clk_hw_divider(const char *name, in imx_clk_hw_divider()
289 static inline struct clk_hw *imx_clk_hw_divider_flags(const char *name, in imx_clk_hw_divider_flags()
298 static inline struct clk_hw *imx_clk_hw_divider2(const char *name, const char *parent, in imx_clk_hw_divider2()
306 static inline struct clk *imx_clk_divider2_flags(const char *name, in imx_clk_divider2_flags()
315 static inline struct clk_hw *imx_clk_hw_gate_flags(const char *name, const char *parent, in imx_clk_hw_gate_flags()
322 static inline struct clk_hw *imx_clk_hw_gate(const char *name, const char *parent, in imx_clk_hw_gate()
329 static inline struct clk_hw *imx_dev_clk_hw_gate(struct device *dev, const char *name, in imx_dev_clk_hw_gate()
336 static inline struct clk_hw *imx_clk_hw_gate_dis(const char *name, const char *parent, in imx_clk_hw_gate_dis()
343 static inline struct clk_hw *imx_clk_hw_gate_dis_flags(const char *name, const char *parent, in imx_clk_hw_gate_dis_flags()
350 static inline struct clk_hw *imx_clk_hw_gate2(const char *name, const char *parent, in imx_clk_hw_gate2()
357 static inline struct clk_hw *imx_clk_hw_gate2_flags(const char *name, const char *parent, in imx_clk_hw_gate2_flags()
364 static inline struct clk_hw *imx_clk_hw_gate2_shared(const char *name, in imx_clk_hw_gate2_shared()
372 static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name, in imx_clk_hw_gate2_shared2()
382 const char *name, const char *parent, in imx_dev_clk_hw_gate_shared()
392 static inline struct clk *imx_clk_gate2_cgr(const char *name, in imx_clk_gate2_cgr()
399 static inline struct clk_hw *imx_clk_hw_gate3(const char *name, const char *parent, in imx_clk_hw_gate3()
407 static inline struct clk_hw *imx_clk_hw_gate3_flags(const char *name, in imx_clk_hw_gate3_flags()
416 #define imx_clk_gate3_flags(name, parent, reg, shift, flags) \ argument
419 static inline struct clk_hw *imx_clk_hw_gate4(const char *name, const char *parent, in imx_clk_hw_gate4()
427 static inline struct clk_hw *imx_clk_hw_gate4_flags(const char *name, in imx_clk_hw_gate4_flags()
436 #define imx_clk_gate4_flags(name, parent, reg, shift, flags) \ argument
439 static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg, in imx_clk_hw_mux()
449 const char *name, void __iomem *reg, u8 shift, in imx_dev_clk_hw_mux()
457 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, in imx_clk_mux2()
466 static inline struct clk_hw *imx_clk_hw_mux2(const char *name, void __iomem *reg, in imx_clk_hw_mux2()
477 static inline struct clk *imx_clk_mux_flags(const char *name, in imx_clk_mux_flags()
487 static inline struct clk_hw *imx_clk_hw_mux2_flags(const char *name, in imx_clk_hw_mux2_flags()
497 static inline struct clk *imx_clk_mux2_flags(const char *name, in imx_clk_mux2_flags()
507 static inline struct clk_hw *imx_clk_hw_mux_flags(const char *name, in imx_clk_hw_mux_flags()
520 const char *name, in imx_dev_clk_hw_mux_flags()
547 #define imx8m_clk_hw_composite_bus(name, parent_names, reg) \ argument
553 #define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg) \ argument
558 #define imx8m_clk_hw_composite_core(name, parent_names, reg) \ argument
564 #define imx8m_clk_composite_flags(name, parent_names, num_parents, reg, \ argument
569 #define __imx8m_clk_hw_composite(name, parent_names, reg, flags) \ argument
574 #define __imx8m_clk_hw_fw_managed_composite(name, parent_names, reg, flags) \ argument
579 #define imx8m_clk_hw_fw_managed_composite(name, parent_names, reg) \ argument
582 #define imx8m_clk_hw_fw_managed_composite_critical(name, parent_names, reg) \ argument
585 #define __imx8m_clk_composite(name, parent_names, reg, flags) \ argument
588 #define imx8m_clk_hw_composite(name, parent_names, reg) \ argument
591 #define imx8m_clk_composite(name, parent_names, reg) \ argument
594 #define imx8m_clk_hw_composite_critical(name, parent_names, reg) \ argument
597 #define imx8m_clk_composite_critical(name, parent_names, reg) \ argument