79 	char *result = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);  in padlock_sha1_finup()
113 	asm volatile (".byte 0xf3,0x0f,0xa6,0xc8" /* rep xsha1 */  in padlock_sha1_finup()
129 	return padlock_sha1_finup(desc, buf, 0, out);  in padlock_sha1_final()
140 	char *result = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);  in padlock_sha256_finup()
174 	asm volatile (".byte 0xf3,0x0f,0xa6,0xd0" /* rep xsha256 */  in padlock_sha256_finup()
190 	return padlock_sha256_finup(desc, buf, 0, out);  in padlock_sha256_final()
200 	fallback_tfm = crypto_alloc_shash(fallback_driver_name, 0,  in padlock_init_tfm()
210 	return 0;  in padlock_init_tfm()
276 	return 0;  in padlock_sha1_init_nano()
288 	u8 *dst = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);  in padlock_sha1_update_nano()
290 	partial = sctx->count & 0x3f;  in padlock_sha1_update_nano()
292 	done = 0;  in padlock_sha1_update_nano()
304 			asm volatile (".byte 0xf3,0x0f,0xa6,0xc8"  in padlock_sha1_update_nano()
313 			asm volatile (".byte 0xf3,0x0f,0xa6,0xc8"  in padlock_sha1_update_nano()
320 		partial = 0;  in padlock_sha1_update_nano()
325 	return 0;  in padlock_sha1_update_nano()
333 	static const u8 padding[64] = { 0x80, };  in padlock_sha1_final_nano()
338 	partial = state->count & 0x3f;  in padlock_sha1_final_nano()
348 	return 0;  in padlock_sha1_final_nano()
360 	return 0;  in padlock_sha256_init_nano()
372 	u8 *dst = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);  in padlock_sha256_update_nano()
374 	partial = sctx->count & 0x3f;  in padlock_sha256_update_nano()
376 	done = 0;  in padlock_sha256_update_nano()
388 			asm volatile (".byte 0xf3,0x0f,0xa6,0xd0"  in padlock_sha256_update_nano()
397 			asm volatile (".byte 0xf3,0x0f,0xa6,0xd0"  in padlock_sha256_update_nano()
404 		partial = 0;  in padlock_sha256_update_nano()
409 	return 0;  in padlock_sha256_update_nano()
418 	static const u8 padding[64] = { 0x80, };  in padlock_sha256_final_nano()
423 	partial = state->count & 0x3f;  in padlock_sha256_final_nano()
433 	return 0;  in padlock_sha256_final_nano()
443 	return 0;  in padlock_sha_export_nano()
453 	return 0;  in padlock_sha_import_nano()
501 	struct cpuinfo_x86 *c = &cpu_data(0);  in padlock_init()
510 	if (c->x86_model < 0x0f) {  in padlock_init()
528 	return 0;  in padlock_init()
540 	struct cpuinfo_x86 *c = &cpu_data(0);  in padlock_fini()
542 	if (c->x86_model >= 0x0f) {  in padlock_fini()