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Lines Matching full:edac

11 #include <linux/edac.h>
75 /*********************** EDAC Memory Controller Functions ****************/
77 /* The SDRAM controller uses the EDAC Memory Controller framework. */
224 { .compatible = "altr,sdram-edac", .data = &c5_data},
225 { .compatible = "altr,sdram-edac-a10", .data = &a10_data},
456 "EDAC Probe Failed; Error %d\n", res); in altr_sdram_probe()
473 * If you want to suspend, need to disable EDAC by removing it
479 pr_err("Suspend not allowed when EDAC is enabled.\n"); in altr_sdram_prepare()
505 /************************* EDAC Parent Probe *************************/
531 /************************* EDAC Device Functions *************************/
534 * EDAC Device Functions (shared between various IPs).
535 * The discrete memories use the EDAC Device framework. The probe
537 * so they are shared. The memory allocation and freeing for EDAC
699 * This is a generic EDAC device driver that will support
743 "%s: Unable to allocate EDAC device\n", ecc_name); in altr_edac_device_probe()
759 /* Get driver specific data for this EDAC device */ in altr_edac_device_probe()
801 "%s:Error setting up EDAC device: %d\n", ecc_name, res); in altr_edac_device_probe()
1073 /*********************** SDRAM EDAC Device Functions *********************/
1091 /*********************** OCRAM EDAC Device Functions *********************/
1189 /********************* L2 Cache EDAC Device Functions ********************/
1249 regmap_write(dci->edac->ecc_mgr_map, in altr_edac_a10_l2_irq()
1256 regmap_write(dci->edac->ecc_mgr_map, in altr_edac_a10_l2_irq()
1476 /* Create the PortB EDAC device */ in altr_portb_setup()
1482 "%s: Unable to allocate PortB EDAC device\n", in altr_portb_setup()
1487 /* Initialize the PortB EDAC device structure from PortA structure */ in altr_portb_setup()
1558 list_add(&altdev->next, &altdev->edac->a10_ecc_devices); in altr_portb_setup()
1568 "%s:Error setting up EDAC device: %d\n", ecc_name, rc); in altr_portb_setup()
1652 /********************* Arria10 EDAC Device Functions *************************/
1681 { .compatible = "altr,sdram-edac-s10", .data = &s10_sdramecc_data },
1688 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1722 * The Stratix10 EDAC Error Injection Functions differ from Arria10
1787 struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc); in altr_edac_a10_irq_handler() local
1792 dberr = (irq == edac->db_irq) ? 1 : 0; in altr_edac_a10_irq_handler()
1798 regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status); in altr_edac_a10_irq_handler()
1802 irq = irq_linear_revmap(edac->domain, dberr * 32 + bit); in altr_edac_a10_irq_handler()
1816 if (of_device_is_compatible(np, "altr,sdram-edac-s10")) in validate_parent_available()
1844 static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, in altr_edac_a10_device_add() argument
1860 /* Get driver specific data for this EDAC device */ in altr_edac_a10_device_add()
1868 if (!devres_open_group(edac->dev, altr_edac_a10_device_add, GFP_KERNEL)) in altr_edac_a10_device_add()
1871 if (of_device_is_compatible(np, "altr,sdram-edac-s10")) in altr_edac_a10_device_add()
1889 "%s: Unable to allocate EDAC device\n", ecc_name); in altr_edac_a10_device_add()
1895 dci->dev = edac->dev; in altr_edac_a10_device_add()
1898 altdev->edac = edac; in altr_edac_a10_device_add()
1901 altdev->ddev = *edac->dev; in altr_edac_a10_device_add()
1907 altdev->base = devm_ioremap_resource(edac->dev, &res); in altr_edac_a10_device_add()
1926 rc = devm_request_irq(edac->dev, altdev->sb_irq, prv->ecc_irq_handler, in altr_edac_a10_device_add()
1949 rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler, in altr_edac_a10_device_add()
1960 dev_err(edac->dev, "edac_device_add_device failed\n"); in altr_edac_a10_device_add()
1967 list_add(&altdev->next, &edac->a10_ecc_devices); in altr_edac_a10_device_add()
1969 devres_remove_group(edac->dev, altr_edac_a10_device_add); in altr_edac_a10_device_add()
1976 devres_release_group(edac->dev, NULL); in altr_edac_a10_device_add()
1978 "%s:Error setting up EDAC device: %d\n", ecc_name, rc); in altr_edac_a10_device_add()
1985 struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d); in a10_eccmgr_irq_mask() local
1987 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST, in a10_eccmgr_irq_mask()
1993 struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d); in a10_eccmgr_irq_unmask() local
1995 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_CLR_OFST, in a10_eccmgr_irq_unmask()
2002 struct altr_arria10_edac *edac = d->host_data; in a10_eccmgr_irqdomain_map() local
2004 irq_set_chip_and_handler(irq, &edac->irq_chip, handle_simple_irq); in a10_eccmgr_irqdomain_map()
2005 irq_set_chip_data(irq, edac); in a10_eccmgr_irqdomain_map()
2016 /************** Stratix 10 EDAC Double Bit Error Handler ************/
2030 struct altr_arria10_edac *edac = to_a10edac(this, panic_notifier); in s10_edac_dberr_handler() local
2033 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_ECC_INTSTAT_DERR_OFST, in s10_edac_dberr_handler()
2035 regmap_write(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, dberror); in s10_edac_dberr_handler()
2042 list_for_each(position, &edac->a10_ecc_devices) { in s10_edac_dberr_handler()
2051 regmap_write(edac->ecc_mgr_map, in s10_edac_dberr_handler()
2054 "EDAC: [Fatal DBE on %s @ 0x%08X]\n", in s10_edac_dberr_handler()
2068 /****************** Arria 10 EDAC Probe Function *********************/
2071 struct altr_arria10_edac *edac; in altr_edac_a10_probe() local
2074 edac = devm_kzalloc(&pdev->dev, sizeof(*edac), GFP_KERNEL); in altr_edac_a10_probe()
2075 if (!edac) in altr_edac_a10_probe()
2078 edac->dev = &pdev->dev; in altr_edac_a10_probe()
2079 platform_set_drvdata(pdev, edac); in altr_edac_a10_probe()
2080 INIT_LIST_HEAD(&edac->a10_ecc_devices); in altr_edac_a10_probe()
2082 edac->ecc_mgr_map = in altr_edac_a10_probe()
2086 if (IS_ERR(edac->ecc_mgr_map)) { in altr_edac_a10_probe()
2089 return PTR_ERR(edac->ecc_mgr_map); in altr_edac_a10_probe()
2092 edac->irq_chip.name = pdev->dev.of_node->name; in altr_edac_a10_probe()
2093 edac->irq_chip.irq_mask = a10_eccmgr_irq_mask; in altr_edac_a10_probe()
2094 edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask; in altr_edac_a10_probe()
2095 edac->domain = irq_domain_add_linear(pdev->dev.of_node, 64, in altr_edac_a10_probe()
2096 &a10_eccmgr_ic_ops, edac); in altr_edac_a10_probe()
2097 if (!edac->domain) { in altr_edac_a10_probe()
2102 edac->sb_irq = platform_get_irq(pdev, 0); in altr_edac_a10_probe()
2103 if (edac->sb_irq < 0) { in altr_edac_a10_probe()
2105 return edac->sb_irq; in altr_edac_a10_probe()
2108 irq_set_chained_handler_and_data(edac->sb_irq, in altr_edac_a10_probe()
2110 edac); in altr_edac_a10_probe()
2116 edac->panic_notifier.notifier_call = s10_edac_dberr_handler; in altr_edac_a10_probe()
2118 &edac->panic_notifier); in altr_edac_a10_probe()
2121 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, in altr_edac_a10_probe()
2124 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, in altr_edac_a10_probe()
2130 regmap_write(edac->ecc_mgr_map, in altr_edac_a10_probe()
2132 regmap_write(edac->ecc_mgr_map, in altr_edac_a10_probe()
2137 edac->db_irq = platform_get_irq(pdev, 1); in altr_edac_a10_probe()
2138 if (edac->db_irq < 0) { in altr_edac_a10_probe()
2140 return edac->db_irq; in altr_edac_a10_probe()
2142 irq_set_chained_handler_and_data(edac->db_irq, in altr_edac_a10_probe()
2143 altr_edac_a10_irq_handler, edac); in altr_edac_a10_probe()
2151 altr_edac_a10_device_add(edac, child); in altr_edac_a10_probe()
2154 else if (of_device_is_compatible(child, "altr,sdram-edac-a10")) in altr_edac_a10_probe()
2182 MODULE_DESCRIPTION("EDAC Driver for Altera Memories");