Lines Matching +full:6 +full:d
117 #define CH_HASH_MASK_LSB 6
118 #define SLICE_HASH_MASK_LSB 6
204 pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name, in apl_rd_reg()
782 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
783 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
792 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
793 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
802 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
803 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
812 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
813 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
822 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
823 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
832 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
833 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
842 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
843 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
852 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
853 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
862 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
863 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
872 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
873 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
882 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
883 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
892 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
893 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
932 struct dimm_geometry *d = &dimms[g]; in apl_pmi2mem() local
944 type = d->bits[i + skiprs] & ~0xf; in apl_pmi2mem()
945 idx = d->bits[i + skiprs] & 0xf; in apl_pmi2mem()
953 type = d->bits[i + skiprs] & ~0xf; in apl_pmi2mem()
954 idx = d->bits[i + skiprs] & 0xf; in apl_pmi2mem()
964 bank ^= bank_hash(pmiaddr, idx, d->addrdec); in apl_pmi2mem()
1010 daddr->bank = dnv_get_bit(pmiaddr, dmap[pmiidx].ba0 + 6, 0); in dnv_pmi2mem()
1011 daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].ba1 + 6, 1); in dnv_pmi2mem()
1012 daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].bg0 + 6, 2); in dnv_pmi2mem()
1014 daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].bg1 + 6, 3); in dnv_pmi2mem()
1017 daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 0); in dnv_pmi2mem()
1018 daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row7 + 6, 1); in dnv_pmi2mem()
1021 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 2); in dnv_pmi2mem()
1024 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 2); in dnv_pmi2mem()
1025 daddr->bank ^= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 3); in dnv_pmi2mem()
1027 daddr->bank ^= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 0); in dnv_pmi2mem()
1028 daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 1); in dnv_pmi2mem()
1030 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 2); in dnv_pmi2mem()
1032 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 2); in dnv_pmi2mem()
1036 daddr->row = dnv_get_bit(pmiaddr, dmap2[pmiidx].row0 + 6, 0); in dnv_pmi2mem()
1037 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row1 + 6, 1); in dnv_pmi2mem()
1038 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 2); in dnv_pmi2mem()
1039 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row3 + 6, 3); in dnv_pmi2mem()
1040 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row4 + 6, 4); in dnv_pmi2mem()
1041 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row5 + 6, 5); in dnv_pmi2mem()
1042 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 6); in dnv_pmi2mem()
1043 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row7 + 6, 7); in dnv_pmi2mem()
1044 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row8 + 6, 8); in dnv_pmi2mem()
1045 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row9 + 6, 9); in dnv_pmi2mem()
1046 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row10 + 6, 10); in dnv_pmi2mem()
1047 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row11 + 6, 11); in dnv_pmi2mem()
1048 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row12 + 6, 12); in dnv_pmi2mem()
1049 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row13 + 6, 13); in dnv_pmi2mem()
1051 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row14 + 6, 14); in dnv_pmi2mem()
1053 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row15 + 6, 15); in dnv_pmi2mem()
1055 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row16 + 6, 16); in dnv_pmi2mem()
1057 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row17 + 6, 17); in dnv_pmi2mem()
1059 daddr->col = dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 3); in dnv_pmi2mem()
1060 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 4); in dnv_pmi2mem()
1061 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca5 + 6, 5); in dnv_pmi2mem()
1062 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca6 + 6, 6); in dnv_pmi2mem()
1063 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca7 + 6, 7); in dnv_pmi2mem()
1064 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca8 + 6, 8); in dnv_pmi2mem()
1065 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca9 + 6, 9); in dnv_pmi2mem()
1075 pnd2_printk(KERN_INFO, "Unsupported DIMM in channel %d\n", ch); in check_channel()
1078 pnd2_printk(KERN_INFO, "ECC disabled on channel %d\n", ch); in check_channel()
1095 #define DIMMS_PRESENT(d) ((d)->rken0 + (d)->rken1 + (d)->rken2 + (d)->rken3) argument
1099 struct d_cr_drp *d = &drp[ch]; in check_unit() local
1101 if (DIMMS_PRESENT(d) && !ecc_ctrl[ch].eccen) { in check_unit()
1102 pnd2_printk(KERN_INFO, "ECC disabled on channel %d\n", ch); in check_unit()
1137 edac_dbg(0, "SysAddr=%llx PmiAddr=%llx Channel=%d DIMM=%d Rank=%d Bank=%d Row=%d Column=%d\n", in get_memory_error_data()
1155 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in pnd2_mce_output_error()
1206 "%s%s err_code:%04x:%04x channel:%d DIMM:%d rank:%d row:%d bank:%d col:%d", in pnd2_mce_output_error()
1226 struct d_cr_drp0 *d; in apl_get_dimm_config() local
1236 edac_dbg(0, "No allocated DIMM for channel %d\n", i); in apl_get_dimm_config()
1240 d = &drp0[i]; in apl_get_dimm_config()
1242 if (dimms[g].addrdec == d->addrdec && in apl_get_dimm_config()
1243 dimms[g].dden == d->dden && in apl_get_dimm_config()
1244 dimms[g].dwid == d->dwid) in apl_get_dimm_config()
1248 edac_dbg(0, "Channel %d: unrecognized DIMM\n", i); in apl_get_dimm_config()
1253 capacity = (d->rken0 + d->rken1) * 8 * (1ul << dimms[g].rowbits) * in apl_get_dimm_config()
1255 edac_dbg(0, "Channel %d: %lld MByte DIMM\n", i, capacity >> (20 - 3)); in apl_get_dimm_config()
1258 dimm->dtype = (d->dwid == 0) ? DEV_X8 : DEV_X16; in apl_get_dimm_config()
1261 snprintf(dimm->label, sizeof(dimm->label), "Slice#%d_Chan#%d", i / 2, i % 2); in apl_get_dimm_config()
1273 struct d_cr_drp *d; in dnv_get_dimm_config() local
1304 d = &drp[i]; in dnv_get_dimm_config()
1306 ranks_of_dimm[0] = d->rken0 + d->rken1; in dnv_get_dimm_config()
1308 ranks_of_dimm[1] = d->rken2 + d->rken3; in dnv_get_dimm_config()
1316 edac_dbg(0, "No allocated DIMM for channel %d DIMM %d\n", i, j); in dnv_get_dimm_config()
1321 edac_dbg(0, "Channel %d DIMM %d: %lld MByte DIMM\n", i, j, capacity >> (20 - 3)); in dnv_get_dimm_config()
1324 dimm->dtype = dnv_dtypes[j ? d->dimmdwid0 : d->dimmdwid1]; in dnv_get_dimm_config()
1327 snprintf(dimm->label, sizeof(dimm->label), "Chan#%d_DIMM#%d", i, j); in dnv_get_dimm_config()
1464 "SysAddr=%llx Channel=%d DIMM=%d Rank=%d Bank=%d Row=%d Column=%d\n", in debugfs_u64_set()
1577 pnd2_printk(KERN_ERR, "Failed to register device with error %d.\n", rc); in pnd2_init()