25 #define NO_DEV_ID	0xffff
26 #define IT8613_ID	0x8613
27 #define IT8620_ID	0x8620
28 #define IT8628_ID	0x8628
29 #define IT8718_ID       0x8718
30 #define IT8728_ID	0x8728
31 #define IT8732_ID	0x8732
32 #define IT8761_ID	0x8761
33 #define IT8772_ID	0x8772
34 #define IT8786_ID	0x8786
37 #define REG		0x2e
38 #define VAL		0x2f
41 #define GPIO		0x07
44 #define LDNREG		0x07
45 #define CHIPID		0x20
46 #define CHIPREV		0x22
85 	outb(0x87, REG);  in superio_enter()
86 	outb(0x01, REG);  in superio_enter()
87 	outb(0x55, REG);  in superio_enter()
88 	outb(0x55, REG);  in superio_enter()
89 	return 0;  in superio_enter()
94 	outb(0x02, REG);  in superio_exit()
95 	outb(0x02, VAL);  in superio_exit()
157 	int rc = 0;  in it87_gpio_request()
202 	int rc = 0;  in it87_gpio_direction_in()
245 	int rc = 0;  in it87_gpio_direction_out()
282 	int rc = 0, i;  in it87_gpio_init()
294 	chip_rev  = superio_inb(CHIPREV) & 0x0f;  in it87_gpio_init()
301 		gpio_ba_reg = 0x62;  in it87_gpio_init()
303 		it87_gpio->output_base = 0xc8;  in it87_gpio_init()
304 		it87_gpio->simple_base = 0xc0;  in it87_gpio_init()
310 		gpio_ba_reg = 0x62;  in it87_gpio_init()
312 		it87_gpio->output_base = 0xc8;  in it87_gpio_init()
313 		it87_gpio->simple_size = 0;  in it87_gpio_init()
321 		gpio_ba_reg = 0x62;  in it87_gpio_init()
323 		it87_gpio->output_base = 0xc8;  in it87_gpio_init()
324 		it87_gpio->simple_base = 0xc0;  in it87_gpio_init()
329 		gpio_ba_reg = 0x60;  in it87_gpio_init()
331 		it87_gpio->output_base = 0xf0;  in it87_gpio_init()
332 		it87_gpio->simple_size = 0;  in it87_gpio_init()
383 	for (i = 0; i < it87_gpio->chip.ngpio; i++) {  in it87_gpio_init()
396 	return 0;  in it87_gpio_init()
411 	kfree(it87_gpio->chip.names[0]);  in it87_gpio_exit()