203 		struct ipu_di_signal_cfg *sig)  in ipu_di_sync_config_interlaced()  argument
205 	u32 h_total = sig->mode.hactive + sig->mode.hsync_len +  in ipu_di_sync_config_interlaced()
206 		sig->mode.hback_porch + sig->mode.hfront_porch;  in ipu_di_sync_config_interlaced()
207 	u32 v_total = sig->mode.vactive + sig->mode.vsync_len +  in ipu_di_sync_config_interlaced()
208 		sig->mode.vback_porch + sig->mode.vfront_porch;  in ipu_di_sync_config_interlaced()
220 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_interlaced()
227 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_interlaced()
240 			.offset_count = (sig->mode.vsync_len +  in ipu_di_sync_config_interlaced()
241 					 sig->mode.vback_porch) / 2,  in ipu_di_sync_config_interlaced()
243 			.repeat_count = sig->mode.vactive / 2,  in ipu_di_sync_config_interlaced()
248 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_interlaced()
249 					sig->mode.hback_porch,  in ipu_di_sync_config_interlaced()
251 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_interlaced()
266 		struct ipu_di_signal_cfg *sig, int div)  in ipu_di_sync_config_noninterlaced()  argument
268 	u32 h_total = sig->mode.hactive + sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
269 		sig->mode.hback_porch + sig->mode.hfront_porch;  in ipu_di_sync_config_noninterlaced()
270 	u32 v_total = sig->mode.vactive + sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
271 		sig->mode.vback_porch + sig->mode.vfront_porch;  in ipu_di_sync_config_noninterlaced()
281 			.offset_count = div * sig->v_to_h_sync,  in ipu_di_sync_config_noninterlaced()
285 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
292 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
296 			.offset_count = sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
297 					sig->mode.vback_porch,  in ipu_di_sync_config_noninterlaced()
299 			.repeat_count = sig->mode.vactive,  in ipu_di_sync_config_noninterlaced()
304 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
305 					sig->mode.hback_porch,  in ipu_di_sync_config_noninterlaced()
307 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_noninterlaced()
332 			.offset_count = sig->mode.vsync_len +  in ipu_di_sync_config_noninterlaced()
333 					sig->mode.vback_porch,  in ipu_di_sync_config_noninterlaced()
335 			.repeat_count = sig->mode.vactive,  in ipu_di_sync_config_noninterlaced()
341 			.offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */  in ipu_di_sync_config_noninterlaced()
345 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
349 			.offset_count = sig->mode.hsync_len +  in ipu_di_sync_config_noninterlaced()
350 					sig->mode.hback_porch,  in ipu_di_sync_config_noninterlaced()
352 			.repeat_count = sig->mode.hactive,  in ipu_di_sync_config_noninterlaced()
362 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
367 			.offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */  in ipu_di_sync_config_noninterlaced()
371 			.cnt_down = sig->mode.hsync_len * 2,  in ipu_di_sync_config_noninterlaced()
380 			.cnt_down = sig->mode.vsync_len * 2,  in ipu_di_sync_config_noninterlaced()
387 	if (sig->hsync_pin == 2 && sig->vsync_pin == 3)  in ipu_di_sync_config_noninterlaced()
394 	const struct ipu_di_signal_cfg *sig)  in ipu_di_config_clock()  argument
400 	if (sig->clkflags & IPU_DI_CLKMODE_EXT) {  in ipu_di_config_clock()
408 		if (sig->clkflags & IPU_DI_CLKMODE_SYNC) {  in ipu_di_config_clock()
428 			clk_set_rate(clk, sig->mode.pixelclock);  in ipu_di_config_clock()
431 			div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock);  in ipu_di_config_clock()
448 		div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock);  in ipu_di_config_clock()
452 		error = rate / (sig->mode.pixelclock / 1000);  in ipu_di_config_clock()
468 			clk_set_rate(clk, sig->mode.pixelclock);  in ipu_di_config_clock()
471 			div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock);  in ipu_di_config_clock()
498 		sig->mode.pixelclock,  in ipu_di_config_clock()
557 int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)  in ipu_di_init_sync_panel()  argument
564 		di->id, sig->mode.hactive, sig->mode.vactive);  in ipu_di_init_sync_panel()
569 		sig->mode.pixelclock);  in ipu_di_init_sync_panel()
573 	ipu_di_config_clock(di, sig);  in ipu_di_init_sync_panel()
588 	if (sig->mode.flags & DISPLAY_FLAGS_INTERLACED) {  in ipu_di_init_sync_panel()
589 		ipu_di_sync_config_interlaced(di, sig);  in ipu_di_init_sync_panel()
596 		ipu_di_sync_config_noninterlaced(di, sig, div);  in ipu_di_init_sync_panel()
604 			if (!(sig->hsync_pin == 2 && sig->vsync_pin == 3))  in ipu_di_init_sync_panel()
608 	if (sig->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH)  in ipu_di_init_sync_panel()
609 		di_gen |= ipu_di_gen_polarity(sig->hsync_pin);  in ipu_di_init_sync_panel()
610 	if (sig->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH)  in ipu_di_init_sync_panel()
611 		di_gen |= ipu_di_gen_polarity(sig->vsync_pin);  in ipu_di_init_sync_panel()
613 	if (sig->clk_pol)  in ipu_di_init_sync_panel()
624 	if (sig->enable_pol)  in ipu_di_init_sync_panel()
626 	if (sig->data_pol)  in ipu_di_init_sync_panel()