Lines Matching refs:st
333 #define at91_adc_readl(st, reg) readl_relaxed(st->base + reg) argument
334 #define at91_adc_writel(st, reg, val) writel_relaxed(val, st->base + reg) argument
509 static void at91_adc_config_emr(struct at91_adc_state *st) in at91_adc_config_emr() argument
512 unsigned int emr = at91_adc_readl(st, AT91_SAMA5D2_EMR); in at91_adc_config_emr()
521 switch (st->oversampling_ratio) { in at91_adc_config_emr()
536 at91_adc_writel(st, AT91_SAMA5D2_EMR, emr); in at91_adc_config_emr()
539 static int at91_adc_adjust_val_osr(struct at91_adc_state *st, int *val) in at91_adc_adjust_val_osr() argument
541 if (st->oversampling_ratio == AT91_OSR_1SAMPLES) { in at91_adc_adjust_val_osr()
547 } else if (st->oversampling_ratio == AT91_OSR_4SAMPLES) { in at91_adc_adjust_val_osr()
558 static void at91_adc_adjust_val_osr_array(struct at91_adc_state *st, void *buf, in at91_adc_adjust_val_osr_array() argument
574 at91_adc_adjust_val_osr(st, &val); in at91_adc_adjust_val_osr_array()
580 static int at91_adc_configure_touch(struct at91_adc_state *st, bool state) in at91_adc_configure_touch() argument
582 u32 clk_khz = st->current_sample_rate / 1000; in at91_adc_configure_touch()
589 at91_adc_writel(st, AT91_SAMA5D2_IDR, in at91_adc_configure_touch()
591 at91_adc_writel(st, AT91_SAMA5D2_TSMR, 0); in at91_adc_configure_touch()
617 at91_adc_writel(st, AT91_SAMA5D2_TSMR, tsmr); in at91_adc_configure_touch()
619 acr = at91_adc_readl(st, AT91_SAMA5D2_ACR); in at91_adc_configure_touch()
622 at91_adc_writel(st, AT91_SAMA5D2_ACR, acr); in at91_adc_configure_touch()
625 st->touch_st.sample_period_val = in at91_adc_configure_touch()
629 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN); in at91_adc_configure_touch()
634 static u16 at91_adc_touch_pos(struct at91_adc_state *st, int reg) in at91_adc_touch_pos() argument
645 val = at91_adc_readl(st, reg); in at91_adc_touch_pos()
647 dev_dbg(&st->indio_dev->dev, "pos is 0\n"); in at91_adc_touch_pos()
653 dev_err(&st->indio_dev->dev, "scale is 0\n"); in at91_adc_touch_pos()
661 static u16 at91_adc_touch_x_pos(struct at91_adc_state *st) in at91_adc_touch_x_pos() argument
663 st->touch_st.x_pos = at91_adc_touch_pos(st, AT91_SAMA5D2_XPOSR); in at91_adc_touch_x_pos()
664 return st->touch_st.x_pos; in at91_adc_touch_x_pos()
667 static u16 at91_adc_touch_y_pos(struct at91_adc_state *st) in at91_adc_touch_y_pos() argument
669 return at91_adc_touch_pos(st, AT91_SAMA5D2_YPOSR); in at91_adc_touch_y_pos()
672 static u16 at91_adc_touch_pressure(struct at91_adc_state *st) in at91_adc_touch_pressure() argument
681 val = at91_adc_readl(st, AT91_SAMA5D2_PRESSR); in at91_adc_touch_pressure()
686 pres = rxp * (st->touch_st.x_pos * factor / 1024) * in at91_adc_touch_pressure()
700 static int at91_adc_read_position(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_position() argument
703 if (!st->touch_st.touching) in at91_adc_read_position()
706 *val = at91_adc_touch_x_pos(st); in at91_adc_read_position()
708 *val = at91_adc_touch_y_pos(st); in at91_adc_read_position()
715 static int at91_adc_read_pressure(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_pressure() argument
718 if (!st->touch_st.touching) in at91_adc_read_pressure()
721 *val = at91_adc_touch_pressure(st); in at91_adc_read_pressure()
731 struct at91_adc_state *st = iio_priv(indio); in at91_adc_configure_trigger() local
732 u32 status = at91_adc_readl(st, AT91_SAMA5D2_TRGR); in at91_adc_configure_trigger()
738 status |= st->selected_trig->trgmod_value; in at91_adc_configure_trigger()
741 at91_adc_writel(st, AT91_SAMA5D2_TRGR, status); in at91_adc_configure_trigger()
749 struct at91_adc_state *st = iio_priv(indio); in at91_adc_reenable_trigger() local
752 if (st->dma_st.dma_chan) in at91_adc_reenable_trigger()
755 enable_irq(st->irq); in at91_adc_reenable_trigger()
758 at91_adc_readl(st, AT91_SAMA5D2_LCDR); in at91_adc_reenable_trigger()
769 static int at91_adc_dma_size_done(struct at91_adc_state *st) in at91_adc_dma_size_done() argument
775 status = dmaengine_tx_status(st->dma_st.dma_chan, in at91_adc_dma_size_done()
776 st->dma_st.dma_chan->cookie, in at91_adc_dma_size_done()
782 i = st->dma_st.rx_buf_sz - state.residue; in at91_adc_dma_size_done()
785 if (i >= st->dma_st.buf_idx) in at91_adc_dma_size_done()
786 size = i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
788 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
801 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_start() local
807 if (!st->dma_st.dma_chan) in at91_adc_dma_start()
811 st->dma_st.buf_idx = 0; in at91_adc_dma_start()
817 st->dma_st.rx_buf_sz = 0; in at91_adc_dma_start()
827 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8; in at91_adc_dma_start()
829 st->dma_st.rx_buf_sz *= st->dma_st.watermark; in at91_adc_dma_start()
832 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan, in at91_adc_dma_start()
833 st->dma_st.rx_dma_buf, in at91_adc_dma_start()
834 st->dma_st.rx_buf_sz, in at91_adc_dma_start()
835 st->dma_st.rx_buf_sz / 2, in at91_adc_dma_start()
850 dmaengine_terminate_async(st->dma_st.dma_chan); in at91_adc_dma_start()
855 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_GOVRE); in at91_adc_dma_start()
857 dma_async_issue_pending(st->dma_st.dma_chan); in at91_adc_dma_start()
860 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_dma_start()
868 struct at91_adc_state *st) in at91_adc_buffer_check_use_irq() argument
871 if (st->dma_st.dma_chan) in at91_adc_buffer_check_use_irq()
881 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_current_chan_is_touch() local
884 &st->touch_st.channels_bitmask, in at91_adc_current_chan_is_touch()
892 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_prepare() local
896 return at91_adc_configure_touch(st, true); in at91_adc_buffer_prepare()
922 cor = at91_adc_readl(st, AT91_SAMA5D2_COR); in at91_adc_buffer_prepare()
931 at91_adc_writel(st, AT91_SAMA5D2_COR, cor); in at91_adc_buffer_prepare()
933 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); in at91_adc_buffer_prepare()
936 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_prepare()
937 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_prepare()
944 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_postdisable() local
949 return at91_adc_configure_touch(st, false); in at91_adc_buffer_postdisable()
973 at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); in at91_adc_buffer_postdisable()
975 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
976 at91_adc_readl(st, chan->address); in at91_adc_buffer_postdisable()
979 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_postdisable()
980 at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_postdisable()
983 at91_adc_readl(st, AT91_SAMA5D2_OVER); in at91_adc_buffer_postdisable()
986 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
987 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_buffer_postdisable()
1020 struct at91_adc_state *st = iio_priv(indio); in at91_adc_trigger_init() local
1022 st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name); in at91_adc_trigger_init()
1023 if (IS_ERR(st->trig)) { in at91_adc_trigger_init()
1026 return PTR_ERR(st->trig); in at91_adc_trigger_init()
1035 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_nodma() local
1046 while ((at91_adc_readl(st, AT91_SAMA5D2_ISR) & mask) != mask && in at91_adc_trigger_handler_nodma()
1074 val = at91_adc_readl(st, chan->address); in at91_adc_trigger_handler_nodma()
1075 at91_adc_adjust_val_osr(st, &val); in at91_adc_trigger_handler_nodma()
1076 st->buffer[i] = val; in at91_adc_trigger_handler_nodma()
1078 st->buffer[i] = 0; in at91_adc_trigger_handler_nodma()
1083 iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, in at91_adc_trigger_handler_nodma()
1089 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_dma() local
1090 int transferred_len = at91_adc_dma_size_done(st); in at91_adc_trigger_handler_dma()
1095 u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR); in at91_adc_trigger_handler_dma()
1101 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark); in at91_adc_trigger_handler_dma()
1109 interval = div_s64((ns - st->dma_st.dma_ts), sample_count); in at91_adc_trigger_handler_dma()
1116 at91_adc_adjust_val_osr_array(st, in at91_adc_trigger_handler_dma()
1117 &st->dma_st.rx_buf[st->dma_st.buf_idx], in at91_adc_trigger_handler_dma()
1121 (st->dma_st.rx_buf + st->dma_st.buf_idx), in at91_adc_trigger_handler_dma()
1122 (st->dma_st.dma_ts + interval * sample_index)); in at91_adc_trigger_handler_dma()
1126 st->dma_st.buf_idx += sample_size; in at91_adc_trigger_handler_dma()
1128 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz) in at91_adc_trigger_handler_dma()
1129 st->dma_st.buf_idx = 0; in at91_adc_trigger_handler_dma()
1133 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_trigger_handler_dma()
1140 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler() local
1147 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START); in at91_adc_trigger_handler()
1149 if (st->dma_st.dma_chan) in at91_adc_trigger_handler()
1192 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_setup_samp_freq() local
1195 f_per = clk_get_rate(st->per_clk); in at91_adc_setup_samp_freq()
1198 startup = at91_adc_startup_time(st->soc_info.startup_time, in at91_adc_setup_samp_freq()
1201 mr = at91_adc_readl(st, AT91_SAMA5D2_MR); in at91_adc_setup_samp_freq()
1205 at91_adc_writel(st, AT91_SAMA5D2_MR, mr); in at91_adc_setup_samp_freq()
1209 st->current_sample_rate = freq; in at91_adc_setup_samp_freq()
1212 static inline unsigned at91_adc_get_sample_freq(struct at91_adc_state *st) in at91_adc_get_sample_freq() argument
1214 return st->current_sample_rate; in at91_adc_get_sample_freq()
1219 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_touch_data_handler() local
1230 at91_adc_read_position(st, chan->channel, &val); in at91_adc_touch_data_handler()
1232 at91_adc_read_pressure(st, chan->channel, &val); in at91_adc_touch_data_handler()
1235 st->buffer[i] = val; in at91_adc_touch_data_handler()
1246 schedule_work(&st->touch_st.workq); in at91_adc_touch_data_handler()
1249 static void at91_adc_pen_detect_interrupt(struct at91_adc_state *st) in at91_adc_pen_detect_interrupt() argument
1251 at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_PEN); in at91_adc_pen_detect_interrupt()
1252 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_NOPEN | in at91_adc_pen_detect_interrupt()
1255 at91_adc_writel(st, AT91_SAMA5D2_TRGR, in at91_adc_pen_detect_interrupt()
1257 AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val)); in at91_adc_pen_detect_interrupt()
1258 st->touch_st.touching = true; in at91_adc_pen_detect_interrupt()
1263 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_no_pen_detect_interrupt() local
1265 at91_adc_writel(st, AT91_SAMA5D2_TRGR, in at91_adc_no_pen_detect_interrupt()
1267 at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_NOPEN | in at91_adc_no_pen_detect_interrupt()
1270 st->touch_st.touching = false; in at91_adc_no_pen_detect_interrupt()
1274 at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN); in at91_adc_no_pen_detect_interrupt()
1281 struct at91_adc_state *st = container_of(touch_st, in at91_adc_workq_handler() local
1283 struct iio_dev *indio_dev = st->indio_dev; in at91_adc_workq_handler()
1285 iio_push_to_buffers(indio_dev, st->buffer); in at91_adc_workq_handler()
1291 struct at91_adc_state *st = iio_priv(indio); in at91_adc_interrupt() local
1292 u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR); in at91_adc_interrupt()
1293 u32 imr = at91_adc_readl(st, AT91_SAMA5D2_IMR); in at91_adc_interrupt()
1301 at91_adc_pen_detect_interrupt(st); in at91_adc_interrupt()
1314 status = at91_adc_readl(st, AT91_SAMA5D2_XPOSR); in at91_adc_interrupt()
1315 status = at91_adc_readl(st, AT91_SAMA5D2_YPOSR); in at91_adc_interrupt()
1316 status = at91_adc_readl(st, AT91_SAMA5D2_PRESSR); in at91_adc_interrupt()
1322 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) { in at91_adc_interrupt()
1328 st->conversion_value = at91_adc_readl(st, st->chan->address); in at91_adc_interrupt()
1329 st->conversion_done = true; in at91_adc_interrupt()
1330 wake_up_interruptible(&st->wq_data_available); in at91_adc_interrupt()
1338 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_info_raw() local
1351 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1353 ret = at91_adc_read_position(st, chan->channel, in at91_adc_read_info_raw()
1356 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1359 return at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1365 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1367 ret = at91_adc_read_pressure(st, chan->channel, in at91_adc_read_info_raw()
1370 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1373 return at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1381 mutex_lock(&st->lock); in at91_adc_read_info_raw()
1383 st->chan = chan; in at91_adc_read_info_raw()
1389 at91_adc_writel(st, AT91_SAMA5D2_COR, cor); in at91_adc_read_info_raw()
1390 at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); in at91_adc_read_info_raw()
1391 at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel)); in at91_adc_read_info_raw()
1392 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START); in at91_adc_read_info_raw()
1394 ret = wait_event_interruptible_timeout(st->wq_data_available, in at91_adc_read_info_raw()
1395 st->conversion_done, in at91_adc_read_info_raw()
1401 *val = st->conversion_value; in at91_adc_read_info_raw()
1402 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1406 st->conversion_done = false; in at91_adc_read_info_raw()
1409 at91_adc_writel(st, AT91_SAMA5D2_IDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1410 at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1413 at91_adc_readl(st, AT91_SAMA5D2_LCDR); in at91_adc_read_info_raw()
1415 mutex_unlock(&st->lock); in at91_adc_read_info_raw()
1425 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_raw() local
1431 *val = st->vref_uv / 1000; in at91_adc_read_raw()
1438 *val = at91_adc_get_sample_freq(st); in at91_adc_read_raw()
1442 *val = st->oversampling_ratio; in at91_adc_read_raw()
1454 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_write_raw() local
1462 if (val == st->oversampling_ratio) in at91_adc_write_raw()
1464 st->oversampling_ratio = val; in at91_adc_write_raw()
1466 at91_adc_config_emr(st); in at91_adc_write_raw()
1469 if (val < st->soc_info.min_sample_rate || in at91_adc_write_raw()
1470 val > st->soc_info.max_sample_rate) in at91_adc_write_raw()
1483 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_init() local
1494 if (st->dma_st.dma_chan) in at91_adc_dma_init()
1497 st->dma_st.dma_chan = dma_request_chan(&pdev->dev, "rx"); in at91_adc_dma_init()
1498 if (IS_ERR(st->dma_st.dma_chan)) { in at91_adc_dma_init()
1500 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
1504 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev, in at91_adc_dma_init()
1506 &st->dma_st.rx_dma_buf, in at91_adc_dma_init()
1508 if (!st->dma_st.rx_buf) { in at91_adc_dma_init()
1515 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr in at91_adc_dma_init()
1521 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) { in at91_adc_dma_init()
1527 dma_chan_name(st->dma_st.dma_chan)); in at91_adc_dma_init()
1532 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_init()
1533 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_init()
1535 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_init()
1536 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
1544 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_disable() local
1550 if (!st->dma_st.dma_chan) in at91_adc_dma_disable()
1554 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_dma_disable()
1556 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_disable()
1557 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_disable()
1558 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_disable()
1559 st->dma_st.dma_chan = NULL; in at91_adc_dma_disable()
1566 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_set_watermark() local
1572 if (!st->selected_trig->hw_trig) { in at91_adc_set_watermark()
1578 st->dma_st.watermark = val; in at91_adc_set_watermark()
1605 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_update_scan_mode() local
1607 if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask, in at91_adc_update_scan_mode()
1614 if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask, in at91_adc_update_scan_mode()
1622 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_hw_init() local
1624 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_hw_init()
1625 at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff); in at91_adc_hw_init()
1630 at91_adc_writel(st, AT91_SAMA5D2_MR, in at91_adc_hw_init()
1633 at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate); in at91_adc_hw_init()
1636 at91_adc_config_emr(st); in at91_adc_hw_init()
1643 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_fifo_state() local
1645 return scnprintf(buf, PAGE_SIZE, "%d\n", !!st->dma_st.dma_chan); in at91_adc_get_fifo_state()
1652 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_watermark() local
1654 return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark); in at91_adc_get_watermark()
1699 struct at91_adc_state *st; in at91_adc_probe() local
1704 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); in at91_adc_probe()
1714 st = iio_priv(indio_dev); in at91_adc_probe()
1715 st->indio_dev = indio_dev; in at91_adc_probe()
1717 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1719 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1721 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
1724 st->oversampling_ratio = AT91_OSR_1SAMPLES; in at91_adc_probe()
1728 &st->soc_info.min_sample_rate); in at91_adc_probe()
1737 &st->soc_info.max_sample_rate); in at91_adc_probe()
1745 &st->soc_info.startup_time); in at91_adc_probe()
1759 st->selected_trig = NULL; in at91_adc_probe()
1764 st->selected_trig = &at91_adc_trigger_list[i]; in at91_adc_probe()
1768 if (!st->selected_trig) { in at91_adc_probe()
1773 init_waitqueue_head(&st->wq_data_available); in at91_adc_probe()
1774 mutex_init(&st->lock); in at91_adc_probe()
1775 INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler); in at91_adc_probe()
1777 st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in at91_adc_probe()
1778 if (IS_ERR(st->base)) in at91_adc_probe()
1779 return PTR_ERR(st->base); in at91_adc_probe()
1782 st->dma_st.phys_addr = res->start; in at91_adc_probe()
1784 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
1785 if (st->irq <= 0) { in at91_adc_probe()
1786 if (!st->irq) in at91_adc_probe()
1787 st->irq = -ENXIO; in at91_adc_probe()
1789 return st->irq; in at91_adc_probe()
1792 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
1793 if (IS_ERR(st->per_clk)) in at91_adc_probe()
1794 return PTR_ERR(st->per_clk); in at91_adc_probe()
1796 st->reg = devm_regulator_get(&pdev->dev, "vddana"); in at91_adc_probe()
1797 if (IS_ERR(st->reg)) in at91_adc_probe()
1798 return PTR_ERR(st->reg); in at91_adc_probe()
1800 st->vref = devm_regulator_get(&pdev->dev, "vref"); in at91_adc_probe()
1801 if (IS_ERR(st->vref)) in at91_adc_probe()
1802 return PTR_ERR(st->vref); in at91_adc_probe()
1804 ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0, in at91_adc_probe()
1809 ret = regulator_enable(st->reg); in at91_adc_probe()
1813 ret = regulator_enable(st->vref); in at91_adc_probe()
1817 st->vref_uv = regulator_get_voltage(st->vref); in at91_adc_probe()
1818 if (st->vref_uv <= 0) { in at91_adc_probe()
1825 ret = clk_prepare_enable(st->per_clk); in at91_adc_probe()
1837 if (st->selected_trig->hw_trig) { in at91_adc_probe()
1847 st->dma_st.watermark = 1; in at91_adc_probe()
1860 if (st->selected_trig->hw_trig) in at91_adc_probe()
1862 st->selected_trig->name); in at91_adc_probe()
1865 readl_relaxed(st->base + AT91_SAMA5D2_VERSION)); in at91_adc_probe()
1872 clk_disable_unprepare(st->per_clk); in at91_adc_probe()
1874 regulator_disable(st->vref); in at91_adc_probe()
1876 regulator_disable(st->reg); in at91_adc_probe()
1883 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_remove() local
1889 clk_disable_unprepare(st->per_clk); in at91_adc_remove()
1891 regulator_disable(st->vref); in at91_adc_remove()
1892 regulator_disable(st->reg); in at91_adc_remove()
1900 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_suspend() local
1908 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_suspend()
1910 clk_disable_unprepare(st->per_clk); in at91_adc_suspend()
1911 regulator_disable(st->vref); in at91_adc_suspend()
1912 regulator_disable(st->reg); in at91_adc_suspend()
1920 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_resume() local
1927 ret = regulator_enable(st->reg); in at91_adc_resume()
1931 ret = regulator_enable(st->vref); in at91_adc_resume()
1935 ret = clk_prepare_enable(st->per_clk); in at91_adc_resume()
1947 return at91_adc_configure_touch(st, true); in at91_adc_resume()
1949 return at91_adc_configure_trigger(st->trig, true); in at91_adc_resume()
1955 regulator_disable(st->vref); in at91_adc_resume()
1957 regulator_disable(st->reg); in at91_adc_resume()