Lines Matching full:nfc
205 static int anfc_wait_for_event(struct arasan_nfc *nfc, unsigned int event) in anfc_wait_for_event() argument
210 ret = readl_relaxed_poll_timeout(nfc->base + INTR_STS_REG, val, in anfc_wait_for_event()
214 dev_err(nfc->dev, "Timeout waiting for event 0x%x\n", event); in anfc_wait_for_event()
218 writel_relaxed(event, nfc->base + INTR_STS_REG); in anfc_wait_for_event()
223 static int anfc_wait_for_rb(struct arasan_nfc *nfc, struct nand_chip *chip, in anfc_wait_for_rb() argument
231 ret = readl_relaxed_poll_timeout(nfc->base + READY_STS_REG, val, in anfc_wait_for_rb()
235 dev_err(nfc->dev, "Timeout waiting for R/B 0x%x\n", in anfc_wait_for_rb()
236 readl_relaxed(nfc->base + READY_STS_REG)); in anfc_wait_for_rb()
243 static void anfc_trigger_op(struct arasan_nfc *nfc, struct anfc_op *nfc_op) in anfc_trigger_op() argument
245 writel_relaxed(nfc_op->pkt_reg, nfc->base + PKT_REG); in anfc_trigger_op()
246 writel_relaxed(nfc_op->addr1_reg, nfc->base + MEM_ADDR1_REG); in anfc_trigger_op()
247 writel_relaxed(nfc_op->addr2_reg, nfc->base + MEM_ADDR2_REG); in anfc_trigger_op()
248 writel_relaxed(nfc_op->cmd_reg, nfc->base + CMD_REG); in anfc_trigger_op()
249 writel_relaxed(nfc_op->prog_reg, nfc->base + PROG_REG); in anfc_trigger_op()
278 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_select_target() local
282 writel_relaxed(anand->timings, nfc->base + DATA_INTERFACE_REG); in anfc_select_target()
285 if (nfc->cur_clk != anand->clk) { in anfc_select_target()
286 clk_disable_unprepare(nfc->controller_clk); in anfc_select_target()
287 ret = clk_set_rate(nfc->controller_clk, anand->clk); in anfc_select_target()
289 dev_err(nfc->dev, "Failed to change clock rate\n"); in anfc_select_target()
293 ret = clk_prepare_enable(nfc->controller_clk); in anfc_select_target()
295 dev_err(nfc->dev, in anfc_select_target()
300 nfc->cur_clk = anand->clk; in anfc_select_target()
331 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_read_page_hw_ecc() local
359 dma_addr = dma_map_single(nfc->dev, (void *)buf, len, DMA_FROM_DEVICE); in anfc_read_page_hw_ecc()
360 if (dma_mapping_error(nfc->dev, dma_addr)) { in anfc_read_page_hw_ecc()
361 dev_err(nfc->dev, "Buffer mapping error"); in anfc_read_page_hw_ecc()
365 writel_relaxed(lower_32_bits(dma_addr), nfc->base + DMA_ADDR0_REG); in anfc_read_page_hw_ecc()
366 writel_relaxed(upper_32_bits(dma_addr), nfc->base + DMA_ADDR1_REG); in anfc_read_page_hw_ecc()
368 anfc_trigger_op(nfc, &nfc_op); in anfc_read_page_hw_ecc()
370 ret = anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_read_page_hw_ecc()
371 dma_unmap_single(nfc->dev, dma_addr, len, DMA_FROM_DEVICE); in anfc_read_page_hw_ecc()
373 dev_err(nfc->dev, "Error reading page %d\n", page); in anfc_read_page_hw_ecc()
450 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_write_page_hw_ecc() local
477 writel_relaxed(anand->ecc_conf, nfc->base + ECC_CONF_REG); in anfc_write_page_hw_ecc()
480 nfc->base + ECC_SP_REG); in anfc_write_page_hw_ecc()
482 dma_addr = dma_map_single(nfc->dev, (void *)buf, len, DMA_TO_DEVICE); in anfc_write_page_hw_ecc()
483 if (dma_mapping_error(nfc->dev, dma_addr)) { in anfc_write_page_hw_ecc()
484 dev_err(nfc->dev, "Buffer mapping error"); in anfc_write_page_hw_ecc()
488 writel_relaxed(lower_32_bits(dma_addr), nfc->base + DMA_ADDR0_REG); in anfc_write_page_hw_ecc()
489 writel_relaxed(upper_32_bits(dma_addr), nfc->base + DMA_ADDR1_REG); in anfc_write_page_hw_ecc()
491 anfc_trigger_op(nfc, &nfc_op); in anfc_write_page_hw_ecc()
492 ret = anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_write_page_hw_ecc()
493 dma_unmap_single(nfc->dev, dma_addr, len, DMA_TO_DEVICE); in anfc_write_page_hw_ecc()
495 dev_err(nfc->dev, "Error writing page %d\n", page); in anfc_write_page_hw_ecc()
603 static int anfc_rw_pio_op(struct arasan_nfc *nfc, struct anfc_op *nfc_op) in anfc_rw_pio_op() argument
613 ret = anfc_wait_for_event(nfc, dir); in anfc_rw_pio_op()
615 dev_err(nfc->dev, "PIO %s ready signal not received\n", in anfc_rw_pio_op()
622 ioread32_rep(nfc->base + DATA_PORT_REG, &buf[offset], in anfc_rw_pio_op()
625 iowrite32_rep(nfc->base + DATA_PORT_REG, &buf[offset], in anfc_rw_pio_op()
635 remainder = readl_relaxed(nfc->base + DATA_PORT_REG); in anfc_rw_pio_op()
639 writel_relaxed(remainder, nfc->base + DATA_PORT_REG); in anfc_rw_pio_op()
643 return anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_rw_pio_op()
650 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_misc_data_type_exec() local
659 anfc_trigger_op(nfc, &nfc_op); in anfc_misc_data_type_exec()
662 ret = anfc_wait_for_rb(nfc, chip, nfc_op.rdy_timeout_ms); in anfc_misc_data_type_exec()
667 return anfc_rw_pio_op(nfc, &nfc_op); in anfc_misc_data_type_exec()
698 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_misc_zerolen_type_exec() local
707 anfc_trigger_op(nfc, &nfc_op); in anfc_misc_zerolen_type_exec()
709 ret = anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_misc_zerolen_type_exec()
714 ret = anfc_wait_for_rb(nfc, chip, nfc_op.rdy_timeout_ms); in anfc_misc_zerolen_type_exec()
722 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_status_type_exec() local
734 tmp = readl_relaxed(nfc->base + FLASH_STS_REG); in anfc_status_type_exec()
755 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_wait_type_exec() local
763 return anfc_wait_for_rb(nfc, chip, nfc_op.rdy_timeout_ms); in anfc_wait_type_exec()
885 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_setup_interface() local
886 struct device_node *np = nfc->dev->of_node; in anfc_setup_interface()
950 static int anfc_init_hw_ecc_controller(struct arasan_nfc *nfc, in anfc_init_hw_ecc_controller() argument
967 dev_err(nfc->dev, "Unsupported page size %d\n", mtd->writesize); in anfc_init_hw_ecc_controller()
989 dev_err(nfc->dev, "Unsupported strength %d\n", ecc->strength); in anfc_init_hw_ecc_controller()
1003 dev_err(nfc->dev, "Unsupported step size %d\n", ecc->strength); in anfc_init_hw_ecc_controller()
1019 anand->errloc = devm_kmalloc_array(nfc->dev, ecc->strength, in anfc_init_hw_ecc_controller()
1024 anand->hw_ecc = devm_kmalloc(nfc->dev, ecc->bytes, GFP_KERNEL); in anfc_init_hw_ecc_controller()
1042 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_attach_chip() local
1089 ret = anfc_init_hw_ecc_controller(nfc, chip); in anfc_attach_chip()
1092 dev_err(nfc->dev, "Unsupported ECC mode: %d\n", in anfc_attach_chip()
1115 static int anfc_chip_init(struct arasan_nfc *nfc, struct device_node *np) in anfc_chip_init() argument
1122 anand = devm_kzalloc(nfc->dev, sizeof(*anand), GFP_KERNEL); in anfc_chip_init()
1128 dev_err(nfc->dev, "Invalid reg property\n"); in anfc_chip_init()
1141 dev_err(nfc->dev, "Wrong CS %d or RB %d\n", cs, rb); in anfc_chip_init()
1145 if (test_and_set_bit(cs, &nfc->assigned_cs)) { in anfc_chip_init()
1146 dev_err(nfc->dev, "Already assigned CS %d\n", cs); in anfc_chip_init()
1155 mtd->dev.parent = nfc->dev; in anfc_chip_init()
1156 chip->controller = &nfc->controller; in anfc_chip_init()
1162 dev_err(nfc->dev, "NAND label property is mandatory\n"); in anfc_chip_init()
1168 dev_err(nfc->dev, "Scan operation failed\n"); in anfc_chip_init()
1178 list_add_tail(&anand->node, &nfc->chips); in anfc_chip_init()
1183 static void anfc_chips_cleanup(struct arasan_nfc *nfc) in anfc_chips_cleanup() argument
1189 list_for_each_entry_safe(anand, tmp, &nfc->chips, node) { in anfc_chips_cleanup()
1198 static int anfc_chips_init(struct arasan_nfc *nfc) in anfc_chips_init() argument
1200 struct device_node *np = nfc->dev->of_node, *nand_np; in anfc_chips_init()
1205 dev_err(nfc->dev, "Incorrect number of NAND chips (%d)\n", in anfc_chips_init()
1211 ret = anfc_chip_init(nfc, nand_np); in anfc_chips_init()
1214 anfc_chips_cleanup(nfc); in anfc_chips_init()
1222 static void anfc_reset(struct arasan_nfc *nfc) in anfc_reset() argument
1225 writel_relaxed(0, nfc->base + INTR_SIG_EN_REG); in anfc_reset()
1228 writel_relaxed(EVENT_MASK, nfc->base + INTR_STS_EN_REG); in anfc_reset()
1233 struct arasan_nfc *nfc; in anfc_probe() local
1236 nfc = devm_kzalloc(&pdev->dev, sizeof(*nfc), GFP_KERNEL); in anfc_probe()
1237 if (!nfc) in anfc_probe()
1240 nfc->dev = &pdev->dev; in anfc_probe()
1241 nand_controller_init(&nfc->controller); in anfc_probe()
1242 nfc->controller.ops = &anfc_ops; in anfc_probe()
1243 INIT_LIST_HEAD(&nfc->chips); in anfc_probe()
1245 nfc->base = devm_platform_ioremap_resource(pdev, 0); in anfc_probe()
1246 if (IS_ERR(nfc->base)) in anfc_probe()
1247 return PTR_ERR(nfc->base); in anfc_probe()
1249 anfc_reset(nfc); in anfc_probe()
1251 nfc->controller_clk = devm_clk_get(&pdev->dev, "controller"); in anfc_probe()
1252 if (IS_ERR(nfc->controller_clk)) in anfc_probe()
1253 return PTR_ERR(nfc->controller_clk); in anfc_probe()
1255 nfc->bus_clk = devm_clk_get(&pdev->dev, "bus"); in anfc_probe()
1256 if (IS_ERR(nfc->bus_clk)) in anfc_probe()
1257 return PTR_ERR(nfc->bus_clk); in anfc_probe()
1259 ret = clk_prepare_enable(nfc->controller_clk); in anfc_probe()
1263 ret = clk_prepare_enable(nfc->bus_clk); in anfc_probe()
1267 ret = anfc_chips_init(nfc); in anfc_probe()
1271 platform_set_drvdata(pdev, nfc); in anfc_probe()
1276 clk_disable_unprepare(nfc->bus_clk); in anfc_probe()
1279 clk_disable_unprepare(nfc->controller_clk); in anfc_probe()
1286 struct arasan_nfc *nfc = platform_get_drvdata(pdev); in anfc_remove() local
1288 anfc_chips_cleanup(nfc); in anfc_remove()
1290 clk_disable_unprepare(nfc->bus_clk); in anfc_remove()
1291 clk_disable_unprepare(nfc->controller_clk); in anfc_remove()
1301 .compatible = "arasan,nfc-v3p10",