Lines Matching +full:rk3066 +full:- +full:i2s
1 // SPDX-License-Identifier: GPL-2.0-only
4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
7 * Author: Jianqun <jay.xu@rock-chips.com>
24 #define DRV_NAME "rockchip-i2s"
45 * I2S controller hopes to start the tx and rx together,
56 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_suspend() local
58 regcache_cache_only(i2s->regmap, true); in i2s_runtime_suspend()
59 clk_disable_unprepare(i2s->mclk); in i2s_runtime_suspend()
66 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_resume() local
69 ret = clk_prepare_enable(i2s->mclk); in i2s_runtime_resume()
71 dev_err(i2s->dev, "clock enable failed %d\n", ret); in i2s_runtime_resume()
75 regcache_cache_only(i2s->regmap, false); in i2s_runtime_resume()
76 regcache_mark_dirty(i2s->regmap); in i2s_runtime_resume()
78 ret = regcache_sync(i2s->regmap); in i2s_runtime_resume()
80 clk_disable_unprepare(i2s->mclk); in i2s_runtime_resume()
90 static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) in rockchip_snd_txctrl() argument
96 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_txctrl()
99 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_txctrl()
103 i2s->tx_start = true; in rockchip_snd_txctrl()
105 i2s->tx_start = false; in rockchip_snd_txctrl()
107 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_txctrl()
110 if (!i2s->rx_start) { in rockchip_snd_txctrl()
111 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_txctrl()
118 regmap_update_bits(i2s->regmap, I2S_CLR, in rockchip_snd_txctrl()
122 regmap_read(i2s->regmap, I2S_CLR, &val); in rockchip_snd_txctrl()
126 regmap_read(i2s->regmap, I2S_CLR, &val); in rockchip_snd_txctrl()
127 retry--; in rockchip_snd_txctrl()
129 dev_warn(i2s->dev, "fail to clear\n"); in rockchip_snd_txctrl()
137 static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) in rockchip_snd_rxctrl() argument
143 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_rxctrl()
146 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_rxctrl()
150 i2s->rx_start = true; in rockchip_snd_rxctrl()
152 i2s->rx_start = false; in rockchip_snd_rxctrl()
154 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_rxctrl()
157 if (!i2s->tx_start) { in rockchip_snd_rxctrl()
158 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_rxctrl()
165 regmap_update_bits(i2s->regmap, I2S_CLR, in rockchip_snd_rxctrl()
169 regmap_read(i2s->regmap, I2S_CLR, &val); in rockchip_snd_rxctrl()
173 regmap_read(i2s->regmap, I2S_CLR, &val); in rockchip_snd_rxctrl()
174 retry--; in rockchip_snd_rxctrl()
176 dev_warn(i2s->dev, "fail to clear\n"); in rockchip_snd_rxctrl()
187 struct rk_i2s_dev *i2s = to_info(cpu_dai); in rockchip_i2s_set_fmt() local
191 pm_runtime_get_sync(cpu_dai->dev); in rockchip_i2s_set_fmt()
197 i2s->is_master_mode = true; in rockchip_i2s_set_fmt()
201 i2s->is_master_mode = false; in rockchip_i2s_set_fmt()
204 ret = -EINVAL; in rockchip_i2s_set_fmt()
208 regmap_update_bits(i2s->regmap, I2S_CKR, mask, val); in rockchip_i2s_set_fmt()
219 ret = -EINVAL; in rockchip_i2s_set_fmt()
223 regmap_update_bits(i2s->regmap, I2S_CKR, mask, val); in rockchip_i2s_set_fmt()
243 ret = -EINVAL; in rockchip_i2s_set_fmt()
247 regmap_update_bits(i2s->regmap, I2S_TXCR, mask, val); in rockchip_i2s_set_fmt()
267 ret = -EINVAL; in rockchip_i2s_set_fmt()
271 regmap_update_bits(i2s->regmap, I2S_RXCR, mask, val); in rockchip_i2s_set_fmt()
274 pm_runtime_put(cpu_dai->dev); in rockchip_i2s_set_fmt()
283 struct rk_i2s_dev *i2s = to_info(dai); in rockchip_i2s_hw_params() local
288 if (i2s->is_master_mode) { in rockchip_i2s_hw_params()
289 mclk_rate = clk_get_rate(i2s->mclk); in rockchip_i2s_hw_params()
292 return -EINVAL; in rockchip_i2s_hw_params()
296 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_hw_params()
300 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_hw_params()
324 return -EINVAL; in rockchip_i2s_hw_params()
341 dev_err(i2s->dev, "invalid channel: %d\n", in rockchip_i2s_hw_params()
343 return -EINVAL; in rockchip_i2s_hw_params()
346 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in rockchip_i2s_hw_params()
347 regmap_update_bits(i2s->regmap, I2S_RXCR, in rockchip_i2s_hw_params()
351 regmap_update_bits(i2s->regmap, I2S_TXCR, in rockchip_i2s_hw_params()
355 if (!IS_ERR(i2s->grf) && i2s->pins) { in rockchip_i2s_hw_params()
356 regmap_read(i2s->regmap, I2S_TXCR, &val); in rockchip_i2s_hw_params()
374 val <<= i2s->pins->shift; in rockchip_i2s_hw_params()
375 val |= (I2S_IO_DIRECTION_MASK << i2s->pins->shift) << 16; in rockchip_i2s_hw_params()
376 regmap_write(i2s->grf, i2s->pins->reg_offset, val); in rockchip_i2s_hw_params()
379 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK, in rockchip_i2s_hw_params()
381 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK, in rockchip_i2s_hw_params()
385 if (dai->driver->symmetric_rates && rtd->dai_link->symmetric_rates) in rockchip_i2s_hw_params()
388 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_hw_params()
397 struct rk_i2s_dev *i2s = to_info(dai); in rockchip_i2s_trigger() local
404 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in rockchip_i2s_trigger()
405 rockchip_snd_rxctrl(i2s, 1); in rockchip_i2s_trigger()
407 rockchip_snd_txctrl(i2s, 1); in rockchip_i2s_trigger()
412 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in rockchip_i2s_trigger()
413 rockchip_snd_rxctrl(i2s, 0); in rockchip_i2s_trigger()
415 rockchip_snd_txctrl(i2s, 0); in rockchip_i2s_trigger()
418 ret = -EINVAL; in rockchip_i2s_trigger()
428 struct rk_i2s_dev *i2s = to_info(cpu_dai); in rockchip_i2s_set_sysclk() local
434 ret = clk_set_rate(i2s->mclk, freq); in rockchip_i2s_set_sysclk()
436 dev_err(i2s->dev, "Fail to set mclk %d\n", ret); in rockchip_i2s_set_sysclk()
443 struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai); in rockchip_i2s_dai_probe() local
445 dai->capture_dma_data = &i2s->capture_dma_data; in rockchip_i2s_dai_probe()
446 dai->playback_dma_data = &i2s->playback_dma_data; in rockchip_i2s_dai_probe()
579 { .compatible = "rockchip,rk3066-i2s", },
580 { .compatible = "rockchip,rk3188-i2s", },
581 { .compatible = "rockchip,rk3288-i2s", },
582 { .compatible = "rockchip,rk3399-i2s", .data = &rk3399_i2s_pins },
588 struct device_node *node = pdev->dev.of_node; in rockchip_i2s_probe()
590 struct rk_i2s_dev *i2s; in rockchip_i2s_probe() local
597 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); in rockchip_i2s_probe()
598 if (!i2s) in rockchip_i2s_probe()
599 return -ENOMEM; in rockchip_i2s_probe()
601 i2s->dev = &pdev->dev; in rockchip_i2s_probe()
603 i2s->grf = syscon_regmap_lookup_by_phandle(node, "rockchip,grf"); in rockchip_i2s_probe()
604 if (!IS_ERR(i2s->grf)) { in rockchip_i2s_probe()
605 of_id = of_match_device(rockchip_i2s_match, &pdev->dev); in rockchip_i2s_probe()
606 if (!of_id || !of_id->data) in rockchip_i2s_probe()
607 return -EINVAL; in rockchip_i2s_probe()
609 i2s->pins = of_id->data; in rockchip_i2s_probe()
613 i2s->hclk = devm_clk_get(&pdev->dev, "i2s_hclk"); in rockchip_i2s_probe()
614 if (IS_ERR(i2s->hclk)) { in rockchip_i2s_probe()
615 dev_err(&pdev->dev, "Can't retrieve i2s bus clock\n"); in rockchip_i2s_probe()
616 return PTR_ERR(i2s->hclk); in rockchip_i2s_probe()
618 ret = clk_prepare_enable(i2s->hclk); in rockchip_i2s_probe()
620 dev_err(i2s->dev, "hclock enable failed %d\n", ret); in rockchip_i2s_probe()
624 i2s->mclk = devm_clk_get(&pdev->dev, "i2s_clk"); in rockchip_i2s_probe()
625 if (IS_ERR(i2s->mclk)) { in rockchip_i2s_probe()
626 dev_err(&pdev->dev, "Can't retrieve i2s master clock\n"); in rockchip_i2s_probe()
627 return PTR_ERR(i2s->mclk); in rockchip_i2s_probe()
631 regs = devm_ioremap_resource(&pdev->dev, res); in rockchip_i2s_probe()
635 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs, in rockchip_i2s_probe()
637 if (IS_ERR(i2s->regmap)) { in rockchip_i2s_probe()
638 dev_err(&pdev->dev, in rockchip_i2s_probe()
640 return PTR_ERR(i2s->regmap); in rockchip_i2s_probe()
643 i2s->playback_dma_data.addr = res->start + I2S_TXDR; in rockchip_i2s_probe()
644 i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in rockchip_i2s_probe()
645 i2s->playback_dma_data.maxburst = 4; in rockchip_i2s_probe()
647 i2s->capture_dma_data.addr = res->start + I2S_RXDR; in rockchip_i2s_probe()
648 i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in rockchip_i2s_probe()
649 i2s->capture_dma_data.maxburst = 4; in rockchip_i2s_probe()
651 dev_set_drvdata(&pdev->dev, i2s); in rockchip_i2s_probe()
653 pm_runtime_enable(&pdev->dev); in rockchip_i2s_probe()
654 if (!pm_runtime_enabled(&pdev->dev)) { in rockchip_i2s_probe()
655 ret = i2s_runtime_resume(&pdev->dev); in rockchip_i2s_probe()
660 soc_dai = devm_kmemdup(&pdev->dev, &rockchip_i2s_dai, in rockchip_i2s_probe()
663 ret = -ENOMEM; in rockchip_i2s_probe()
667 if (!of_property_read_u32(node, "rockchip,playback-channels", &val)) { in rockchip_i2s_probe()
669 soc_dai->playback.channels_max = val; in rockchip_i2s_probe()
672 if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) { in rockchip_i2s_probe()
674 soc_dai->capture.channels_max = val; in rockchip_i2s_probe()
677 ret = devm_snd_soc_register_component(&pdev->dev, in rockchip_i2s_probe()
682 dev_err(&pdev->dev, "Could not register DAI\n"); in rockchip_i2s_probe()
686 ret = rockchip_pcm_platform_register(&pdev->dev); in rockchip_i2s_probe()
688 dev_err(&pdev->dev, "Could not register PCM\n"); in rockchip_i2s_probe()
695 if (!pm_runtime_status_suspended(&pdev->dev)) in rockchip_i2s_probe()
696 i2s_runtime_suspend(&pdev->dev); in rockchip_i2s_probe()
698 pm_runtime_disable(&pdev->dev); in rockchip_i2s_probe()
705 struct rk_i2s_dev *i2s = dev_get_drvdata(&pdev->dev); in rockchip_i2s_remove() local
707 pm_runtime_disable(&pdev->dev); in rockchip_i2s_remove()
708 if (!pm_runtime_status_suspended(&pdev->dev)) in rockchip_i2s_remove()
709 i2s_runtime_suspend(&pdev->dev); in rockchip_i2s_remove()
711 clk_disable_unprepare(i2s->hclk); in rockchip_i2s_remove()
733 MODULE_AUTHOR("jianqun <jay.xu@rock-chips.com>");