248 VOID HalIrqMask(UINT32 vector)  in HalIrqMask()  argument
251     const UINT32 mask = 1U << (vector % 32); /* 32: Interrupt bit width */  in HalIrqMask()
253     if ((vector > OS_USER_HWI_MAX) || (vector < OS_USER_HWI_MIN)) {  in HalIrqMask()
257     if (vector < 32) { /* 32: Interrupt bit width */  in HalIrqMask()
263         GIC_REG_32(GICD_ICENABLER(vector >> 5)) = mask;  in HalIrqMask()
268 VOID HalIrqUnmask(UINT32 vector)  in HalIrqUnmask()  argument
271     const UINT32 mask = 1U << (vector % 32); /* 32: Interrupt bit width */  in HalIrqUnmask()
273     if ((vector > OS_USER_HWI_MAX) || (vector < OS_USER_HWI_MIN)) {  in HalIrqUnmask()
277     if (vector < 32) { /* 32: Interrupt bit width */  in HalIrqUnmask()
283         GIC_REG_32(GICD_ISENABLER(vector >> 5)) = mask; /* 5: Register bit offset */  in HalIrqUnmask()
288 VOID HalIrqPending(UINT32 vector)  in HalIrqPending()  argument
290     if ((vector > OS_USER_HWI_MAX) || (vector < OS_USER_HWI_MIN)) {  in HalIrqPending()
294 …GIC_REG_32(GICD_ISPENDR(vector >> 5)) = 1U << (vector % 32); /* 5: Register bit offset, 32: Interr…  in HalIrqPending()
297 VOID HalIrqClear(UINT32 vector)  in HalIrqClear()  argument
299     GiccSetEoir(vector);  in HalIrqClear()
303 UINT32 HalIrqSetPrio(UINT32 vector, UINT8 priority)  in HalIrqSetPrio()  argument
307     if (vector > OS_HWI_MAX_NUM) {  in HalIrqSetPrio()
308         PRINT_ERR("Invalid irq value %u, max irq is %u\n", vector, OS_HWI_MAX_NUM);  in HalIrqSetPrio()
314     if (vector >= GIC_MIN_SPI_NUM) {  in HalIrqSetPrio()
315         GicdSetPmr(vector, prio);  in HalIrqSetPrio()
317         GicrSetPmr(vector, prio);  in HalIrqSetPrio()
416     UINT32 vector = iar & 0x3FFU;  in HalIrqHandler()  local
423     if (vector >= OS_HWI_MAX_NUM) {  in HalIrqHandler()
426     g_curIrqNum = vector;  in HalIrqHandler()
428     OsInterrupt(vector);  in HalIrqHandler()
429     GiccSetEoir(vector);  in HalIrqHandler()