Lines Matching refs:src10_l
1132 v16i8 src10_l, src32_l, src54_l, src76_l, src98_l; in hevc_vt_8t_12w_msa() local
1153 src10_l, src32_l, src54_l, src21_l); in hevc_vt_8t_12w_msa()
1155 ILVR_D3_SB(src21_l, src10_l, src43_l, src32_l, src65_l, src54_l, in hevc_vt_8t_12w_msa()
1225 v16i8 src10_l, src32_l, src54_l, src76_l, src98_l; in hevc_vt_8t_16multx4mult_msa() local
1249 src10_l, src32_l, src54_l, src21_l); in hevc_vt_8t_16multx4mult_msa()
1278 DPADD_SB4_SH(src10_l, src32_l, src54_l, src76_l, in hevc_vt_8t_16multx4mult_msa()
1304 src10_l = src54_l; in hevc_vt_8t_16multx4mult_msa()
2904 v16i8 src10_l, src32_l, src54_l, src21_l, src43_l, src65_l; in hevc_vt_4t_12w_msa() local
2922 ILVL_B2_SB(src1, src0, src2, src1, src10_l, src21_l); in hevc_vt_4t_12w_msa()
2923 src2110 = (v16i8) __msa_ilvr_d((v2i64) src21_l, (v2i64) src10_l); in hevc_vt_4t_12w_msa()
2974 v16i8 src10_l, src32_l, src21_l, src43_l; in hevc_vt_4t_16w_msa() local
2990 ILVL_B2_SB(src1, src0, src2, src1, src10_l, src21_l); in hevc_vt_4t_16w_msa()
3001 DPADD_SB2_SH(src10_l, src32_l, filt0, filt1, dst0_l, dst0_l); in hevc_vt_4t_16w_msa()
3015 ILVL_B2_SB(src5, src4, src2, src5, src10_l, src21_l); in hevc_vt_4t_16w_msa()
3019 DPADD_SB2_SH(src32_l, src10_l, filt0, filt1, dst0_l, dst0_l); in hevc_vt_4t_16w_msa()
3044 v16i8 src10_l, src32_l, src21_l, src43_l; in hevc_vt_4t_24w_msa() local
3059 ILVL_B2_SB(src1, src0, src2, src1, src10_l, src21_l); in hevc_vt_4t_24w_msa()
3080 DPADD_SB2_SH(src10_l, src32_l, filt0, filt1, dst0_l, dst0_l); in hevc_vt_4t_24w_msa()
3100 ILVL_B2_SB(src5, src4, src2, src5, src10_l, src21_l); in hevc_vt_4t_24w_msa()
3110 DPADD_SB2_SH(src32_l, src10_l, filt0, filt1, dst0_l, dst0_l); in hevc_vt_4t_24w_msa()
3142 v16i8 src10_l, src32_l, src76_l, src98_l; in hevc_vt_4t_32w_msa() local
3158 ILVL_B2_SB(src1, src0, src2, src1, src10_l, src21_l); in hevc_vt_4t_32w_msa()
3181 DPADD_SB2_SH(src10_l, src32_l, filt0, filt1, dst0_l, dst0_l); in hevc_vt_4t_32w_msa()
3203 ILVL_B2_SB(src5, src4, src2, src5, src10_l, src21_l); in hevc_vt_4t_32w_msa()
3214 DPADD_SB2_SH(src32_l, src10_l, filt0, filt1, dst0_l, dst0_l); in hevc_vt_4t_32w_msa()