34 			ctx->gpio->mode(ctx->ncs[n], LWSGGPIO_FL_WRITE);  in lws_bb_spi_init()
36 			ctx->gpio->mode(ctx->ncmd[n], LWSGGPIO_FL_WRITE);  in lws_bb_spi_init()
39 	ctx->gpio->mode(ctx->clk, LWSGGPIO_FL_WRITE |  in lws_bb_spi_init()
42 	ctx->gpio->mode(ctx->mosi, LWSGGPIO_FL_WRITE | LWSGGPIO_FL_START_LOW);  in lws_bb_spi_init()
43 	ctx->gpio->mode(ctx->miso, LWSGGPIO_FL_READ | LWSGGPIO_FL_PULLUP);  in lws_bb_spi_init()
61 			ctx->gpio->set(ctx->clk, inv);  in lws_bb_spi_write()
62 			ctx->gpio->set(ctx->mosi, !!(u & 0x80));  in lws_bb_spi_write()
63 			ctx->gpio->set(ctx->clk, !inv);  in lws_bb_spi_write()
64 			ctx->gpio->set(ctx->clk, inv);  in lws_bb_spi_write()
65 			ctx->gpio->set(ctx->mosi, !!(u & 0x40));  in lws_bb_spi_write()
66 			ctx->gpio->set(ctx->clk, !inv);  in lws_bb_spi_write()
71 	ctx->gpio->set(ctx->clk, 0 ^ inv);  in lws_bb_spi_write()
84 			ctx->gpio->set(ctx->clk, inv);  in lws_bb_spi_read()
85 			u = (u << 1) | !!ctx->gpio->read(ctx->miso);  in lws_bb_spi_read()
86 			ctx->gpio->set(ctx->mosi, !!(u & 0x80));  in lws_bb_spi_read()
87 			ctx->gpio->set(ctx->clk, !inv);  in lws_bb_spi_read()
92 	ctx->gpio->set(ctx->clk, 0 ^ inv);  in lws_bb_spi_read()
102 	ctx->gpio->set(ctx->clk, 0 ^ !!(octx->bus_mode & LWSSPIMODE_CPOL));  in lws_bb_spi_queue()
104 	ctx->gpio->set(ctx->ncs[desc->channel], 0);  in lws_bb_spi_queue()
107 		ctx->gpio->set(ctx->ncmd[desc->channel], 0);  in lws_bb_spi_queue()
109 		ctx->gpio->set(ctx->ncmd[desc->channel], 1);  in lws_bb_spi_queue()
121 	ctx->gpio->set(ctx->ncs[desc->channel], 1);  in lws_bb_spi_queue()
124 	ctx->gpio->set(ctx->clk, 0 ^ !!(octx->bus_mode & LWSSPIMODE_CPOL));  in lws_bb_spi_queue()