1356                                            AddrSwizzleMode *swizzle_mode)  in gfx9_get_preferred_swizzle_mode()  argument
1429    *swizzle_mode = sout.swizzleMode;  in gfx9_get_preferred_swizzle_mode()
1672    surf->u.gfx9.swizzle_mode = in->swizzleMode;  in gfx9_compute_miptree()
1679       surf->u.gfx9.color.fmask_swizzle_mode = surf->u.gfx9.swizzle_mode & ~0x3;  in gfx9_compute_miptree()
1690        surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR) {  in gfx9_compute_miptree()
2199             AddrSurfInfoIn.swizzleMode = surf->u.gfx9.swizzle_mode;  in gfx9_compute_surface()
2264    surf->is_linear = surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR;  in gfx9_compute_surface()
2270       r = Addr2IsValidDisplaySwizzleMode(addrlib->handle, surf->u.gfx9.swizzle_mode,  in gfx9_compute_surface()
2293          assert(is_dcc_supported_by_CB(info, surf->u.gfx9.swizzle_mode));  in gfx9_compute_surface()
2325    switch (surf->u.gfx9.swizzle_mode) {  in gfx9_compute_surface()
2518       surf->u.gfx9.swizzle_mode = AMDGPU_TILING_GET(tiling_flags, SWIZZLE_MODE);  in ac_surface_set_bo_metadata()
2528          surf->u.gfx9.swizzle_mode > 0 ? RADEON_SURF_MODE_2D : RADEON_SURF_MODE_LINEAR_ALIGNED;  in ac_surface_set_bo_metadata()
2565       *tiling_flags |= AMDGPU_TILING_SET(SWIZZLE_MODE, surf->u.gfx9.swizzle_mode);  in ac_surface_get_bo_metadata()
2756    if (surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR)  in ac_surface_get_gfx9_pitch_align()
2763    switch(surf->u.gfx9.swizzle_mode & ~3) {  in ac_surface_get_gfx9_pitch_align()
2926               1 << surf->surf_alignment_log2, surf->u.gfx9.swizzle_mode,  in ac_surface_print_info()