Lines Matching refs:screen
86 struct etna_screen *screen = etna_screen(pscreen); in etna_screen_destroy() local
88 if (screen->perfmon) in etna_screen_destroy()
89 etna_perfmon_del(screen->perfmon); in etna_screen_destroy()
91 if (screen->compiler) in etna_screen_destroy()
92 etna_compiler_destroy(screen->compiler); in etna_screen_destroy()
94 if (screen->pipe) in etna_screen_destroy()
95 etna_pipe_del(screen->pipe); in etna_screen_destroy()
97 if (screen->gpu) in etna_screen_destroy()
98 etna_gpu_del(screen->gpu); in etna_screen_destroy()
100 if (screen->ro) in etna_screen_destroy()
101 screen->ro->destroy(screen->ro); in etna_screen_destroy()
103 if (screen->dev) in etna_screen_destroy()
104 etna_device_del(screen->dev); in etna_screen_destroy()
106 FREE(screen); in etna_screen_destroy()
136 struct etna_screen *screen = etna_screen(pscreen); in etna_screen_get_param() local
159 return screen->drm_version >= ETNA_DRM_VERSION_FENCE_FD; in etna_screen_get_param()
180 return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); in etna_screen_get_param()
184 return !VIV_FEATURE(screen, chipMinorFeatures7, PE_NO_ALPHA_TEST); in etna_screen_get_param()
207 return screen->specs.stream_count; in etna_screen_get_param()
209 return VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); in etna_screen_get_param()
214 return DBG_ENABLED(ETNA_DBG_NIR) && screen->specs.halti >= 2; in etna_screen_get_param()
217 return screen->specs.max_texture_size; in etna_screen_get_param()
221 int log2_max_tex_size = util_last_bit(screen->specs.max_texture_size); in etna_screen_get_param()
233 return screen->specs.seamless_cube_map; in etna_screen_get_param()
237 return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); in etna_screen_get_param()
260 return screen->specs.max_varyings; in etna_screen_get_param()
275 if (VIV_FEATURE(screen, chipMinorFeatures2, BUG_FIXES8)) in etna_screen_get_param()
278 if (VIV_FEATURE(screen, chipMinorFeatures2, LINE_LOOP)) in etna_screen_get_param()
303 struct etna_screen *screen = etna_screen(pscreen); in etna_screen_get_paramf() local
314 return util_last_bit(screen->specs.max_texture_size); in etna_screen_get_paramf()
330 struct etna_screen *screen = etna_screen(pscreen); in etna_screen_get_shader_param() local
331 bool ubo_enable = screen->specs.halti >= 2 && DBG_ENABLED(ETNA_DBG_NIR); in etna_screen_get_shader_param()
363 return shader == PIPE_SHADER_FRAGMENT ? screen->specs.max_varyings in etna_screen_get_shader_param()
364 : screen->specs.vertex_max_elements; in etna_screen_get_shader_param()
381 return VIV_FEATURE(screen, chipMinorFeatures0, HAS_SQRT_TRIG); in etna_screen_get_shader_param()
390 return DBG_ENABLED(ETNA_DBG_NIR) && screen->specs.halti >= 2; in etna_screen_get_shader_param()
394 ? screen->specs.fragment_sampler_count in etna_screen_get_shader_param()
395 : screen->specs.vertex_sampler_count; in etna_screen_get_shader_param()
402 ? screen->specs.max_ps_uniforms * sizeof(float[4]) in etna_screen_get_shader_param()
403 : screen->specs.max_vs_uniforms * sizeof(float[4]); in etna_screen_get_shader_param()
435 gpu_supports_texture_target(struct etna_screen *screen, in gpu_supports_texture_target() argument
442 if (screen->specs.halti < 0 && in gpu_supports_texture_target()
452 gpu_supports_texture_format(struct etna_screen *screen, uint32_t fmt, in gpu_supports_texture_format() argument
458 supported = VIV_FEATURE(screen, chipFeatures, ETC1_TEXTURE_COMPRESSION); in gpu_supports_texture_format()
461 supported = VIV_FEATURE(screen, chipFeatures, DXT_TEXTURE_COMPRESSION); in gpu_supports_texture_format()
464 supported = VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); in gpu_supports_texture_format()
467 supported = VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); in gpu_supports_texture_format()
470 supported = screen->specs.tex_astc; in gpu_supports_texture_format()
474 supported = VIV_FEATURE(screen, chipMinorFeatures2, HALTI1); in gpu_supports_texture_format()
478 supported = VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); in gpu_supports_texture_format()
485 return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); in gpu_supports_texture_format()
491 gpu_supports_render_format(struct etna_screen *screen, enum pipe_format format, in gpu_supports_render_format() argument
504 return VIV_FEATURE(screen, chipMinorFeatures5, HALTI5); in gpu_supports_render_format()
508 return VIV_FEATURE(screen, chipMinorFeatures5, HALTI5); in gpu_supports_render_format()
511 return VIV_FEATURE(screen, chipMinorFeatures5, HALTI3); in gpu_supports_render_format()
514 return VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); in gpu_supports_render_format()
517 return VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); in gpu_supports_render_format()
521 return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); in gpu_supports_render_format()
527 gpu_supports_vertex_format(struct etna_screen *screen, enum pipe_format format) in gpu_supports_vertex_format() argument
533 return VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); in gpu_supports_vertex_format()
546 struct etna_screen *screen = etna_screen(pscreen); in etna_screen_is_format_supported() local
549 if (!gpu_supports_texture_target(screen, target)) in etna_screen_is_format_supported()
556 if (gpu_supports_render_format(screen, format, sample_count)) in etna_screen_is_format_supported()
568 if (!gpu_supports_texture_format(screen, fmt, format)) in etna_screen_is_format_supported()
576 if (gpu_supports_vertex_format(screen, format)) in etna_screen_is_format_supported()
584 VIV_FEATURE(screen, chipFeatures, 32_BIT_INDICES))) { in etna_screen_is_format_supported()
612 struct etna_screen *screen = etna_screen(pscreen); in modifier_num_supported() local
615 if ((screen->specs.pixel_pipes == 1 || screen->specs.single_buffer) && in modifier_num_supported()
676 etna_determine_uniform_limits(struct etna_screen *screen) in etna_determine_uniform_limits() argument
682 if (screen->model == chipModel_GC2000 && in etna_determine_uniform_limits()
683 (screen->revision == 0x5118 || screen->revision == 0x5140)) { in etna_determine_uniform_limits()
684 screen->specs.max_vs_uniforms = 256; in etna_determine_uniform_limits()
685 screen->specs.max_ps_uniforms = 64; in etna_determine_uniform_limits()
686 } else if (screen->specs.num_constants == 320) { in etna_determine_uniform_limits()
687 screen->specs.max_vs_uniforms = 256; in etna_determine_uniform_limits()
688 screen->specs.max_ps_uniforms = 64; in etna_determine_uniform_limits()
689 } else if (screen->specs.num_constants > 256 && in etna_determine_uniform_limits()
690 screen->model == chipModel_GC1000) { in etna_determine_uniform_limits()
692 screen->specs.max_vs_uniforms = 256; in etna_determine_uniform_limits()
693 screen->specs.max_ps_uniforms = 64; in etna_determine_uniform_limits()
694 } else if (screen->specs.num_constants > 256) { in etna_determine_uniform_limits()
695 screen->specs.max_vs_uniforms = 256; in etna_determine_uniform_limits()
696 screen->specs.max_ps_uniforms = 256; in etna_determine_uniform_limits()
697 } else if (screen->specs.num_constants == 256) { in etna_determine_uniform_limits()
698 screen->specs.max_vs_uniforms = 256; in etna_determine_uniform_limits()
699 screen->specs.max_ps_uniforms = 256; in etna_determine_uniform_limits()
701 screen->specs.max_vs_uniforms = 168; in etna_determine_uniform_limits()
702 screen->specs.max_ps_uniforms = 64; in etna_determine_uniform_limits()
707 etna_determine_sampler_limits(struct etna_screen *screen) in etna_determine_sampler_limits() argument
710 if (screen->specs.halti >= 1) { in etna_determine_sampler_limits()
711 screen->specs.vertex_sampler_offset = 16; in etna_determine_sampler_limits()
712 screen->specs.fragment_sampler_count = 16; in etna_determine_sampler_limits()
713 screen->specs.vertex_sampler_count = 16; in etna_determine_sampler_limits()
715 screen->specs.vertex_sampler_offset = 8; in etna_determine_sampler_limits()
716 screen->specs.fragment_sampler_count = 8; in etna_determine_sampler_limits()
717 screen->specs.vertex_sampler_count = 4; in etna_determine_sampler_limits()
720 if (screen->model == 0x400) in etna_determine_sampler_limits()
721 screen->specs.vertex_sampler_count = 0; in etna_determine_sampler_limits()
725 etna_get_specs(struct etna_screen *screen) in etna_get_specs() argument
730 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_INSTRUCTION_COUNT, &val)) { in etna_get_specs()
736 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE, in etna_get_specs()
741 screen->specs.vertex_output_buffer_size = val; in etna_get_specs()
743 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_VERTEX_CACHE_SIZE, &val)) { in etna_get_specs()
747 screen->specs.vertex_cache_size = val; in etna_get_specs()
749 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_SHADER_CORE_COUNT, &val)) { in etna_get_specs()
753 screen->specs.shader_core_count = val; in etna_get_specs()
755 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_STREAM_COUNT, &val)) { in etna_get_specs()
759 screen->specs.stream_count = val; in etna_get_specs()
761 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_REGISTER_MAX, &val)) { in etna_get_specs()
765 screen->specs.max_registers = val; in etna_get_specs()
767 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_PIXEL_PIPES, &val)) { in etna_get_specs()
771 screen->specs.pixel_pipes = val; in etna_get_specs()
773 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_NUM_CONSTANTS, &val)) { in etna_get_specs()
781 screen->specs.num_constants = val; in etna_get_specs()
783 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_NUM_VARYINGS, &val)) { in etna_get_specs()
787 screen->specs.max_varyings = MAX2(val, ETNA_NUM_VARYINGS); in etna_get_specs()
791 if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI5)) in etna_get_specs()
792 screen->specs.halti = 5; /* New GC7000/GC8x00 */ in etna_get_specs()
793 else if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI4)) in etna_get_specs()
794 screen->specs.halti = 4; /* Old GC7000/GC7400 */ in etna_get_specs()
795 else if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI3)) in etna_get_specs()
796 screen->specs.halti = 3; /* None? */ in etna_get_specs()
797 else if (VIV_FEATURE(screen, chipMinorFeatures4, HALTI2)) in etna_get_specs()
798 screen->specs.halti = 2; /* GC2500/GC3000/GC5000/GC6400 */ in etna_get_specs()
799 else if (VIV_FEATURE(screen, chipMinorFeatures2, HALTI1)) in etna_get_specs()
800 screen->specs.halti = 1; /* GC900/GC4000/GC7000UL */ in etna_get_specs()
801 else if (VIV_FEATURE(screen, chipMinorFeatures1, HALTI0)) in etna_get_specs()
802 screen->specs.halti = 0; /* GC880/GC2000/GC7000TM */ in etna_get_specs()
804 screen->specs.halti = -1; /* GC7000nanolite / pre-GC2000 except GC880 */ in etna_get_specs()
805 if (screen->specs.halti >= 0) in etna_get_specs()
806 DBG("etnaviv: GPU arch: HALTI%d", screen->specs.halti); in etna_get_specs()
810 screen->specs.can_supertile = in etna_get_specs()
811 VIV_FEATURE(screen, chipMinorFeatures0, SUPER_TILED); in etna_get_specs()
812 screen->specs.bits_per_tile = in etna_get_specs()
813 VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 2 : 4; in etna_get_specs()
814 screen->specs.ts_clear_value = in etna_get_specs()
815 VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE) ? 0xffffffff : in etna_get_specs()
816 VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555 : in etna_get_specs()
819 screen->specs.vs_need_z_div = in etna_get_specs()
820 screen->model < 0x1000 && screen->model != 0x880; in etna_get_specs()
821 screen->specs.has_sin_cos_sqrt = in etna_get_specs()
822 VIV_FEATURE(screen, chipMinorFeatures0, HAS_SQRT_TRIG); in etna_get_specs()
823 screen->specs.has_sign_floor_ceil = in etna_get_specs()
824 VIV_FEATURE(screen, chipMinorFeatures0, HAS_SIGN_FLOOR_CEIL); in etna_get_specs()
825 screen->specs.has_shader_range_registers = in etna_get_specs()
826 screen->model >= 0x1000 || screen->model == 0x880; in etna_get_specs()
827 screen->specs.npot_tex_any_wrap = in etna_get_specs()
828 VIV_FEATURE(screen, chipMinorFeatures1, NON_POWER_OF_TWO); in etna_get_specs()
829 screen->specs.has_new_transcendentals = in etna_get_specs()
830 VIV_FEATURE(screen, chipMinorFeatures3, HAS_FAST_TRANSCENDENTALS); in etna_get_specs()
831 screen->specs.has_halti2_instructions = in etna_get_specs()
832 VIV_FEATURE(screen, chipMinorFeatures4, HALTI2); in etna_get_specs()
833 screen->specs.v4_compression = in etna_get_specs()
834 VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION); in etna_get_specs()
835 screen->specs.seamless_cube_map = in etna_get_specs()
836 (screen->model != 0x880) && /* Seamless cubemap is broken on GC880? */ in etna_get_specs()
837 VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP); in etna_get_specs()
839 if (screen->specs.halti >= 5) { in etna_get_specs()
841 screen->specs.vs_offset = 0; in etna_get_specs()
842 screen->specs.ps_offset = 0; in etna_get_specs()
843 screen->specs.max_instructions = 0; /* Do not program shaders manually */ in etna_get_specs()
844 screen->specs.has_icache = true; in etna_get_specs()
845 } else if (VIV_FEATURE(screen, chipMinorFeatures3, INSTRUCTION_CACHE)) { in etna_get_specs()
852 screen->specs.vs_offset = 0xC000; in etna_get_specs()
857 screen->specs.ps_offset = 0x8000 + 0x1000; in etna_get_specs()
858 screen->specs.max_instructions = 256; /* maximum number instructions for non-icache use */ in etna_get_specs()
859 screen->specs.has_icache = true; in etna_get_specs()
862 screen->specs.vs_offset = 0xC000; in etna_get_specs()
863 screen->specs.ps_offset = 0xD000; /* like vivante driver */ in etna_get_specs()
864 screen->specs.max_instructions = 256; in etna_get_specs()
866 screen->specs.vs_offset = 0x4000; in etna_get_specs()
867 screen->specs.ps_offset = 0x6000; in etna_get_specs()
868 screen->specs.max_instructions = instruction_count / 2; in etna_get_specs()
870 screen->specs.has_icache = false; in etna_get_specs()
873 if (VIV_FEATURE(screen, chipMinorFeatures1, HALTI0)) { in etna_get_specs()
874 screen->specs.vertex_max_elements = 16; in etna_get_specs()
879 screen->specs.vertex_max_elements = 10; in etna_get_specs()
882 etna_determine_uniform_limits(screen); in etna_get_specs()
883 etna_determine_sampler_limits(screen); in etna_get_specs()
885 if (screen->specs.halti >= 5) { in etna_get_specs()
886 screen->specs.has_unified_uniforms = true; in etna_get_specs()
887 screen->specs.vs_uniforms_offset = VIVS_SH_HALTI5_UNIFORMS_MIRROR(0); in etna_get_specs()
888 screen->specs.ps_uniforms_offset = VIVS_SH_HALTI5_UNIFORMS(screen->specs.max_vs_uniforms*4); in etna_get_specs()
889 } else if (screen->specs.halti >= 1) { in etna_get_specs()
892 screen->specs.has_unified_uniforms = true; in etna_get_specs()
893 screen->specs.vs_uniforms_offset = VIVS_SH_UNIFORMS(0); in etna_get_specs()
898 screen->specs.ps_uniforms_offset = VIVS_SH_UNIFORMS(screen->specs.max_vs_uniforms*4); in etna_get_specs()
900 screen->specs.has_unified_uniforms = false; in etna_get_specs()
901 screen->specs.vs_uniforms_offset = VIVS_VS_UNIFORMS(0); in etna_get_specs()
902 screen->specs.ps_uniforms_offset = VIVS_PS_UNIFORMS(0); in etna_get_specs()
905 screen->specs.max_texture_size = in etna_get_specs()
906 VIV_FEATURE(screen, chipMinorFeatures0, TEXTURE_8K) ? 8192 : 2048; in etna_get_specs()
907 screen->specs.max_rendertarget_size = in etna_get_specs()
908 VIV_FEATURE(screen, chipMinorFeatures0, RENDERTARGET_8K) ? 8192 : 2048; in etna_get_specs()
910 screen->specs.single_buffer = VIV_FEATURE(screen, chipMinorFeatures4, SINGLE_BUFFER); in etna_get_specs()
911 if (screen->specs.single_buffer) in etna_get_specs()
912 DBG("etnaviv: Single buffer mode enabled with %d pixel pipes", screen->specs.pixel_pipes); in etna_get_specs()
914 screen->specs.tex_astc = VIV_FEATURE(screen, chipMinorFeatures4, TEXTURE_ASTC) && in etna_get_specs()
915 !VIV_FEATURE(screen, chipMinorFeatures6, NO_ASTC); in etna_get_specs()
917 screen->specs.use_blt = VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE); in etna_get_specs()
929 struct etna_screen *screen = etna_screen(pscreen); in etna_screen_bo_from_handle() local
933 bo = etna_bo_from_name(screen->dev, whandle->handle); in etna_screen_bo_from_handle()
935 bo = etna_bo_from_dmabuf(screen->dev, whandle->handle); in etna_screen_bo_from_handle()
959 struct etna_screen *screen = etna_screen(pscreen); in etna_get_disk_shader_cache() local
960 struct etna_compiler *compiler = screen->compiler; in etna_get_disk_shader_cache()
969 struct etna_screen *screen = CALLOC_STRUCT(etna_screen); in etna_screen_create() local
973 if (!screen) in etna_screen_create()
976 pscreen = &screen->base; in etna_screen_create()
977 screen->dev = dev; in etna_screen_create()
978 screen->gpu = gpu; in etna_screen_create()
979 screen->ro = ro; in etna_screen_create()
980 screen->refcnt = 1; in etna_screen_create()
982 screen->drm_version = etnaviv_device_version(screen->dev); in etna_screen_create()
988 screen->pipe = etna_pipe_new(gpu, ETNA_PIPE_3D); in etna_screen_create()
989 if (!screen->pipe) { in etna_screen_create()
994 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_MODEL, &val)) { in etna_screen_create()
998 screen->model = val; in etna_screen_create()
1000 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_REVISION, &val)) { in etna_screen_create()
1004 screen->revision = val; in etna_screen_create()
1006 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_0, &val)) { in etna_screen_create()
1010 screen->features[0] = val; in etna_screen_create()
1012 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_1, &val)) { in etna_screen_create()
1016 screen->features[1] = val; in etna_screen_create()
1018 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_2, &val)) { in etna_screen_create()
1022 screen->features[2] = val; in etna_screen_create()
1024 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_3, &val)) { in etna_screen_create()
1028 screen->features[3] = val; in etna_screen_create()
1030 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_4, &val)) { in etna_screen_create()
1034 screen->features[4] = val; in etna_screen_create()
1036 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_5, &val)) { in etna_screen_create()
1040 screen->features[5] = val; in etna_screen_create()
1042 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_6, &val)) { in etna_screen_create()
1046 screen->features[6] = val; in etna_screen_create()
1048 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_7, &val)) { in etna_screen_create()
1052 screen->features[7] = val; in etna_screen_create()
1054 if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_8, &val)) { in etna_screen_create()
1058 screen->features[8] = val; in etna_screen_create()
1060 if (!etna_get_specs(screen)) in etna_screen_create()
1063 if (screen->specs.halti >= 5 && !etnaviv_device_softpin_capable(dev)) { in etna_screen_create()
1068 screen->options = (nir_shader_compiler_options) { in etna_screen_create()
1084 .lower_fsign = !screen->specs.has_sign_floor_ceil, in etna_screen_create()
1085 .lower_ffloor = !screen->specs.has_sign_floor_ceil, in etna_screen_create()
1086 .lower_fceil = !screen->specs.has_sign_floor_ceil, in etna_screen_create()
1087 .lower_fsqrt = !screen->specs.has_sin_cos_sqrt, in etna_screen_create()
1088 .lower_sincos = !screen->specs.has_sin_cos_sqrt, in etna_screen_create()
1089 .lower_uniforms_to_ubo = screen->specs.halti >= 2, in etna_screen_create()
1095 screen->features[viv_chipFeatures] |= chipFeatures_NO_EARLY_Z; in etna_screen_create()
1097 screen->features[viv_chipFeatures] &= ~chipFeatures_FAST_CLEAR; in etna_screen_create()
1099 screen->features[viv_chipMinorFeatures1] &= ~chipMinorFeatures1_AUTO_DISABLE; in etna_screen_create()
1101 screen->specs.can_supertile = 0; in etna_screen_create()
1103 screen->specs.single_buffer = 0; in etna_screen_create()
1122 screen->compiler = etna_compiler_create(etna_screen_get_name(pscreen)); in etna_screen_create()
1123 if (!screen->compiler) in etna_screen_create()
1130 util_dynarray_init(&screen->supported_pm_queries, NULL); in etna_screen_create()
1131 slab_create_parent(&screen->transfer_pool, sizeof(struct etna_transfer), 16); in etna_screen_create()
1133 if (screen->drm_version >= ETNA_DRM_VERSION_PERFMON) in etna_screen_create()
1134 etna_pm_query_setup(screen); in etna_screen_create()