Lines Matching refs:instructions
66 …dynarray *table, unsigned index, uint16_t mask, midgard_instruction **instructions, unsigned child) in add_dependency() argument
75 BITSET_WORD *dependents = instructions[*parent]->dependents; in add_dependency()
82 instructions[child]->nr_dependencies++; in add_dependency()
99 mir_create_dependency_graph(midgard_instruction **instructions, unsigned count, unsigned node_count) in mir_create_dependency_graph() argument
113 instructions[i]->dependents = in mir_create_dependency_graph()
116 instructions[i]->nr_dependencies = 0; in mir_create_dependency_graph()
123 if (instructions[i]->compact_branch) in mir_create_dependency_graph()
126 unsigned dest = instructions[i]->dest; in mir_create_dependency_graph()
127 unsigned mask = mir_bytemask(instructions[i]); in mir_create_dependency_graph()
129 mir_foreach_src((*instructions), s) { in mir_create_dependency_graph()
130 unsigned src = instructions[i]->src[s]; in mir_create_dependency_graph()
133 … unsigned readmask = mir_bytemask_of_read_components(instructions[i], src); in mir_create_dependency_graph()
134 add_dependency(last_write, src, readmask, instructions, i); in mir_create_dependency_graph()
140 if (instructions[i]->type == TAG_LOAD_STORE_4 && in mir_create_dependency_graph()
141 load_store_opcode_props[instructions[i]->op].props & LDST_ADDRESS) { in mir_create_dependency_graph()
143 unsigned type = instructions[i]->load_store.arg_reg | in mir_create_dependency_graph()
144 instructions[i]->load_store.arg_comp; in mir_create_dependency_graph()
156 BITSET_WORD *dependents = instructions[prev]->dependents; in mir_create_dependency_graph()
163 instructions[i]->nr_dependencies++; in mir_create_dependency_graph()
170 add_dependency(last_read, dest, mask, instructions, i); in mir_create_dependency_graph()
171 add_dependency(last_write, dest, mask, instructions, i); in mir_create_dependency_graph()
175 mir_foreach_src((*instructions), s) { in mir_create_dependency_graph()
176 unsigned src = instructions[i]->src[s]; in mir_create_dependency_graph()
179 … unsigned readmask = mir_bytemask_of_read_components(instructions[i], src); in mir_create_dependency_graph()
188 if (instructions[count - 1]->compact_branch) { in mir_create_dependency_graph()
189 BITSET_WORD *dependents = instructions[count - 1]->dependents; in mir_create_dependency_graph()
196 instructions[i]->nr_dependencies++; in mir_create_dependency_graph()
276 *len = list_length(&block->base.instructions); in flatten_mir()
281 midgard_instruction **instructions = in flatten_mir() local
287 instructions[i++] = ins; in flatten_mir()
289 return instructions; in flatten_mir()
296 mir_initialize_worklist(BITSET_WORD *worklist, midgard_instruction **instructions, unsigned count) in mir_initialize_worklist() argument
299 if (instructions[i]->nr_dependencies == 0) in mir_initialize_worklist()
311 midgard_instruction **instructions, midgard_instruction *done) in mir_update_worklist() argument
333 assert(instructions[i]->nr_dependencies); in mir_update_worklist()
335 if (!(--instructions[i]->nr_dependencies)) in mir_update_worklist()
656 midgard_instruction **instructions, in mir_choose_instruction() argument
699 if (tag != ~0 && instructions[i]->type != tag) in mir_choose_instruction()
702 bool alu = (instructions[i]->type == TAG_ALU_4); in mir_choose_instruction()
703 bool ldst = (instructions[i]->type == TAG_LOAD_STORE_4); in mir_choose_instruction()
707 (instructions[i]->op == midgard_alu_op_imov || in mir_choose_instruction()
708 instructions[i]->op == midgard_alu_op_fmov); in mir_choose_instruction()
710 if (predicate->exclude != ~0 && instructions[i]->dest == predicate->exclude) in mir_choose_instruction()
713 if (alu && !branch && unit != ~0 && !(mir_has_unit(instructions[i], unit))) in mir_choose_instruction()
720 if (branch && !instructions[i]->compact_branch) in mir_choose_instruction()
723 if (alu && scalar && !mir_is_scalar(instructions[i])) in mir_choose_instruction()
726 … if (alu && predicate->constants && !mir_adjust_constants(instructions[i], predicate, false)) in mir_choose_instruction()
729 if (needs_dest && instructions[i]->dest != dest) in mir_choose_instruction()
732 if (mask && ((~instructions[i]->mask) & mask)) in mir_choose_instruction()
735 if (instructions[i]->mask & predicate->no_mask) in mir_choose_instruction()
738 if (ldst && mir_pipeline_count(instructions[i]) + predicate->pipeline_count > 2) in mir_choose_instruction()
741 bool conditional = alu && !branch && OP_IS_CSEL(instructions[i]->op); in mir_choose_instruction()
742 conditional |= (branch && instructions[i]->branch.conditional); in mir_choose_instruction()
747 int effect = mir_live_effect(liveness, instructions[i], false); in mir_choose_instruction()
767 midgard_instruction *I = instructions[best_index]; in mir_choose_instruction()
773 mir_adjust_constants(instructions[best_index], predicate, true); in mir_choose_instruction()
776 predicate->pipeline_count += mir_pipeline_count(instructions[best_index]); in mir_choose_instruction()
779 mir_adjust_unit(instructions[best_index], unit); in mir_choose_instruction()
783 mir_live_effect(liveness, instructions[best_index], true); in mir_choose_instruction()
794 midgard_instruction **instructions, in mir_choose_bundle() argument
810 …midgard_instruction *chosen = mir_choose_instruction(instructions, liveness, worklist, count, &pre… in mir_choose_bundle()
818 … chosen = mir_choose_instruction(instructions, liveness, worklist, count, &predicate); in mir_choose_bundle()
824 … chosen = mir_choose_instruction(instructions, liveness, worklist, count, &predicate); in mir_choose_bundle()
842 midgard_instruction **instructions, in mir_choose_alu() argument
854 *slot = mir_choose_instruction(instructions, liveness, worklist, len, predicate); in mir_choose_alu()
878 midgard_instruction **instructions, in mir_comparison_mobile() argument
889 if (instructions[i]->dest != cond) in mir_comparison_mobile()
893 if (instructions[i]->type != TAG_ALU_4) in mir_comparison_mobile()
897 if (OP_IS_CSEL(instructions[i]->op)) in mir_comparison_mobile()
903 if (GET_CHANNEL_COUNT(alu_opcode_props[instructions[i]->op].props)) in mir_comparison_mobile()
908 if (!mir_adjust_constants(instructions[i], predicate, false)) in mir_comparison_mobile()
921 mir_adjust_constants(instructions[ret], predicate, true); in mir_comparison_mobile()
933 midgard_instruction **instructions, in mir_schedule_comparison() argument
942 mir_comparison_mobile(ctx, instructions, predicate, count, cond) : ~0; in mir_schedule_comparison()
948 return instructions[comp_i]; in mir_schedule_comparison()
967 midgard_instruction **instructions, in mir_schedule_condition() argument
980 ctx, instructions, predicate, worklist, count, last->src[condition_index], in mir_schedule_condition()
1020 midgard_instruction **instructions, in mir_schedule_texture() argument
1032 mir_choose_instruction(instructions, liveness, worklist, len, &predicate); in mir_schedule_texture()
1034 mir_update_worklist(worklist, len, instructions, ins); in mir_schedule_texture()
1042 .instructions = { ins } in mir_schedule_texture()
1050 midgard_instruction **instructions, in mir_schedule_ldst() argument
1064 mir_choose_instruction(instructions, liveness, worklist, len, &predicate); in mir_schedule_ldst()
1067 mir_choose_instruction(instructions, liveness, worklist, len, &predicate); in mir_schedule_ldst()
1074 .instructions = { ins, pair } in mir_schedule_ldst()
1082 mir_update_worklist(worklist, len, instructions, ins); in mir_schedule_ldst()
1083 mir_update_worklist(worklist, len, instructions, pair); in mir_schedule_ldst()
1092 midgard_instruction **instructions, in mir_schedule_zs_write() argument
1117 mir_choose_instruction(instructions, liveness, worklist, len, predicate); in mir_schedule_zs_write()
1159 midgard_instruction **instructions, in mir_schedule_alu() argument
1181 … mir_choose_alu(&branch, instructions, liveness, worklist, len, &predicate, ALU_ENAB_BR_COMPACT); in mir_schedule_alu()
1182 mir_update_worklist(worklist, len, instructions, branch); in mir_schedule_alu()
1186 …d_instruction *cond = mir_schedule_condition(ctx, &predicate, worklist, len, instructions, branch); in mir_schedule_alu()
1256 …mir_schedule_zs_write(ctx, &predicate, instructions, liveness, worklist, len, branch, &smul, &vadd… in mir_schedule_alu()
1259 …mir_schedule_zs_write(ctx, &predicate, instructions, liveness, worklist, len, branch, &smul, &vadd… in mir_schedule_alu()
1261 mir_choose_alu(&smul, instructions, liveness, worklist, len, &predicate, UNIT_SMUL); in mir_schedule_alu()
1266 mir_choose_alu(&vlut, instructions, liveness, worklist, len, &predicate, UNIT_VLUT); in mir_schedule_alu()
1268 mir_choose_alu(&vadd, instructions, liveness, worklist, len, &predicate, UNIT_VADD); in mir_schedule_alu()
1274 mir_update_worklist(worklist, len, instructions, vlut); in mir_schedule_alu()
1275 mir_update_worklist(worklist, len, instructions, vadd); in mir_schedule_alu()
1276 mir_update_worklist(worklist, len, instructions, smul); in mir_schedule_alu()
1283 …gard_instruction *cond = mir_schedule_condition(ctx, &predicate, worklist, len, instructions, ins); in mir_schedule_alu()
1294 mir_choose_alu(&sadd, instructions, liveness, worklist, len, &predicate, UNIT_SADD); in mir_schedule_alu()
1327 … mir_choose_instruction(instructions, liveness, worklist, len, &predicate); in mir_schedule_alu()
1362 mir_choose_alu(&vmul, instructions, liveness, worklist, len, &predicate, UNIT_VMUL); in mir_schedule_alu()
1364 mir_update_worklist(worklist, len, instructions, vmul); in mir_schedule_alu()
1365 mir_update_worklist(worklist, len, instructions, sadd); in mir_schedule_alu()
1378 bundle.instructions[bundle.instruction_count++] = stages[i]; in mir_schedule_alu()
1426 midgard_instruction **instructions = flatten_mir(block, &len); in schedule_block() local
1433 mir_create_dependency_graph(instructions, len, node_count); in schedule_block()
1439 mir_initialize_worklist(worklist, instructions, len); in schedule_block()
1445 if (instructions[i]->type == TAG_LOAD_STORE_4) in schedule_block()
1455 unsigned tag = mir_choose_bundle(instructions, liveness, worklist, len, num_ldst); in schedule_block()
1459 …bundle = mir_schedule_texture(instructions, liveness, worklist, len, ctx->stage != MESA_SHADER_FRA… in schedule_block()
1461 … bundle = mir_schedule_ldst(instructions, liveness, worklist, len, &num_ldst); in schedule_block()
1463 bundle = mir_schedule_alu(ctx, instructions, liveness, worklist, len); in schedule_block()
1468 bundle.instructions[i]->bundle_id = in schedule_block()
1496 list_add(&ins->link, &block->base.instructions); in schedule_block()
1499 free(instructions); /* Allocated by flatten_mir() */ in schedule_block()
1537 if (list_is_empty(&blk->base.instructions)) in mir_lower_blend_input()