35                            const struct panfrost_perf *perf)  in panfrost_perf_counter_read()  argument
37    assert(counter->offset < perf->n_counter_values);  in panfrost_perf_counter_read()
38    uint32_t ret = perf->counter_values[counter->offset];  in panfrost_perf_counter_read()
41    if (counter->category == &perf->cfg->categories[PAN_SHADER_CORE_INDEX]) {  in panfrost_perf_counter_read()
42       for (uint32_t core = 1; core < perf->dev->core_count; ++core) {  in panfrost_perf_counter_read()
43          ret += perf->counter_values[counter->offset + PAN_COUNTERS_PER_CATEGORY * core];  in panfrost_perf_counter_read()
79 panfrost_perf_init(struct panfrost_perf *perf, struct panfrost_device *dev)  in panfrost_perf_init()  argument
81    perf->dev = dev;  in panfrost_perf_init()
82    perf->cfg = get_perf_config(dev->gpu_id);  in panfrost_perf_init()
87    perf->n_counter_values = PAN_COUNTERS_PER_CATEGORY * n_blocks;  in panfrost_perf_init()
88    perf->counter_values = ralloc_array(perf, uint32_t, perf->n_counter_values);  in panfrost_perf_init()
92 panfrost_perf_query(struct panfrost_perf *perf, uint32_t enable)  in panfrost_perf_query()  argument
95    return drmIoctl(perf->dev->fd, DRM_IOCTL_PANFROST_PERFCNT_ENABLE, &perfcnt_enable);  in panfrost_perf_query()
99 panfrost_perf_enable(struct panfrost_perf *perf)  in panfrost_perf_enable()  argument
101    return panfrost_perf_query(perf, 1 /* enable */);  in panfrost_perf_enable()
105 panfrost_perf_disable(struct panfrost_perf *perf)  in panfrost_perf_disable()  argument
107    return panfrost_perf_query(perf, 0 /* disable */);  in panfrost_perf_disable()
111 panfrost_perf_dump(struct panfrost_perf *perf)  in panfrost_perf_dump()  argument
114    struct drm_panfrost_perfcnt_dump perfcnt_dump = {(uint64_t)(uintptr_t)perf->counter_values};  in panfrost_perf_dump()
115    return drmIoctl(perf->dev->fd, DRM_IOCTL_PANFROST_PERFCNT_DUMP, &perfcnt_dump);  in panfrost_perf_dump()