1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FREEDRENO_UTIL_H_
28 #define FREEDRENO_UTIL_H_
29
30 #include "drm/freedreno_drmif.h"
31 #include "drm/freedreno_ringbuffer.h"
32
33 #include "pipe/p_format.h"
34 #include "pipe/p_state.h"
35 #include "util/compiler.h"
36 #include "util/half_float.h"
37 #include "util/log.h"
38 #include "util/u_debug.h"
39 #include "util/u_dynarray.h"
40 #include "util/u_math.h"
41 #include "util/u_pack_color.h"
42
43 #include "adreno_common.xml.h"
44 #include "adreno_pm4.xml.h"
45 #include "disasm.h"
46
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50
51 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
52 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
53 enum pipe_format fd_gmem_restore_format(enum pipe_format format);
54 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
55 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
56 enum adreno_stencil_op fd_stencil_op(unsigned op);
57
58 #define A3XX_MAX_MIP_LEVELS 14
59
60 #define A2XX_MAX_RENDER_TARGETS 1
61 #define A3XX_MAX_RENDER_TARGETS 4
62 #define A4XX_MAX_RENDER_TARGETS 8
63 #define A5XX_MAX_RENDER_TARGETS 8
64 #define A6XX_MAX_RENDER_TARGETS 8
65
66 #define MAX_RENDER_TARGETS A6XX_MAX_RENDER_TARGETS
67
68 /* clang-format off */
69 enum fd_debug_flag {
70 FD_DBG_MSGS = BITFIELD_BIT(0),
71 FD_DBG_DISASM = BITFIELD_BIT(1),
72 FD_DBG_DCLEAR = BITFIELD_BIT(2),
73 FD_DBG_DDRAW = BITFIELD_BIT(3),
74 FD_DBG_NOSCIS = BITFIELD_BIT(4),
75 FD_DBG_DIRECT = BITFIELD_BIT(5),
76 FD_DBG_NOBYPASS = BITFIELD_BIT(6),
77 FD_DBG_PERF = BITFIELD_BIT(7),
78 FD_DBG_NOBIN = BITFIELD_BIT(8),
79 FD_DBG_NOGMEM = BITFIELD_BIT(9),
80 FD_DBG_SERIALC = BITFIELD_BIT(10),
81 FD_DBG_SHADERDB = BITFIELD_BIT(11),
82 FD_DBG_FLUSH = BITFIELD_BIT(12),
83 FD_DBG_DEQP = BITFIELD_BIT(13),
84 FD_DBG_INORDER = BITFIELD_BIT(14),
85 FD_DBG_BSTAT = BITFIELD_BIT(15),
86 FD_DBG_NOGROW = BITFIELD_BIT(16),
87 FD_DBG_LRZ = BITFIELD_BIT(17),
88 FD_DBG_NOINDR = BITFIELD_BIT(18),
89 FD_DBG_NOBLIT = BITFIELD_BIT(19),
90 FD_DBG_HIPRIO = BITFIELD_BIT(20),
91 FD_DBG_TTILE = BITFIELD_BIT(21),
92 FD_DBG_PERFC = BITFIELD_BIT(22),
93 FD_DBG_NOUBWC = BITFIELD_BIT(23),
94 FD_DBG_NOLRZ = BITFIELD_BIT(24),
95 FD_DBG_NOTILE = BITFIELD_BIT(25),
96 FD_DBG_LAYOUT = BITFIELD_BIT(26),
97 FD_DBG_NOFP16 = BITFIELD_BIT(27),
98 FD_DBG_NOHW = BITFIELD_BIT(28),
99 };
100 /* clang-format on */
101
102 extern int fd_mesa_debug;
103 extern bool fd_binning_enabled;
104
105 #define FD_DBG(category) unlikely(fd_mesa_debug &FD_DBG_##category)
106
107 #include <unistd.h>
108 #include <sys/types.h>
109
110 #define DBG(fmt, ...) \
111 do { \
112 if (FD_DBG(MSGS)) \
113 mesa_logi("%5d: %s:%d: " fmt, gettid(), __FUNCTION__, __LINE__, \
114 ##__VA_ARGS__); \
115 } while (0)
116
117 #define perf_debug_message(debug, type, ...) \
118 do { \
119 if (FD_DBG(PERF)) \
120 mesa_logw(__VA_ARGS__); \
121 struct pipe_debug_callback *__d = (debug); \
122 if (__d) \
123 pipe_debug_message(__d, type, __VA_ARGS__); \
124 } while (0)
125
126 #define perf_debug_ctx(ctx, ...) \
127 do { \
128 struct fd_context *__c = (ctx); \
129 perf_debug_message(__c ? &__c->debug : NULL, PERF_INFO, __VA_ARGS__); \
130 } while (0)
131
132 #define perf_debug(...) perf_debug_ctx(NULL, __VA_ARGS__)
133
134 #define perf_time_ctx(ctx, limit_ns, fmt, ...) \
135 for (struct __perf_time_state __s = \
136 { \
137 .t = -__perf_get_time(ctx), \
138 }; \
139 !__s.done; ({ \
140 __s.t += __perf_get_time(ctx); \
141 __s.done = true; \
142 if (__s.t > (limit_ns)) { \
143 perf_debug_ctx(ctx, fmt " (%.03f ms)", ##__VA_ARGS__, \
144 (double)__s.t / 1000000.0); \
145 } \
146 }))
147
148 #define perf_time(limit_ns, fmt, ...) \
149 perf_time_ctx(NULL, limit_ns, fmt, ##__VA_ARGS__)
150
151 struct __perf_time_state {
152 int64_t t;
153 bool done;
154 };
155
156 /* static inline would be nice here, except 'struct fd_context' is not
157 * defined yet:
158 */
159 #define __perf_get_time(ctx) \
160 ((FD_DBG(PERF) || ({ \
161 struct fd_context *__c = (ctx); \
162 unlikely(__c && __c->debug.debug_message); \
163 })) \
164 ? os_time_get_nano() \
165 : 0)
166
167 struct fd_context;
168
169 /**
170 * A psuedo-variable for defining where various parts of the fd_context
171 * can be safely accessed.
172 *
173 * With threaded_context, certain pctx funcs are called from gallium
174 * front-end/state-tracker (eg. CSO creation), while others are called
175 * from the driver thread. Things called from driver thread can safely
176 * access anything in the ctx, while things called from the fe/st thread
177 * must limit themselves to "safe" things (ie. ctx->screen is safe as it
178 * is immutable, but the blitter_context is not).
179 */
180 extern lock_cap_t fd_context_access_cap;
181
182 /**
183 * Make the annotation a bit less verbose.. mark fields which should only
184 * be accessed by driver-thread with 'dt'
185 */
186 #define dt guarded_by(fd_context_access_cap)
187
188 /**
189 * Annotation for entry-point functions only called in driver thread.
190 *
191 * For static functions, apply the annotation to the function declaration.
192 * Otherwise apply to the function prototype.
193 */
194 #define in_dt assert_cap(fd_context_access_cap)
195
196 /**
197 * Annotation for internal functions which are only called from entry-
198 * point functions (with 'in_dt' annotation) or other internal functions
199 * with the 'assert_dt' annotation.
200 *
201 * For static functions, apply the annotation to the function declaration.
202 * Otherwise apply to the function prototype.
203 */
204 #define assert_dt requires_cap(fd_context_access_cap)
205
206 /**
207 * Special helpers for context access outside of driver thread. For ex,
208 * pctx->get_query_result() is not called on driver thread, but the
209 * query is guaranteed to be flushed, or the driver thread queue is
210 * guaranteed to be flushed.
211 *
212 * Use with caution!
213 */
214 static inline void
fd_context_access_begin(struct fd_context * ctx)215 fd_context_access_begin(struct fd_context *ctx)
216 acquire_cap(fd_context_access_cap)
217 {
218 }
219
220 static inline void
fd_context_access_end(struct fd_context * ctx)221 fd_context_access_end(struct fd_context *ctx) release_cap(fd_context_access_cap)
222 {
223 }
224
225 /* for conditionally setting boolean flag(s): */
226 #define COND(bool, val) ((bool) ? (val) : 0)
227
228 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
229
230 static inline uint32_t
DRAW(enum pc_di_primtype prim_type,enum pc_di_src_sel source_select,enum pc_di_index_size index_size,enum pc_di_vis_cull_mode vis_cull_mode,uint8_t instances)231 DRAW(enum pc_di_primtype prim_type, enum pc_di_src_sel source_select,
232 enum pc_di_index_size index_size, enum pc_di_vis_cull_mode vis_cull_mode,
233 uint8_t instances)
234 {
235 return (prim_type << 0) | (source_select << 6) | ((index_size & 1) << 11) |
236 ((index_size >> 1) << 13) | (vis_cull_mode << 9) | (1 << 14) |
237 (instances << 24);
238 }
239
240 static inline uint32_t
DRAW_A20X(enum pc_di_primtype prim_type,enum pc_di_face_cull_sel faceness_cull_select,enum pc_di_src_sel source_select,enum pc_di_index_size index_size,bool pre_fetch_cull_enable,bool grp_cull_enable,uint16_t count)241 DRAW_A20X(enum pc_di_primtype prim_type,
242 enum pc_di_face_cull_sel faceness_cull_select,
243 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
244 bool pre_fetch_cull_enable, bool grp_cull_enable, uint16_t count)
245 {
246 return (prim_type << 0) | (source_select << 6) |
247 (faceness_cull_select << 8) | ((index_size & 1) << 11) |
248 ((index_size >> 1) << 13) | (pre_fetch_cull_enable << 14) |
249 (grp_cull_enable << 15) | (count << 16);
250 }
251
252 /* for tracking cmdstream positions that need to be patched: */
253 struct fd_cs_patch {
254 uint32_t *cs;
255 uint32_t val;
256 };
257 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
258 #define fd_patch_element(buf, i) \
259 util_dynarray_element(buf, struct fd_cs_patch, i)
260
261 static inline enum pipe_format
pipe_surface_format(struct pipe_surface * psurf)262 pipe_surface_format(struct pipe_surface *psurf)
263 {
264 if (!psurf)
265 return PIPE_FORMAT_NONE;
266 return psurf->format;
267 }
268
269 static inline bool
fd_surface_half_precision(const struct pipe_surface * psurf)270 fd_surface_half_precision(const struct pipe_surface *psurf)
271 {
272 enum pipe_format format;
273
274 if (!psurf)
275 return true;
276
277 format = psurf->format;
278
279 /* colors are provided in consts, which go through cov.f32f16, which will
280 * break these values
281 */
282 if (util_format_is_pure_integer(format))
283 return false;
284
285 /* avoid losing precision on 32-bit float formats */
286 if (util_format_is_float(format) &&
287 util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0) ==
288 32)
289 return false;
290
291 return true;
292 }
293
294 static inline unsigned
fd_sampler_first_level(const struct pipe_sampler_view * view)295 fd_sampler_first_level(const struct pipe_sampler_view *view)
296 {
297 if (view->target == PIPE_BUFFER)
298 return 0;
299 return view->u.tex.first_level;
300 }
301
302 static inline unsigned
fd_sampler_last_level(const struct pipe_sampler_view * view)303 fd_sampler_last_level(const struct pipe_sampler_view *view)
304 {
305 if (view->target == PIPE_BUFFER)
306 return 0;
307 return view->u.tex.last_level;
308 }
309
310 static inline bool
fd_half_precision(struct pipe_framebuffer_state * pfb)311 fd_half_precision(struct pipe_framebuffer_state *pfb)
312 {
313 unsigned i;
314
315 for (i = 0; i < pfb->nr_cbufs; i++)
316 if (!fd_surface_half_precision(pfb->cbufs[i]))
317 return false;
318
319 return true;
320 }
321
322 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
323
324 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
325 static inline void
OUT_RINGP(struct fd_ringbuffer * ring,uint32_t data,struct util_dynarray * buf)326 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data, struct util_dynarray *buf)
327 {
328 if (LOG_DWORDS) {
329 DBG("ring[%p]: OUT_RINGP %04x: %08x", ring,
330 (uint32_t)(ring->cur - ring->start), data);
331 }
332 util_dynarray_append(buf, struct fd_cs_patch,
333 ((struct fd_cs_patch){
334 .cs = ring->cur++,
335 .val = data,
336 }));
337 }
338
339 static inline void
__OUT_IB(struct fd_ringbuffer * ring,bool prefetch,struct fd_ringbuffer * target)340 __OUT_IB(struct fd_ringbuffer *ring, bool prefetch,
341 struct fd_ringbuffer *target)
342 {
343 if (target->cur == target->start)
344 return;
345
346 unsigned count = fd_ringbuffer_cmd_count(target);
347
348 /* for debug after a lock up, write a unique counter value
349 * to scratch6 for each IB, to make it easier to match up
350 * register dumps to cmdstream. The combination of IB and
351 * DRAW (scratch7) is enough to "triangulate" the particular
352 * draw that caused lockup.
353 */
354 emit_marker(ring, 6);
355
356 for (unsigned i = 0; i < count; i++) {
357 uint32_t dwords;
358 OUT_PKT3(ring, prefetch ? CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD,
359 2);
360 dwords = fd_ringbuffer_emit_reloc_ring_full(ring, target, i) / 4;
361 assert(dwords > 0);
362 OUT_RING(ring, dwords);
363 OUT_PKT2(ring);
364 }
365
366 emit_marker(ring, 6);
367 }
368
369 static inline void
__OUT_IB5(struct fd_ringbuffer * ring,struct fd_ringbuffer * target)370 __OUT_IB5(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
371 {
372 if (target->cur == target->start)
373 return;
374
375 unsigned count = fd_ringbuffer_cmd_count(target);
376
377 for (unsigned i = 0; i < count; i++) {
378 uint32_t dwords;
379 OUT_PKT7(ring, CP_INDIRECT_BUFFER, 3);
380 dwords = fd_ringbuffer_emit_reloc_ring_full(ring, target, i) / 4;
381 assert(dwords > 0);
382 OUT_RING(ring, dwords);
383 }
384 }
385
386 /* CP_SCRATCH_REG4 is used to hold base address for query results: */
387 // XXX annoyingly scratch regs move on a5xx.. and additionally different
388 // packet types.. so freedreno_query_hw is going to need a bit of
389 // rework..
390 #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4
391
392 #ifdef DEBUG
393 #define __EMIT_MARKER 1
394 #else
395 #define __EMIT_MARKER 0
396 #endif
397
398 static inline void
emit_marker(struct fd_ringbuffer * ring,int scratch_idx)399 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
400 {
401 extern int32_t marker_cnt;
402 unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx;
403 assert(reg != HW_QUERY_BASE_REG);
404 if (reg == HW_QUERY_BASE_REG)
405 return;
406 if (__EMIT_MARKER) {
407 OUT_WFI(ring);
408 OUT_PKT0(ring, reg, 1);
409 OUT_RING(ring, p_atomic_inc_return(&marker_cnt));
410 }
411 }
412
413 static inline uint32_t
pack_rgba(enum pipe_format format,const float * rgba)414 pack_rgba(enum pipe_format format, const float *rgba)
415 {
416 union util_color uc;
417 util_pack_color(rgba, format, &uc);
418 return uc.ui[0];
419 }
420
421 /*
422 * swap - swap value of @a and @b
423 */
424 #define swap(a, b) \
425 do { \
426 __typeof(a) __tmp = (a); \
427 (a) = (b); \
428 (b) = __tmp; \
429 } while (0)
430
431 #define BIT(bit) (1u << bit)
432
433 /*
434 * a3xx+ helpers:
435 */
436
437 static inline enum a3xx_msaa_samples
fd_msaa_samples(unsigned samples)438 fd_msaa_samples(unsigned samples)
439 {
440 switch (samples) {
441 default:
442 debug_assert(0);
443 #if defined(NDEBUG) || defined(DEBUG)
444 FALLTHROUGH;
445 #endif
446 case 0:
447 case 1:
448 return MSAA_ONE;
449 case 2:
450 return MSAA_TWO;
451 case 4:
452 return MSAA_FOUR;
453 case 8:
454 return MSAA_EIGHT;
455 }
456 }
457
458 /*
459 * a4xx+ helpers:
460 */
461
462 static inline enum a4xx_state_block
fd4_stage2shadersb(gl_shader_stage type)463 fd4_stage2shadersb(gl_shader_stage type)
464 {
465 switch (type) {
466 case MESA_SHADER_VERTEX:
467 return SB4_VS_SHADER;
468 case MESA_SHADER_FRAGMENT:
469 return SB4_FS_SHADER;
470 case MESA_SHADER_COMPUTE:
471 case MESA_SHADER_KERNEL:
472 return SB4_CS_SHADER;
473 default:
474 unreachable("bad shader type");
475 return (enum a4xx_state_block) ~0;
476 }
477 }
478
479 static inline enum a4xx_index_size
fd4_size2indextype(unsigned index_size)480 fd4_size2indextype(unsigned index_size)
481 {
482 switch (index_size) {
483 case 1:
484 return INDEX4_SIZE_8_BIT;
485 case 2:
486 return INDEX4_SIZE_16_BIT;
487 case 4:
488 return INDEX4_SIZE_32_BIT;
489 }
490 DBG("unsupported index size: %d", index_size);
491 assert(0);
492 return INDEX4_SIZE_32_BIT;
493 }
494
495 #ifdef __cplusplus
496 }
497 #endif
498
499 #endif /* FREEDRENO_UTIL_H_ */
500