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Searched defs:SuperRC (Results 1 – 11 of 11) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSILoadStoreOptimizer.cpp982 const TargetRegisterClass *SuperRC = in mergeRead2Pair() local
1124 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeImagePair() local
1177 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeSBufferLoadImmPair() local
1228 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeBufferLoadPair() local
1290 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeTBufferLoadPair() local
1362 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeTBufferStorePair() local
1524 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeBufferStorePair() local
DSIInstrInfo.cpp3864 const TargetRegisterClass *SuperRC, in buildExtractSubReg()
3897 const TargetRegisterClass *SuperRC, in buildExtractSubRegOrImm()
3936 const TargetRegisterClass *SuperRC = RI.getLargestLegalSuperClass(RC, *MF); in isLegalRegOperand() local
DAMDGPUISelDAGToDAG.cpp596 const TargetRegisterClass *SuperRC = in getOperandRegClass() local
DSIISelLowering.cpp3324 const TargetRegisterClass *SuperRC, in computeIndirectRegAndOffset()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp331 if (const TargetRegisterClass *SuperRC = *RC.getSuperClasses()) in getHexagonSubRegIndex() local
DHexagonCopyToCombine.cpp588 const TargetRegisterClass *SuperRC = nullptr; in combine() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineCopyPropagation.cpp435 const TargetRegisterClass *SuperRC = UseDstRC; in isForwardableRegClassCopy() local
DAggressiveAntiDepBreaker.cpp629 const TargetRegisterClass *SuperRC = in FindSuitableFreeRegisters() local
DRegAllocGreedy.cpp2065 const MachineInstr *MI, unsigned Reg, const TargetRegisterClass *SuperRC, in getNumAllocatableRegsForConstraints()
2105 const TargetRegisterClass *SuperRC = in tryInstructionSplit() local
DTargetLoweringBase.cpp1128 const TargetRegisterClass *SuperRC = TRI->getRegClass(i); in findRepresentativeClass() local
DMachineVerifier.cpp1790 const TargetRegisterClass *SuperRC = in visitMachineOperand() local