| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FixupSetCC.cpp | 105 Register ZeroReg = MRI->createVirtualRegister(RC); in runOnMachineFunction() local
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| D | X86FlagsCopyLowering.cpp | 1054 Register ZeroReg = MRI->createVirtualRegister(&X86::GR32RegClass); in rewriteSetCarryExtended() local
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| D | X86FrameLowering.cpp | 589 ZeroReg = InProlog ? X86::RCX in emitStackProbeInline() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2480 unsigned Opcode, unsigned ZeroReg, in copyGPRRegTuple()
3669 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine()
3698 unsigned MulOpc, unsigned ZeroReg) { in canCombineWithMUL()
3760 MachineCombinerPattern Pattern) { in getMaddPatterns()
4414 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
4458 unsigned SubOpc, ZeroReg; in genAlternativeCodeSequence() local
4506 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
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| D | AArch64ExpandPseudoInsts.cpp | 176 unsigned StlrOp, unsigned CmpOp, unsigned ExtendImm, unsigned ZeroReg, in expandCMP_SWAP()
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| D | AArch64FastISel.cpp | 390 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; in materializeInt() local
4979 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; in selectSDiv() local
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| D | AArch64ISelDAGToDAG.cpp | 2613 unsigned ZeroReg; in tryShiftAmountMod() local
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| D | AArch64ISelLowering.cpp | 11344 unsigned ZeroReg; in replaceZeroVectorStore() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 87 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
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| D | MipsAsmPrinter.cpp | 144 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; in emitPseudoIndirectBranch() local
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| D | MipsSEISelDAGToDAG.cpp | 85 unsigned DstReg = 0, ZeroReg = 0; in replaceUsesWithZeroReg() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | InstructionSelectorImpl.h | 798 int64_t ZeroReg = MatchTable[CurrentIdx++]; in executeMatchTable() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 552 auto ZeroReg = MRI.createVirtualRegister(&ARM::GPRRegClass); in selectCmp() local
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| D | ARMFastISel.cpp | 1489 unsigned ZeroReg = fastMaterializeConstant(Zero); in SelectCmp() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 694 Register ZeroReg = MIRBuilder.buildConstant(SrcTy, 0).getReg(0); in narrowScalar() local
2033 Register ZeroReg = Zero->getOperand(0).getReg(); in lower() local
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| D | IRTranslator.cpp | 2148 Register ZeroReg = getOrCreateVReg(*ZeroVal); in translate() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 1374 unsigned ZeroReg; in FoldImmediate() local
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| D | PPCISelLowering.cpp | 10753 unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitPartwordAtomicBinary() local
11609 Register ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitInstrWithCustomInserter() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2693 unsigned ZeroReg = IsAddress ? ABI.GetNullPtr() : ABI.GetZeroReg(); in loadImmediate() local
4161 unsigned ZeroReg; in expandDivRem() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 6122 Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC()); in convertNonUniformLoopRegion() local
|