1 /*
2 * Copyright (c) 2012
3 * MIPS Technologies, Inc., California.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * Authors: Branimir Vasic (bvasic@mips.com)
30 * Nedeljko Babic (nbabic@mips.com)
31 *
32 * Various AC-3 DSP Utils optimized for MIPS
33 *
34 * This file is part of FFmpeg.
35 *
36 * FFmpeg is free software; you can redistribute it and/or
37 * modify it under the terms of the GNU Lesser General Public
38 * License as published by the Free Software Foundation; either
39 * version 2.1 of the License, or (at your option) any later version.
40 *
41 * FFmpeg is distributed in the hope that it will be useful,
42 * but WITHOUT ANY WARRANTY; without even the implied warranty of
43 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
44 * Lesser General Public License for more details.
45 *
46 * You should have received a copy of the GNU Lesser General Public
47 * License along with FFmpeg; if not, write to the Free Software
48 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
49 */
50
51 /**
52 * @file
53 * Reference: libavcodec/ac3dsp.c
54 */
55
56 #include "config.h"
57 #include "libavcodec/ac3dsp.h"
58 #include "libavcodec/ac3.h"
59 #include "libavutil/mips/asmdefs.h"
60
61 #if HAVE_INLINE_ASM
62 #if HAVE_MIPSDSP
ac3_bit_alloc_calc_bap_mips(int16_t * mask,int16_t * psd,int start,int end,int snr_offset,int floor,const uint8_t * bap_tab,uint8_t * bap)63 static void ac3_bit_alloc_calc_bap_mips(int16_t *mask, int16_t *psd,
64 int start, int end,
65 int snr_offset, int floor,
66 const uint8_t *bap_tab, uint8_t *bap)
67 {
68 int band, band_end, cond;
69 int m, address1, address2;
70 int16_t *psd1, *psd_end;
71 uint8_t *bap1;
72
73 if (snr_offset == -960) {
74 memset(bap, 0, AC3_MAX_COEFS);
75 return;
76 }
77
78 psd1 = &psd[start];
79 bap1 = &bap[start];
80 band = ff_ac3_bin_to_band_tab[start];
81
82 do {
83 m = (FFMAX(mask[band] - snr_offset - floor, 0) & 0x1FE0) + floor;
84 band_end = ff_ac3_band_start_tab[++band];
85 band_end = FFMIN(band_end, end);
86 psd_end = psd + band_end - 1;
87
88 __asm__ volatile (
89 "slt %[cond], %[psd1], %[psd_end] \n\t"
90 "beqz %[cond], 1f \n\t"
91 "2: \n\t"
92 "lh %[address1], 0(%[psd1]) \n\t"
93 "lh %[address2], 2(%[psd1]) \n\t"
94 PTR_ADDIU " %[psd1], %[psd1], 4 \n\t"
95 "subu %[address1], %[address1], %[m] \n\t"
96 "sra %[address1], %[address1], 5 \n\t"
97 "addiu %[address1], %[address1], -32 \n\t"
98 "shll_s.w %[address1], %[address1], 26 \n\t"
99 "subu %[address2], %[address2], %[m] \n\t"
100 "sra %[address2], %[address2], 5 \n\t"
101 "sra %[address1], %[address1], 26 \n\t"
102 "addiu %[address1], %[address1], 32 \n\t"
103 "lbux %[address1], %[address1](%[bap_tab]) \n\t"
104 "addiu %[address2], %[address2], -32 \n\t"
105 "shll_s.w %[address2], %[address2], 26 \n\t"
106 "sb %[address1], 0(%[bap1]) \n\t"
107 "slt %[cond], %[psd1], %[psd_end] \n\t"
108 "sra %[address2], %[address2], 26 \n\t"
109 "addiu %[address2], %[address2], 32 \n\t"
110 "lbux %[address2], %[address2](%[bap_tab]) \n\t"
111 "sb %[address2], 1(%[bap1]) \n\t"
112 PTR_ADDIU " %[bap1], %[bap1], 2 \n\t"
113 "bnez %[cond], 2b \n\t"
114 PTR_ADDIU " %[psd_end], %[psd_end], 2 \n\t"
115 "slt %[cond], %[psd1], %[psd_end] \n\t"
116 "beqz %[cond], 3f \n\t"
117 "1: \n\t"
118 "lh %[address1], 0(%[psd1]) \n\t"
119 PTR_ADDIU " %[psd1], %[psd1], 2 \n\t"
120 "subu %[address1], %[address1], %[m] \n\t"
121 "sra %[address1], %[address1], 5 \n\t"
122 "addiu %[address1], %[address1], -32 \n\t"
123 "shll_s.w %[address1], %[address1], 26 \n\t"
124 "sra %[address1], %[address1], 26 \n\t"
125 "addiu %[address1], %[address1], 32 \n\t"
126 "lbux %[address1], %[address1](%[bap_tab]) \n\t"
127 "sb %[address1], 0(%[bap1]) \n\t"
128 PTR_ADDIU " %[bap1], %[bap1], 1 \n\t"
129 "3: \n\t"
130
131 : [address1]"=&r"(address1), [address2]"=&r"(address2),
132 [cond]"=&r"(cond), [bap1]"+r"(bap1),
133 [psd1]"+r"(psd1), [psd_end]"+r"(psd_end)
134 : [m]"r"(m), [bap_tab]"r"(bap_tab)
135 : "memory"
136 );
137 } while (end > band_end);
138 }
139
ac3_update_bap_counts_mips(uint16_t mant_cnt[16],uint8_t * bap,int len)140 static void ac3_update_bap_counts_mips(uint16_t mant_cnt[16], uint8_t *bap,
141 int len)
142 {
143 void *temp0, *temp2, *temp4, *temp5, *temp6, *temp7;
144 int temp1, temp3;
145
146 __asm__ volatile (
147 "andi %[temp3], %[len], 3 \n\t"
148 PTR_ADDU "%[temp2], %[bap], %[len] \n\t"
149 PTR_ADDU "%[temp4], %[bap], %[temp3] \n\t"
150 "beq %[temp2], %[temp4], 4f \n\t"
151 "1: \n\t"
152 "lbu %[temp0], -1(%[temp2]) \n\t"
153 "lbu %[temp5], -2(%[temp2]) \n\t"
154 "lbu %[temp6], -3(%[temp2]) \n\t"
155 "sll %[temp0], %[temp0], 1 \n\t"
156 PTR_ADDU "%[temp0], %[mant_cnt], %[temp0] \n\t"
157 "sll %[temp5], %[temp5], 1 \n\t"
158 PTR_ADDU "%[temp5], %[mant_cnt], %[temp5] \n\t"
159 "lhu %[temp1], 0(%[temp0]) \n\t"
160 "sll %[temp6], %[temp6], 1 \n\t"
161 PTR_ADDU "%[temp6], %[mant_cnt], %[temp6] \n\t"
162 "addiu %[temp1], %[temp1], 1 \n\t"
163 "sh %[temp1], 0(%[temp0]) \n\t"
164 "lhu %[temp1], 0(%[temp5]) \n\t"
165 "lbu %[temp7], -4(%[temp2]) \n\t"
166 PTR_ADDIU "%[temp2],%[temp2], -4 \n\t"
167 "addiu %[temp1], %[temp1], 1 \n\t"
168 "sh %[temp1], 0(%[temp5]) \n\t"
169 "lhu %[temp1], 0(%[temp6]) \n\t"
170 "sll %[temp7], %[temp7], 1 \n\t"
171 PTR_ADDU "%[temp7], %[mant_cnt], %[temp7] \n\t"
172 "addiu %[temp1], %[temp1],1 \n\t"
173 "sh %[temp1], 0(%[temp6]) \n\t"
174 "lhu %[temp1], 0(%[temp7]) \n\t"
175 "addiu %[temp1], %[temp1], 1 \n\t"
176 "sh %[temp1], 0(%[temp7]) \n\t"
177 "bne %[temp2], %[temp4], 1b \n\t"
178 "4: \n\t"
179 "beqz %[temp3], 2f \n\t"
180 "3: \n\t"
181 "addiu %[temp3], %[temp3], -1 \n\t"
182 "lbu %[temp0], -1(%[temp2]) \n\t"
183 PTR_ADDIU "%[temp2],%[temp2], -1 \n\t"
184 "sll %[temp0], %[temp0], 1 \n\t"
185 PTR_ADDU "%[temp0], %[mant_cnt], %[temp0] \n\t"
186 "lhu %[temp1], 0(%[temp0]) \n\t"
187 "addiu %[temp1], %[temp1], 1 \n\t"
188 "sh %[temp1], 0(%[temp0]) \n\t"
189 "bgtz %[temp3], 3b \n\t"
190 "2: \n\t"
191
192 : [temp0] "=&r" (temp0), [temp1] "=&r" (temp1),
193 [temp2] "=&r" (temp2), [temp3] "=&r" (temp3),
194 [temp4] "=&r" (temp4), [temp5] "=&r" (temp5),
195 [temp6] "=&r" (temp6), [temp7] "=&r" (temp7)
196 : [len] "r" (len), [bap] "r" (bap),
197 [mant_cnt] "r" (mant_cnt)
198 : "memory"
199 );
200 }
201 #endif
202
203 #if HAVE_MIPSFPU
204 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
float_to_fixed24_mips(int32_t * dst,const float * src,unsigned int len)205 static void float_to_fixed24_mips(int32_t *dst, const float *src, unsigned int len)
206 {
207 const float scale = 1 << 24;
208 float src0, src1, src2, src3, src4, src5, src6, src7;
209 int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;
210
211 do {
212 __asm__ volatile (
213 "lwc1 %[src0], 0(%[src]) \n\t"
214 "lwc1 %[src1], 4(%[src]) \n\t"
215 "lwc1 %[src2], 8(%[src]) \n\t"
216 "lwc1 %[src3], 12(%[src]) \n\t"
217 "lwc1 %[src4], 16(%[src]) \n\t"
218 "lwc1 %[src5], 20(%[src]) \n\t"
219 "lwc1 %[src6], 24(%[src]) \n\t"
220 "lwc1 %[src7], 28(%[src]) \n\t"
221 "mul.s %[src0], %[src0], %[scale] \n\t"
222 "mul.s %[src1], %[src1], %[scale] \n\t"
223 "mul.s %[src2], %[src2], %[scale] \n\t"
224 "mul.s %[src3], %[src3], %[scale] \n\t"
225 "mul.s %[src4], %[src4], %[scale] \n\t"
226 "mul.s %[src5], %[src5], %[scale] \n\t"
227 "mul.s %[src6], %[src6], %[scale] \n\t"
228 "mul.s %[src7], %[src7], %[scale] \n\t"
229 "cvt.w.s %[src0], %[src0] \n\t"
230 "cvt.w.s %[src1], %[src1] \n\t"
231 "cvt.w.s %[src2], %[src2] \n\t"
232 "cvt.w.s %[src3], %[src3] \n\t"
233 "cvt.w.s %[src4], %[src4] \n\t"
234 "cvt.w.s %[src5], %[src5] \n\t"
235 "cvt.w.s %[src6], %[src6] \n\t"
236 "cvt.w.s %[src7], %[src7] \n\t"
237 "mfc1 %[temp0], %[src0] \n\t"
238 "mfc1 %[temp1], %[src1] \n\t"
239 "mfc1 %[temp2], %[src2] \n\t"
240 "mfc1 %[temp3], %[src3] \n\t"
241 "mfc1 %[temp4], %[src4] \n\t"
242 "mfc1 %[temp5], %[src5] \n\t"
243 "mfc1 %[temp6], %[src6] \n\t"
244 "mfc1 %[temp7], %[src7] \n\t"
245 "sw %[temp0], 0(%[dst]) \n\t"
246 "sw %[temp1], 4(%[dst]) \n\t"
247 "sw %[temp2], 8(%[dst]) \n\t"
248 "sw %[temp3], 12(%[dst]) \n\t"
249 "sw %[temp4], 16(%[dst]) \n\t"
250 "sw %[temp5], 20(%[dst]) \n\t"
251 "sw %[temp6], 24(%[dst]) \n\t"
252 "sw %[temp7], 28(%[dst]) \n\t"
253
254 : [dst] "+r" (dst), [src] "+r" (src),
255 [src0] "=&f" (src0), [src1] "=&f" (src1),
256 [src2] "=&f" (src2), [src3] "=&f" (src3),
257 [src4] "=&f" (src4), [src5] "=&f" (src5),
258 [src6] "=&f" (src6), [src7] "=&f" (src7),
259 [temp0] "=r" (temp0), [temp1] "=r" (temp1),
260 [temp2] "=r" (temp2), [temp3] "=r" (temp3),
261 [temp4] "=r" (temp4), [temp5] "=r" (temp5),
262 [temp6] "=r" (temp6), [temp7] "=r" (temp7)
263 : [scale] "f" (scale)
264 : "memory"
265 );
266 src = src + 8;
267 dst = dst + 8;
268 len -= 8;
269 } while (len > 0);
270 }
271
ac3_downmix_mips(float ** samples,float (* matrix)[2],int out_ch,int in_ch,int len)272 static void ac3_downmix_mips(float **samples, float (*matrix)[2],
273 int out_ch, int in_ch, int len)
274 {
275 int i, j, i1, i2, i3;
276 float v0, v1, v2, v3;
277 float v4, v5, v6, v7;
278 float samples0, samples1, samples2, samples3, matrix_j, matrix_j2;
279 float *samples_p, *samples_sw, *matrix_p, **samples_x, **samples_end;
280
281 __asm__ volatile(
282 ".set push \n\t"
283 ".set noreorder \n\t"
284
285 "li %[i1], 2 \n\t"
286 "sll %[len], 2 \n\t"
287 "move %[i], $zero \n\t"
288 "sll %[j], %[in_ch], " PTRLOG " \n\t"
289
290 "bne %[out_ch], %[i1], 3f \n\t" // if (out_ch == 2)
291 " li %[i2], 1 \n\t"
292
293 "2: \n\t" // start of the for loop (for (i = 0; i < len; i+=4))
294 "move %[matrix_p], %[matrix] \n\t"
295 "move %[samples_x], %[samples] \n\t"
296 "mtc1 $zero, %[v0] \n\t"
297 "mtc1 $zero, %[v1] \n\t"
298 "mtc1 $zero, %[v2] \n\t"
299 "mtc1 $zero, %[v3] \n\t"
300 "mtc1 $zero, %[v4] \n\t"
301 "mtc1 $zero, %[v5] \n\t"
302 "mtc1 $zero, %[v6] \n\t"
303 "mtc1 $zero, %[v7] \n\t"
304 "addiu %[i1], %[i], 4 \n\t"
305 "addiu %[i2], %[i], 8 \n\t"
306 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
307 "addiu %[i3], %[i], 12 \n\t"
308 PTR_ADDU "%[samples_end],%[samples_x], %[j] \n\t"
309 "move %[samples_sw], %[samples_p] \n\t"
310
311 "1: \n\t" // start of the inner for loop (for (j = 0; j < in_ch; j++))
312 "lwc1 %[matrix_j], 0(%[matrix_p]) \n\t"
313 "lwc1 %[matrix_j2], 4(%[matrix_p]) \n\t"
314 "lwxc1 %[samples0], %[i](%[samples_p]) \n\t"
315 "lwxc1 %[samples1], %[i1](%[samples_p]) \n\t"
316 "lwxc1 %[samples2], %[i2](%[samples_p]) \n\t"
317 "lwxc1 %[samples3], %[i3](%[samples_p]) \n\t"
318 PTR_ADDIU "%[matrix_p], 8 \n\t"
319 PTR_ADDIU "%[samples_x]," PTRSIZE " \n\t"
320 "madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t"
321 "madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t"
322 "madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t"
323 "madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t"
324 "madd.s %[v4], %[v4], %[samples0], %[matrix_j2]\n\t"
325 "madd.s %[v5], %[v5], %[samples1], %[matrix_j2]\n\t"
326 "madd.s %[v6], %[v6], %[samples2], %[matrix_j2]\n\t"
327 "madd.s %[v7], %[v7], %[samples3], %[matrix_j2]\n\t"
328 "bne %[samples_x], %[samples_end], 1b \n\t"
329 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
330
331 PTR_L " %[samples_p], " PTRSIZE "(%[samples]) \n\t"
332 "swxc1 %[v0], %[i](%[samples_sw]) \n\t"
333 "swxc1 %[v1], %[i1](%[samples_sw]) \n\t"
334 "swxc1 %[v2], %[i2](%[samples_sw]) \n\t"
335 "swxc1 %[v3], %[i3](%[samples_sw]) \n\t"
336 "swxc1 %[v4], %[i](%[samples_p]) \n\t"
337 "addiu %[i], 16 \n\t"
338 "swxc1 %[v5], %[i1](%[samples_p]) \n\t"
339 "swxc1 %[v6], %[i2](%[samples_p]) \n\t"
340 "bne %[i], %[len], 2b \n\t"
341 " swxc1 %[v7], %[i3](%[samples_p]) \n\t"
342
343 "3: \n\t"
344 "bne %[out_ch], %[i2], 6f \n\t" // if (out_ch == 1)
345 " nop \n\t"
346
347 "5: \n\t" // start of the outer for loop (for (i = 0; i < len; i+=4))
348 "move %[matrix_p], %[matrix] \n\t"
349 "move %[samples_x], %[samples] \n\t"
350 "mtc1 $zero, %[v0] \n\t"
351 "mtc1 $zero, %[v1] \n\t"
352 "mtc1 $zero, %[v2] \n\t"
353 "mtc1 $zero, %[v3] \n\t"
354 "addiu %[i1], %[i], 4 \n\t"
355 "addiu %[i2], %[i], 8 \n\t"
356 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
357 "addiu %[i3], %[i], 12 \n\t"
358 PTR_ADDU "%[samples_end],%[samples_x], %[j] \n\t"
359 "move %[samples_sw], %[samples_p] \n\t"
360
361 "4: \n\t" // start of the inner for loop (for (j = 0; j < in_ch; j++))
362 "lwc1 %[matrix_j], 0(%[matrix_p]) \n\t"
363 "lwxc1 %[samples0], %[i](%[samples_p]) \n\t"
364 "lwxc1 %[samples1], %[i1](%[samples_p]) \n\t"
365 "lwxc1 %[samples2], %[i2](%[samples_p]) \n\t"
366 "lwxc1 %[samples3], %[i3](%[samples_p]) \n\t"
367 PTR_ADDIU "%[matrix_p], 8 \n\t"
368 PTR_ADDIU "%[samples_x]," PTRSIZE " \n\t"
369 "madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t"
370 "madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t"
371 "madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t"
372 "madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t"
373 "bne %[samples_x], %[samples_end], 4b \n\t"
374 PTR_L " %[samples_p], 0(%[samples_x]) \n\t"
375
376 "swxc1 %[v0], %[i](%[samples_sw]) \n\t"
377 "addiu %[i], 16 \n\t"
378 "swxc1 %[v1], %[i1](%[samples_sw]) \n\t"
379 "swxc1 %[v2], %[i2](%[samples_sw]) \n\t"
380 "bne %[i], %[len], 5b \n\t"
381 " swxc1 %[v3], %[i3](%[samples_sw]) \n\t"
382 "6: \n\t"
383
384 ".set pop"
385 :[samples_p]"=&r"(samples_p), [matrix_j]"=&f"(matrix_j), [matrix_j2]"=&f"(matrix_j2),
386 [samples0]"=&f"(samples0), [samples1]"=&f"(samples1),
387 [samples2]"=&f"(samples2), [samples3]"=&f"(samples3),
388 [v0]"=&f"(v0), [v1]"=&f"(v1), [v2]"=&f"(v2), [v3]"=&f"(v3),
389 [v4]"=&f"(v4), [v5]"=&f"(v5), [v6]"=&f"(v6), [v7]"=&f"(v7),
390 [samples_x]"=&r"(samples_x), [matrix_p]"=&r"(matrix_p),
391 [samples_end]"=&r"(samples_end), [samples_sw]"=&r"(samples_sw),
392 [i1]"=&r"(i1), [i2]"=&r"(i2), [i3]"=&r"(i3), [i]"=&r"(i),
393 [j]"=&r"(j), [len]"+r"(len)
394 :[samples]"r"(samples), [matrix]"r"(matrix),
395 [in_ch]"r"(in_ch), [out_ch]"r"(out_ch)
396 :"memory"
397 );
398 }
399 #endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
400 #endif /* HAVE_MIPSFPU */
401 #endif /* HAVE_INLINE_ASM */
402
ff_ac3dsp_init_mips(AC3DSPContext * c,int bit_exact)403 void ff_ac3dsp_init_mips(AC3DSPContext *c, int bit_exact) {
404 #if HAVE_INLINE_ASM
405 #if HAVE_MIPSDSP
406 c->bit_alloc_calc_bap = ac3_bit_alloc_calc_bap_mips;
407 c->update_bap_counts = ac3_update_bap_counts_mips;
408 #endif
409 #if HAVE_MIPSFPU
410 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
411 c->float_to_fixed24 = float_to_fixed24_mips;
412 //c->downmix = ac3_downmix_mips;
413 #endif
414 #endif
415
416 #endif
417 }
418