1 /*
2 * Copyright (c) 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdlib.h>
25 #include <math.h>
26
27 #include "util/macros.h"
28 #include "main/macros.h"
29 #include "compiler/shader_enums.h"
30
31 #include "intel_l3_config.h"
32
33 /**
34 * The following diagram shows how we partition the URB:
35 *
36 * 16kb or 32kb Rest of the URB space
37 * __________-__________ _________________-_________________
38 * / \ / \
39 * +-------------------------------------------------------------+
40 * | VS/HS/DS/GS/FS Push | VS/HS/DS/GS URB |
41 * | Constants | Entries |
42 * +-------------------------------------------------------------+
43 *
44 * Push constants must be stored at the beginning of the URB space,
45 * while URB entries can be stored anywhere. We choose to lay them
46 * out in pipeline order (VS -> HS -> DS -> GS).
47 */
48
49 /**
50 * Decide how to partition the URB among the various stages.
51 *
52 * \param[in] push_constant_bytes - space allocate for push constants.
53 * \param[in] urb_size_bytes - total size of the URB (from L3 config).
54 * \param[in] tess_present - are tessellation shaders active?
55 * \param[in] gs_present - are geometry shaders active?
56 * \param[in] entry_size - the URB entry size (from the shader compiler)
57 * \param[out] entries - the number of URB entries for each stage
58 * \param[out] start - the starting offset for each stage
59 * \param[out] deref_block_size - deref block size for 3DSTATE_SF
60 * \param[out] constrained - true if we wanted more space than we had
61 */
62 void
intel_get_urb_config(const struct intel_device_info * devinfo,const struct intel_l3_config * l3_cfg,bool tess_present,bool gs_present,const unsigned entry_size[4],unsigned entries[4],unsigned start[4],enum intel_urb_deref_block_size * deref_block_size,bool * constrained)63 intel_get_urb_config(const struct intel_device_info *devinfo,
64 const struct intel_l3_config *l3_cfg,
65 bool tess_present, bool gs_present,
66 const unsigned entry_size[4],
67 unsigned entries[4], unsigned start[4],
68 enum intel_urb_deref_block_size *deref_block_size,
69 bool *constrained)
70 {
71 unsigned urb_size_kB = intel_get_l3_config_urb_size(devinfo, l3_cfg);
72
73 /* RCU_MODE register for Gfx12+ in BSpec says:
74 *
75 * "HW reserves 4KB of URB space per bank for Compute Engine out of the
76 * total storage available in L3. SW must consider that 4KB of storage
77 * per bank will be reduced from what is programmed for the URB space
78 * in L3 for Render Engine executed workloads.
79 *
80 * Example: When URB space programmed is 64KB (per bank) for Render
81 * Engine, the actual URB space available for operation is only 60KB
82 * (per bank). Similarly when URB space programmed is 128KB (per bank)
83 * for render engine, the actual URB space available for operation is
84 * only 124KB (per bank). More detailed descripton available in "L3
85 * Cache" section of the B-Spec."
86 */
87 if (devinfo->ver >= 12)
88 urb_size_kB -= 4 * devinfo->l3_banks;
89
90 const unsigned push_constant_kB = devinfo->max_constant_urb_size_kb;
91
92 const bool active[4] = { true, tess_present, tess_present, gs_present };
93
94 /* URB allocations must be done in 8k chunks. */
95 const unsigned chunk_size_kB = 8;
96 const unsigned chunk_size_bytes = chunk_size_kB * 1024;
97
98 const unsigned push_constant_chunks = push_constant_kB / chunk_size_kB;
99 const unsigned urb_chunks = urb_size_kB / chunk_size_kB;
100
101 /* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS):
102 *
103 * VS Number of URB Entries must be divisible by 8 if the VS URB Entry
104 * Allocation Size is less than 9 512-bit URB entries.
105 *
106 * Similar text exists for HS, DS and GS.
107 */
108 unsigned granularity[4];
109 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
110 granularity[i] = (entry_size[i] < 9) ? 8 : 1;
111 }
112
113 unsigned min_entries[4] = {
114 /* VS has a lower limit on the number of URB entries.
115 *
116 * From the Broadwell PRM, 3DSTATE_URB_VS instruction:
117 * "When tessellation is enabled, the VS Number of URB Entries must be
118 * greater than or equal to 192."
119 */
120 [MESA_SHADER_VERTEX] = tess_present && devinfo->ver == 8 ?
121 192 : devinfo->urb.min_entries[MESA_SHADER_VERTEX],
122
123 /* There are two constraints on the minimum amount of URB space we can
124 * allocate:
125 *
126 * (1) We need room for at least 2 URB entries, since we always operate
127 * the GS in DUAL_OBJECT mode.
128 *
129 * (2) We can't allocate less than nr_gs_entries_granularity.
130 */
131 [MESA_SHADER_GEOMETRY] = gs_present ? 2 : 0,
132
133 [MESA_SHADER_TESS_CTRL] = tess_present ? 1 : 0,
134
135 [MESA_SHADER_TESS_EVAL] = tess_present ?
136 devinfo->urb.min_entries[MESA_SHADER_TESS_EVAL] : 0,
137 };
138
139 /* Min VS Entries isn't a multiple of 8 on Cherryview/Broxton; round up.
140 * Round them all up.
141 */
142 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
143 min_entries[i] = ALIGN(min_entries[i], granularity[i]);
144 }
145
146 unsigned entry_size_bytes[4];
147 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
148 entry_size_bytes[i] = 64 * entry_size[i];
149 }
150
151 /* Initially, assign each stage the minimum amount of URB space it needs,
152 * and make a note of how much additional space it "wants" (the amount of
153 * additional space it could actually make use of).
154 */
155 unsigned chunks[4];
156 unsigned wants[4];
157 unsigned total_needs = push_constant_chunks;
158 unsigned total_wants = 0;
159
160 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
161 if (active[i]) {
162 chunks[i] = DIV_ROUND_UP(min_entries[i] * entry_size_bytes[i],
163 chunk_size_bytes);
164
165 wants[i] =
166 DIV_ROUND_UP(devinfo->urb.max_entries[i] * entry_size_bytes[i],
167 chunk_size_bytes) - chunks[i];
168 } else {
169 chunks[i] = 0;
170 wants[i] = 0;
171 }
172
173 total_needs += chunks[i];
174 total_wants += wants[i];
175 }
176
177 assert(total_needs <= urb_chunks);
178
179 *constrained = total_needs + total_wants > urb_chunks;
180
181 /* Mete out remaining space (if any) in proportion to "wants". */
182 unsigned remaining_space = MIN2(urb_chunks - total_needs, total_wants);
183
184 if (remaining_space > 0) {
185 for (int i = MESA_SHADER_VERTEX;
186 total_wants > 0 && i <= MESA_SHADER_TESS_EVAL; i++) {
187 unsigned additional = (unsigned)
188 roundf(wants[i] * (((float) remaining_space) / total_wants));
189 chunks[i] += additional;
190 remaining_space -= additional;
191 total_wants -= wants[i];
192 }
193
194 chunks[MESA_SHADER_GEOMETRY] += remaining_space;
195 }
196
197 /* Sanity check that we haven't over-allocated. */
198 unsigned total_chunks = push_constant_chunks;
199 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
200 total_chunks += chunks[i];
201 }
202 assert(total_chunks <= urb_chunks);
203
204 /* Finally, compute the number of entries that can fit in the space
205 * allocated to each stage.
206 */
207 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
208 entries[i] = chunks[i] * chunk_size_bytes / entry_size_bytes[i];
209
210 /* Since we rounded up when computing wants[], this may be slightly
211 * more than the maximum allowed amount, so correct for that.
212 */
213 entries[i] = MIN2(entries[i], devinfo->urb.max_entries[i]);
214
215 /* Ensure that we program a multiple of the granularity. */
216 entries[i] = ROUND_DOWN_TO(entries[i], granularity[i]);
217
218 /* Finally, sanity check to make sure we have at least the minimum
219 * number of entries needed for each stage.
220 */
221 assert(entries[i] >= min_entries[i]);
222 }
223
224 /* Lay out the URB in pipeline order: push constants, VS, HS, DS, GS. */
225 int next = push_constant_chunks;
226 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
227 if (entries[i]) {
228 start[i] = next;
229 next += chunks[i];
230 } else {
231 /* Just put disabled stages at the beginning. */
232 start[i] = 0;
233 }
234 }
235
236 if (deref_block_size) {
237 if (devinfo->ver >= 12) {
238 /* From the Gfx12 BSpec:
239 *
240 * "Deref Block size depends on the last enabled shader and number
241 * of handles programmed for that shader
242 *
243 * 1) For GS last shader enabled cases, the deref block is
244 * always set to a per poly(within hardware)
245 *
246 * If the last enabled shader is VS or DS.
247 *
248 * 1) If DS is last enabled shader then if the number of DS
249 * handles is less than 324, need to set per poly deref.
250 *
251 * 2) If VS is last enabled shader then if the number of VS
252 * handles is less than 192, need to set per poly deref"
253 *
254 * The default is 32 so we assume that's the right choice if we're
255 * not in one of the explicit cases listed above.
256 */
257 if (gs_present) {
258 *deref_block_size = INTEL_URB_DEREF_BLOCK_SIZE_PER_POLY;
259 } else if (tess_present) {
260 if (entries[MESA_SHADER_TESS_EVAL] < 324)
261 *deref_block_size = INTEL_URB_DEREF_BLOCK_SIZE_PER_POLY;
262 else
263 *deref_block_size = INTEL_URB_DEREF_BLOCK_SIZE_32;
264 } else {
265 if (entries[MESA_SHADER_VERTEX] < 192)
266 *deref_block_size = INTEL_URB_DEREF_BLOCK_SIZE_PER_POLY;
267 else
268 *deref_block_size = INTEL_URB_DEREF_BLOCK_SIZE_32;
269 }
270 } else {
271 *deref_block_size = 0;
272 }
273 }
274 }
275