| /third_party/skia/third_party/externals/angle2/src/common/spirv/ |
| D | spirv_instruction_builder_autogen.cpp | 1350 IdRef operand1, in WriteIAdd()
1364 IdRef operand1, in WriteFAdd()
1378 IdRef operand1, in WriteISub()
1392 IdRef operand1, in WriteFSub()
1406 IdRef operand1, in WriteIMul()
1420 IdRef operand1, in WriteFMul()
1434 IdRef operand1, in WriteUDiv()
1448 IdRef operand1, in WriteSDiv()
1462 IdRef operand1, in WriteFDiv()
1476 IdRef operand1, in WriteUMod()
[all …]
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| D | spirv_instruction_parser_autogen.cpp | 1643 IdRef *operand1, in ParseIAdd()
1659 IdRef *operand1, in ParseFAdd()
1675 IdRef *operand1, in ParseISub()
1691 IdRef *operand1, in ParseFSub()
1707 IdRef *operand1, in ParseIMul()
1723 IdRef *operand1, in ParseFMul()
1739 IdRef *operand1, in ParseUDiv()
1755 IdRef *operand1, in ParseSDiv()
1771 IdRef *operand1, in ParseFDiv()
1787 IdRef *operand1, in ParseUMod()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| D | ir_builder.h | 74 Instruction* AddUnaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1) { in AddUnaryOp()
88 Instruction* AddBinaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddBinaryOp()
104 Instruction* AddTernaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddTernaryOp()
121 Instruction* AddQuadOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddQuadOp()
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| /third_party/skia/third_party/externals/spirv-tools/source/opt/ |
| D | ir_builder.h | 74 Instruction* AddUnaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1) { in AddUnaryOp()
88 Instruction* AddBinaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddBinaryOp()
104 Instruction* AddTernaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddTernaryOp()
121 Instruction* AddQuadOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddQuadOp()
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| /third_party/spirv-tools/source/opt/ |
| D | ir_builder.h | 74 Instruction* AddUnaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1) { in AddUnaryOp()
88 Instruction* AddBinaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddBinaryOp()
104 Instruction* AddTernaryOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddTernaryOp()
121 Instruction* AddQuadOp(uint32_t type_id, SpvOp opcode, uint32_t operand1, in AddQuadOp()
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| /third_party/skia/third_party/externals/spirv-tools/source/fuzz/ |
| D | fuzzer_pass_wrap_vector_synonym.cpp | 60 opt::Instruction* operand1 = GetIRContext()->get_def_use_mgr()->GetDef( in Apply() local
|
| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/fuzz/ |
| D | fuzzer_pass_wrap_vector_synonym.cpp | 60 opt::Instruction* operand1 = GetIRContext()->get_def_use_mgr()->GetDef( in Apply() local
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| /third_party/libunwind/src/dwarf/ |
| D | Gexpr.c | 199 unw_word_t operand1; in dwarf_stack_aligned() local
243 unw_word_t operand1 = 0, operand2 = 0, tmp1, tmp2 = 0, tmp3, end_addr; in dwarf_eval_expr() local
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| /third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
| D | spirv_builder.c | 506 SpvId operand0, SpvId operand1) in spirv_builder_emit_binop()
520 SpvId operand0, SpvId operand1, SpvId operand2) in spirv_builder_emit_triop()
535 SpvId operand0, SpvId operand1, SpvId operand2, SpvId operand3) in spirv_builder_emit_quadop()
551 SpvId operand0, SpvId operand1, SpvId operand2, SpvId operand3, in spirv_builder_emit_hexop()
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| /third_party/typescript/tests/cases/conformance/parser/ecmascript5/ |
| D | parserRealSource11.ts | 553 constructor (nodeType: NodeType, public operand1: AST, public operand2: AST) { property in BinaryExpression
708 constructor (public operand1: AST, property in ConditionalExpression
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| /third_party/mesa3d/src/intel/common/ |
| D | mi_builder.h | 701 _mi_pack_alu(uint32_t opcode, uint32_t operand1, uint32_t operand2) in _mi_pack_alu()
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| /third_party/typescript/tests/baselines/reference/ |
| D | parserRealSource11.js | 2906 function BinaryExpression(nodeType, operand1, operand2) { argument
3059 function ConditionalExpression(operand1, operand2, operand3) { argument
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| /third_party/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_defines.h | 1463 #define MI_MATH_ALU2(opcode, operand1, operand2) \ argument
1467 #define MI_MATH_ALU1(opcode, operand1) \ argument
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| /third_party/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 1491 VGPU10OperandToken1 operand1; in emit_src_register() local
|