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/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
Drtw8723d_table.c10 0x020, 0x00000013,
11 0x02F, 0x00000010,
12 0x077, 0x00000007,
13 0x421, 0x0000000F,
14 0x428, 0x0000000A,
15 0x429, 0x00000010,
16 0x430, 0x00000000,
17 0x431, 0x00000000,
18 0x432, 0x00000000,
19 0x433, 0x00000001,
[all …]
Drtw8822c_table.c16 0x80000015, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
Drtw8821c_table.c10 0x010, 0x00000043,
11 0x025, 0x0000001D,
12 0x026, 0x000000CE,
13 0x04F, 0x00000001,
14 0x029, 0x000000F9,
15 0x420, 0x00000080,
16 0x421, 0x0000000F,
17 0x428, 0x0000000A,
18 0x429, 0x00000010,
19 0x430, 0x00000000,
[all …]
/kernel/linux/linux-5.10/sound/pci/oxygen/
Dwm8776.h14 #define WM8776_HPLVOL 0x00
15 #define WM8776_HPRVOL 0x01
16 #define WM8776_HPMASTER 0x02
17 #define WM8776_DACLVOL 0x03
18 #define WM8776_DACRVOL 0x04
19 #define WM8776_DACMASTER 0x05
20 #define WM8776_PHASESWAP 0x06
21 #define WM8776_DACCTRL1 0x07
22 #define WM8776_DACMUTE 0x08
23 #define WM8776_DACCTRL2 0x09
[all …]
Dwm8766.h5 #define WM8766_LDA1 0x00
6 #define WM8766_RDA1 0x01
7 #define WM8766_DAC_CTRL 0x02
8 #define WM8766_INT_CTRL 0x03
9 #define WM8766_LDA2 0x04
10 #define WM8766_RDA2 0x05
11 #define WM8766_LDA3 0x06
12 #define WM8766_RDA3 0x07
13 #define WM8766_MASTDA 0x08
14 #define WM8766_DAC_CTRL2 0x09
[all …]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-qmp.h10 #define QSERDES_COM_BG_TIMER 0x00c
11 #define QSERDES_COM_SSC_EN_CENTER 0x010
12 #define QSERDES_COM_SSC_ADJ_PER1 0x014
13 #define QSERDES_COM_SSC_ADJ_PER2 0x018
14 #define QSERDES_COM_SSC_PER1 0x01c
15 #define QSERDES_COM_SSC_PER2 0x020
16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024
17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028
18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034
19 #define QSERDES_COM_CLK_ENABLE1 0x038
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dhdagf119.c30 const u32 hoff = 0x800 * head; in gf119_hda_device_entry()
31 nvkm_mask(device, 0x616548 + hoff, 0x00000070, head << 4); in gf119_hda_device_entry()
38 const u32 soff = 0x030 * ior->id + (head * 0x04); in gf119_hda_eld()
41 for (i = 0; i < size; i++) in gf119_hda_eld()
42 nvkm_wr32(device, 0x10ec00 + soff, (i << 8) | data[i]); in gf119_hda_eld()
43 for (; i < 0x60; i++) in gf119_hda_eld()
44 nvkm_wr32(device, 0x10ec00 + soff, (i << 8)); in gf119_hda_eld()
45 nvkm_mask(device, 0x10ec10 + soff, 0x80000002, 0x80000002); in gf119_hda_eld()
52 const u32 soff = 0x030 * ior->id + (head * 0x04); in gf119_hda_hpd()
53 u32 data = 0x80000000; in gf119_hda_hpd()
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/
Dmips-cpc.h33 * Attempt to detect the presence of a Cluster Power Controller. Returns 0 if
60 #define MIPS_CPC_GCB_OFS 0x0000
61 #define MIPS_CPC_CLCB_OFS 0x2000
62 #define MIPS_CPC_COCB_OFS 0x4000
81 CPC_ACCESSOR_RW(32, 0x000, access)
84 CPC_ACCESSOR_RW(32, 0x008, seqdel)
87 CPC_ACCESSOR_RW(32, 0x010, rail)
90 CPC_ACCESSOR_RW(32, 0x018, resetlen)
93 CPC_ACCESSOR_RO(32, 0x020, revision)
96 CPC_ACCESSOR_RW(32, 0x030, pwrup_ctl)
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/omap3isp/
Dispreg.h21 #define ISP_REVISION (0x000)
22 #define ISP_SYSCONFIG (0x004)
23 #define ISP_SYSSTATUS (0x008)
24 #define ISP_IRQ0ENABLE (0x00C)
25 #define ISP_IRQ0STATUS (0x010)
26 #define ISP_IRQ1ENABLE (0x014)
27 #define ISP_IRQ1STATUS (0x018)
28 #define ISP_TCTRL_GRESET_LENGTH (0x030)
29 #define ISP_TCTRL_PSTRB_REPLAY (0x034)
30 #define ISP_CTRL (0x040)
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-vexpress/
Dv2m.c8 #define SYS_FLAGSSET 0x030
9 #define SYS_FLAGSCLR 0x034
19 base = of_iomap(node, 0); in vexpress_flags_set()
25 writel(~0, base + SYS_FLAGSCLR); in vexpress_flags_set()
36 .l2c_aux_val = 0x00400000,
37 .l2c_aux_mask = 0xfe0fffff,
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Dvirtio_mmio.h8 #define VIRTIO_MMIO_MAGIC_VALUE 0x000
9 #define VIRTIO_MMIO_VERSION 0x004
10 #define VIRTIO_MMIO_DEVICE_ID 0x008
11 #define VIRTIO_MMIO_VENDOR_ID 0x00c
12 #define VIRTIO_MMIO_DEVICE_FEATURES 0x010
13 #define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x014
14 #define VIRTIO_MMIO_DRIVER_FEATURES 0x020
15 #define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x024
17 #define VIRTIO_MMIO_GUEST_PAGE_SIZE 0x028
19 #define VIRTIO_MMIO_QUEUE_SEL 0x030
[all …]
/kernel/linux/linux-5.10/arch/c6x/platforms/
Dtimer64.c34 #define TCR_TSTATLO 0x001
35 #define TCR_INVOUTPLO 0x002
36 #define TCR_INVINPLO 0x004
37 #define TCR_CPLO 0x008
38 #define TCR_ENAMODELO_ONCE 0x040
39 #define TCR_ENAMODELO_CONT 0x080
40 #define TCR_ENAMODELO_MASK 0x0c0
41 #define TCR_PWIDLO_MASK 0x030
42 #define TCR_CLKSRCLO 0x100
43 #define TCR_TIENLO 0x200
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/ast/
Dast_dram_tables.h12 { 0x0108, 0x00000000 },
13 { 0x0120, 0x00004a21 },
14 { 0xFF00, 0x00000043 },
15 { 0x0000, 0xFFFFFFFF },
16 { 0x0004, 0x00000089 },
17 { 0x0008, 0x22331353 },
18 { 0x000C, 0x0d07000b },
19 { 0x0010, 0x11113333 },
20 { 0x0020, 0x00110350 },
21 { 0x0028, 0x1e0828f0 },
[all …]
/kernel/linux/linux-5.10/include/linux/amba/
Dsp810.h18 #define SCCTRL 0x000
19 #define SCSYSSTAT 0x004
20 #define SCIMCTRL 0x008
21 #define SCIMSTAT 0x00C
22 #define SCXTALCTRL 0x010
23 #define SCPLLCTRL 0x014
24 #define SCPLLFCTRL 0x018
25 #define SCPERCTRL0 0x01C
26 #define SCPERCTRL1 0x020
27 #define SCPEREN 0x024
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dregs-irq-s3c24xx.h19 #define S3C2410_SRCPND S3C2410_IRQREG(0x000)
20 #define S3C2410_INTMOD S3C2410_IRQREG(0x004)
21 #define S3C2410_INTMSK S3C2410_IRQREG(0x008)
22 #define S3C2410_PRIORITY S3C2410_IRQREG(0x00C)
23 #define S3C2410_INTPND S3C2410_IRQREG(0x010)
24 #define S3C2410_INTOFFSET S3C2410_IRQREG(0x014)
25 #define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018)
26 #define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C)
28 #define S3C2416_PRIORITY_MODE1 S3C2410_IRQREG(0x030)
29 #define S3C2416_PRIORITY_UPDATE1 S3C2410_IRQREG(0x034)
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/samsung/
Dpinctrl-s3c24xx.c28 #define EINTPEND_REG 0xa8
29 #define EINTMASK_REG 0xa4
32 #define EINT_REG(i) ((EINT_GROUP(i) * 4) + 0x88)
35 #define EINT_LEVEL_LOW 0
40 #define EINT_MASK 0xf
44 .reg_offset = { 0x00, 0x04, },
49 .reg_offset = { 0x00, 0x04, 0x08, },
98 * @eint0_3_parent_only: live eints 0-3 only in the main intc
174 if (trigger < 0) { in s3c24xx_eint_type()
192 return 0; in s3c24xx_eint_type()
[all …]
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
Dclk-hi3670.c17 { HI3670_CLKIN_SYS, "clkin_sys", NULL, 0, 19200000, },
18 { HI3670_CLKIN_REF, "clkin_ref", NULL, 0, 32764, },
19 { HI3670_CLK_FLL_SRC, "clk_fll_src", NULL, 0, 134400000, },
20 { HI3670_CLK_PPLL0, "clk_ppll0", NULL, 0, 1660000000, },
21 { HI3670_CLK_PPLL1, "clk_ppll1", NULL, 0, 1866000000, },
22 { HI3670_CLK_PPLL2, "clk_ppll2", NULL, 0, 1920000000, },
23 { HI3670_CLK_PPLL3, "clk_ppll3", NULL, 0, 1200000000, },
24 { HI3670_CLK_PPLL4, "clk_ppll4", NULL, 0, 900000000, },
25 { HI3670_CLK_PPLL6, "clk_ppll6", NULL, 0, 393216000, },
26 { HI3670_CLK_PPLL7, "clk_ppll7", NULL, 0, 1008000000, },
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey970-pinctrl.dtsi16 reg = <0x0 0xe896c000 0x0 0x72c>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
22 pinctrl-single,gpio-range = <&range 0 82 0>;
26 0x054 MUX_M2 /* UART0_RXD */
27 0x058 MUX_M2 /* UART0_TXD */
33 0x700 MUX_M2 /* UART2_CTS_N */
34 0x704 MUX_M2 /* UART2_RTS_N */
35 0x708 MUX_M2 /* UART2_RXD */
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/rkvdec/
Drkvdec-regs.h7 #define RKVDEC_REG_INTERRUPT 0x004
8 #define RKVDEC_INTERRUPT_DEC_E BIT(0)
32 #define RKVDEC_REG_SYSCTRL 0x008
33 #define RKVDEC_IN_ENDIAN BIT(0)
44 #define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12)
45 #define RKVDEC_MODE(x) (((x) & 0x03) << 20)
55 #define RKVDEC_REG_PICPAR 0x00C
56 #define RKVDEC_Y_HOR_VIRSTRIDE(x) ((x) & 0x1ff)
58 #define RKVDEC_UV_HOR_VIRSTRIDE(x) (((x) & 0x1ff) << 12)
59 #define RKVDEC_SLICE_NUM_LOWBITS(x) (((x) & 0x7ff) << 21)
[all …]
/kernel/linux/linux-5.10/drivers/dma/dw-axi-dmac/
Ddw-axi-dmac.h23 #define DMAC_MAX_BLK_SIZE 0x200000
117 #define COMMON_REG_LEN 0x100
118 #define CHAN_REG_LEN 0x100
121 #define DMAC_ID 0x000 /* R DMAC ID */
122 #define DMAC_COMPVER 0x008 /* R DMAC Component Version */
123 #define DMAC_CFG 0x010 /* R/W DMAC Configuration */
124 #define DMAC_CHEN 0x018 /* R/W DMAC Channel Enable */
125 #define DMAC_CHEN_L 0x018 /* R/W DMAC Channel Enable 00-31 */
126 #define DMAC_CHEN_H 0x01C /* R/W DMAC Channel Enable 32-63 */
127 #define DMAC_INTSTATUS 0x030 /* R DMAC Interrupt Status */
[all …]
/kernel/linux/linux-5.10/arch/m68k/ifpsp060/
Disp.doc112 bra _060ISP_TOP+128+0
116 point is located 0 bytes from the top of the "Entry-point" section.)
123 0x000: _060_real_chk
124 0x004: _060_real_divbyzero
125 0x008: _060_real_trace
126 0x00c: _060_real_access
127 0x010: _060_isp_done
129 0x014: _060_real_cas
130 0x018: _060_real_cas2
131 0x01c: _060_real_lock_page
[all …]
/kernel/linux/linux-5.10/drivers/media/cec/platform/tegra/
Dtegra_cec.h18 #define TEGRA_CEC_SW_CONTROL 0x000
19 #define TEGRA_CEC_HW_CONTROL 0x004
20 #define TEGRA_CEC_INPUT_FILTER 0x008
21 #define TEGRA_CEC_TX_REGISTER 0x010
22 #define TEGRA_CEC_RX_REGISTER 0x014
23 #define TEGRA_CEC_RX_TIMING_0 0x018
24 #define TEGRA_CEC_RX_TIMING_1 0x01c
25 #define TEGRA_CEC_RX_TIMING_2 0x020
26 #define TEGRA_CEC_TX_TIMING_0 0x024
27 #define TEGRA_CEC_TX_TIMING_1 0x028
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/numachip/
Dnumachip_csr.h22 #define CSR_NODE_MASK 0x0fff /* 4K nodes */
25 #define CSR_OFFSET_MASK 0x7fffUL
26 #define CSR_G0_NODE_IDS (0x008 + (0 << 12))
27 #define CSR_G3_EXT_IRQ_GEN (0x030 + (3 << 12))
30 * Local CSR space starts in global CSR space with "nodeid" = 0xfff0, however
34 #define NUMACHIP_LCSR_BASE 0x3ffffe000000ULL
35 #define NUMACHIP_LCSR_LIM 0x3fffffffffffULL
42 CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK)); in lcsr_address()
59 #define NUMACHIP2_LCSR_BASE 0xf0000000UL
60 #define NUMACHIP2_LCSR_SIZE 0x1000000UL
[all …]
/kernel/linux/linux-5.10/drivers/clk/meson/
Daxg-audio.h16 #define AUDIO_CLK_GATE_EN 0x000
17 #define AUDIO_MCLK_A_CTRL 0x004
18 #define AUDIO_MCLK_B_CTRL 0x008
19 #define AUDIO_MCLK_C_CTRL 0x00C
20 #define AUDIO_MCLK_D_CTRL 0x010
21 #define AUDIO_MCLK_E_CTRL 0x014
22 #define AUDIO_MCLK_F_CTRL 0x018
23 #define AUDIO_MST_PAD_CTRL0 0x01c
24 #define AUDIO_MST_PAD_CTRL1 0x020
25 #define AUDIO_SW_RESET 0x024
[all …]

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